diff options
| -rw-r--r-- | bfd/ChangeLog | 4 | ||||
| -rw-r--r-- | bfd/elfxx-mips.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 9c813bacc4..2e4f3b3c8c 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,7 @@ +2016-01-24 Maciej W. Rozycki <macro@imgtec.com> + + * elfxx-mips.c (BZ16_REG): Correct calculation. + 2016-01-21 Nick Clifton <nickc@redhat.com> * elf32-arc.c (ADD_RELA): Fix compile time warning errors by diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 4ece819798..176970a82c 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -13110,7 +13110,7 @@ static const struct opcode_descriptor bz_insns_16[] = { /* Switch between a 5-bit register index and its 3-bit shorthand. */ -#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2) +#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2) #define BZ16_REG_FIELD(r) \ (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7) |