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2020-12-04board: sl28: add OP-TEE Trusted OS support (bl32)Michael Walle
Add support to load the OP-TEE Trusted OS by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04board: sl28: add ATF support (bl31)Michael Walle
Add support to load the bl31 part of the ARM Trusted Firmware by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-01km/arm: coding style clean upHolger Brunck
Address most of the checkpatch issues we found in km_arm and common km code. CC: Stefan Roese <sr@denx.de> CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-11-28riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controllerPragnesh Patel
Enable support for SiFive FU540 Opencores I2C master controller. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-25board: st: stm32mp1: update load address for FIT examplesPatrick Delaunay
Update kernel load address for FIT examples to avoid relocation: - Kernel example uses Image.gz with U-Boot gzip decompression at final kernel location 0x0xC0008000. - Copro example loads zImage at a correct location (0xC4000000), to avoid zImage relocation before decompression by kernel code. An other solution to avoid zImage relocation is to align the kernel load and entry address with the real location in FIT (the relocation of zImage is skipped in U-Boot bootm command for identical address) but it is less flexible because this offset depends on FIT content: For example: ## Loading kernel from FIT Image at c2000000 ... Using 'ev1' configuration Trying 'kernel' kernel subimage Description: Linux kernel Created: 2020-10-22 9:08:32 UTC Type: Kernel Image Compression: uncompressed Data Start: 0xc20000cc The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at 0xC0008000 by kernel code: kernel { description = "Linux kernel"; data = /incbin/("zImage"); type = "kernel"; arch = "arm"; os = "linux"; compression = "none"; load = <0xC20000cc>; entry = <0xC20000cc>; hash-1 { algo = "sha1"; }; }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25board: stm32mp1: no MTD partitions fixup for serial bootPatrick Delaunay
Remove the update of the MTD partitions in kernel device tree for serial boot (USB / UART), and the kernel will use the MTD partitions define in the loaded DTB because U-Boot can't known the expected flash layout in this case. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25ARM: dts: stm32: Add DHCOM based PicoITX boardMarek Vasut
Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom board-to-board expansion connector. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-20fru: common: Record pcie/uuid fields in custom board areaMichal Simek
Add additional fields. They will be just recorded and filled but not shown. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20fru: ops: Do not let parser to write data to not allocated spaceMichal Simek
If customs fields in board area are used it will likely go over allocated space in struct fru_board_data. That's why calculate limit of this structure to make sure that different data is not rewritten by accident. When limit is reached stop to record fields. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20fru: common: Switch capture variable with the restMichal Simek
capture variable is bool which is just one byte and it is just causing unaligned accesses. Better to have it as last entry in the structure. It also simplify offset calculation for initial header copy. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20microblaze: Get rid of xparameters.hMichal Simek
There is no need to use this file anymore. Include it in main config file and simplify logic based on it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-19km/ppc: use Kconfig for MEMTEST configurationHolger Brunck
Also change back SYS_MEMTEST_END to 0x00f00000. 0xe00000 was wrong and introduced due to the global Kconfig migration of this option in u-boot. CC: Heiko Schocher <hs@denx.de> CC: Tom Rini <trini@konsulko.com> Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
2020-11-19km: replace hardcoded address for imported environmentMatteo Ghidoni
Instead of using an hard coded address, make use of an already defined address for importing the environment for ramfs and nfs boot. This allows boards having different mapping to use the same code. CC: Heiko Schocher <hs@denx.de> CC: Tom Rini <trini@konsulko.com> Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com> Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
2020-11-19arm: vexpress: don't reset flags in board_init to avoid losing previous onesArnaud Aujon Chevallier
Re-submitted because of missing description and signed-off. flags reset in board_init caused bugs when executing command like editenv because the reallocated flag was lost. Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com> Signed-off-by: Arnaud Aujon Chevallier <arnaud@intelibre.fr>
2020-11-17Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Enable SATA disk on QEMU RISC-V and update doc. - k210 pinctrl updates: - Fix inverted IE and OE for I2C. - Rename power domains to match datasheet.
2020-11-17riscv: enable SATA disk on QEMU RISC-VHeinrich Schuchardt
Allow attaching a virtual SATA disk to QEMU RISC-V by implying AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-11-17riscv: sort SPECIFIC_OPTIONSHeinrich Schuchardt
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in .config. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-11-17sunxi: allow to use AXP20[39] attached to I2C0 on V3 seriesIcenowy Zheng
The reference design of Allwinner V3 series uses an AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the first community-available V3s board, Lichee Pi Zero, omitted it. Allow to introduce support for the PMIC on boards with it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: a64: Add a defconfig for the PinePhoneSamuel Holland
The PinePhone is a smartphone produced by Pine64, with an A64 SoC, 2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel, and Quectel EG25-G modem. There are two main board revisions: 1.1 for early adopters, and 1.2 for mass production. Since there is code to detect the board revision at boot, one config/image can support both boards. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17sunxi: board: Set fdtfile to match the DT chosen by SPLSamuel Holland
Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. This meant that, regardless of the DT chosen by SPL (either by changing the header in the image or by the selection code at runtime), Linux always used the default DT. By using the name from the SPL header (which, because of the previous commit, always matches the DT used by U-Boot proper), Linux also sees the same board as U-Boot/SPL, even if the boot script later loads a DT from disk. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17sunxi: board: Save the chosen DT name in the SPL headerSamuel Holland
This overwrites the name loaded from the SPL image. It will be different if there was previously no name provided, or if a more accurate name was determined by the board variant selection logic. This means that the DT name in the SPL header now always matches the DT appended to U-Boot. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: move function under CONFIG_SPL_LOAD_FIT guard] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17sunxi: board: Add PinePhone DT selection logicSamuel Holland
There are two different publicly-released revisions of the PinePhone hardware, versions 1.1 and 1.2; and they need different device trees. Since some GPIO pins were rerouted, we can use that to distinguish between them. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: board: Simplify Pine A64 DT selection logicSamuel Holland
Instead of using an entirely separate matching algorithm, simply update the name of the DT we want to match. Enabling this logic does not depend on the FIT config name, only on the initial guess of the board name. Importantly, the initial guess must be "sun50i-a64-pine64-plus", because otherwise the logic would trigger when "sun50i-a64-pine64-lts" was written to the SPL header. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: board: Add a helper to get the SPL DT nameSamuel Holland
This moves the validity checking and typecasts all to one place away from the string comparison logic, and it detangles the compile-time and runtime control flow. The new helper will also be used by U-Boot proper in a future commit. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: protect new function with CONFIG_SPL_LOAD_FIT] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17sunxi: board: Use a more descriptive variable nameSamuel Holland
The variable "cmp_str" always leaves me wondering if it is the DT name of the current board (yes) or DT name in the FIT config entry (no). In preparation for expanding the functionality here, rename it to something that obviously means "this is the DT name we are looking for". Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-16Merge tag 'ti-v2021.01-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix Nokia RX-51 boot issues - Fix CONFIG_LOGLEVEL on K3 devices - Add phyBOARD REGOR support
2020-11-15Nokia RX-51: Make onenand workingIvaylo Dimitrov
set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash. Fix that by setting the correct timings and size from the board code Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Tested-by: Pali Rohár <pali@kernel.org>
2020-11-15Nokia RX-51: During init disable lp5523 led instead of resetting itPali Rohár
After commit d5243359e1af ("OMAP24xx I2C: Add support for set-speed") U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c poll ARDY bit which apparently is never set. It is not known what is happening here. Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off very bright led which is powered on by NOLO and expects next boot image (kernel or U-Boot) to turn it off. After testing we observed that just disabling lp5523 led is working fine. So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead of resetting it. Signed-off-by: Pali Rohár <pali@kernel.org> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
2020-11-15Nokia RX-51: Fix crashing in U-Boot mmc function omap_hsmmc_stop_clock()Pali Rohár
After commit 04a2ea248f58 ("mmc: disable UHS modes if Vcc cannot be switched on and off") U-Boot started crashing on Nokia RX-51 while initializing mmc and caused reboot loop. It looks like that some clocks were not enabled and this patch fixes U-Boot mmc crash. Signed-off-by: Pali Rohár <pali@kernel.org> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
2020-11-15Nokia RX-51: Convert to CONFIG_DM_I2CPali Rohár
Use twl4030_i2c_read(), i2c_get_chip_for_busnum() and remove CONFIG_SYS_I2C. Signed-off-by: Pali Rohár <pali@kernel.org>
2020-11-15ARM: am335x: Add phyBOARD REGOR supportParthiban Nallathambi
phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060). CPU : AM335X-GP rev 2.1 Model: Phytec AM335x phyBOARD-REGOR DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 eth0: ethernet@4a100000 Working: - Eth0 - i2C - MMC/SD - NAND - UART - USB (host) Device trees were taken from Linux mainline: commit c4d6fe731176 ("Linux 5.9.0") Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-13rockchip: gru: Allow setting up clocks in U-Boot properAlper Nebi Yasak
Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in U-Boot proper") fixes some clock issues when chainloading U-Boot on rk3288 chromebooks. Part of that change is still available in veyron's board_early_init_r() function. Since chain-loading U-Boot proper from vendor firmware is possible on gru boards as well, do the same thing for them too. On rk3399, this needs to detect whether SPL was run via handoff, so enable that and bloblist kconfigs it needs for chromebook_bob. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-10x86: coral: Correct max98357 fileSimon Glass
This somehow ended up as an empty file. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add a new SMBIOS parser and enable it when booting from coreboot - Fix up various driver names to avoid dtoc warnings - Fully enable ACPI support on Google Chromebook Coral - Add a way to set SMBIOS properties using the devicetree - Update existing boards to use devicetree for SMBIOS using a new default sysinfo driver
2020-11-06x86: galileo: Use devicetree for SMBIOS settingsSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06board: Rename uclass to sysinfoSimon Glass
This uclass is intended to provide a way to obtain information about a U-Boot board. But the concept of a U-Boot 'board' is the whole system, not just one circuit board, meaning that 'board' is something of a misnomer for this uclass. In addition, the name 'board' is a bit overused in U-Boot and we want to use the same uclass to provide SMBIOS information. The obvious name is 'system' but that is so vague as to be meaningless. Use 'sysinfo' instead, since this uclass is aimed at providing information on the system. Rename everything accordingly. Note: Due to the patch delta caused by the symbol renames, this patch shows some renamed files as being deleted in one place and created in another. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05coreboot: make use of smbios parserChristian Gmeiner
If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-04board: ge: b1x5v2: Add MAINTAINERSSebastian Reichel
Introduce maintainers file for the GE B1x5 board. Cc: Huan 'Kitty' Wang <HuanWang@ge.com> Cc: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04board: ge: ppd: Update MAINTAINERSSebastian Reichel
This updates the PPD MAINTAINERS file doing a couple of changes: * Replace Martyn with myself, since he no longer has the hardware available and add Ian Ray as maintainer * Fix the board directory path, which was still listing freescale/ instead of ge/ * Order the list of files alphabetically * Add board specific device tree files to the file list Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04board: ge: bx50v3: Update MAINTAINERSSebastian Reichel
This updates the Bx50v3 MAINTAINERS file, so that it also catches changes to the related device tree files. Additionally the list of files has been sorted alphabetically and I added myself as maintainer. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2Sebastian Reichel
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor series (GE Bx50). It consists of a carrier PCB used in combination with a Congatec QMX6 SoM. This adds U-Boot support using device model everywhere and SPL for memory initialization. Proper configuration is provided as 'ge_b1x5v2_defconfig' and the combined image u-boot-with-spi.imx can be flashed directly to 1024 byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can be loaded separately via USB-OTG using e.g. imx_usb. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-01board: ge: common: vpd: separate I2C specific codeSebastian Reichel
This separates the I2C specific code from the generic GE vital product data code, so that the generic parts can be used on hardware with VPD stored in SPI flash memory. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01board: ge: common: add config option for RTC and VPD featureSebastian Reichel
While this code is being used by all GE platforms its useful to have it behind a config option for hardware bringup of new platforms. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01board: ge: common: rename ge_common.c to ge_rtc.cSebastian Reichel
The file only contains RTC related code, so let's name it accordingly. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM supportTeresa Remmet
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2020-11-01arm: Implement show_boot_progress() for imx53's HSC and DDC devicesLukasz Majewski
This patch provides information regarding the boot stage with using LEDs. On the very beginning of U-Boot execution the GREEN LED is turned on. When the execution is passed to Linux kernel the GREEN LED is off and RED one is ON. Afterwards, when Linux takes over the execution, the "heartbeat" driver provides indication if the board is still alive. Please also note that this patch uses {set|clr}bits_le32 macros as turning ON GREEN LED is performed in a _very_ early stage of U-Boot execution before DM_GPIOs are initialized. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01doc: board: Convert i.MX6ULL EVK README to reSTPeng Fan
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-11-01doc: board: Convert i.MX6UL 14x14 EVK README to reSTPeng Fan
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-11-01doc: board: Convert i.MX6 Sabresd README to reSTPeng Fan
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-11-01doc: board: Convert i.MX6 Sabreauto README to reSTPeng Fan
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
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