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authorNick Clifton <nickc@redhat.com>2000-06-19 01:22:44 +0000
committerNick Clifton <nickc@redhat.com>2000-06-19 01:22:44 +0000
commit60bcf0fa8c115b4e71d7b1372aca3efccffc9607 (patch)
tree9592b86c1082c3cc81770da7e04068973b781af0 /bfd
parent58781cd0ba8aed9244e6b17b60cb1a3cf005faf2 (diff)
Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog20
-rw-r--r--bfd/Makefile.am14
-rw-r--r--bfd/Makefile.in16
-rw-r--r--bfd/archures.c6
-rw-r--r--bfd/bfd-in.h16
-rw-r--r--bfd/bfd-in2.h30
-rw-r--r--bfd/coff-i386.c4
-rw-r--r--bfd/coff-mcore.c8
-rw-r--r--bfd/coffcode.h12
-rw-r--r--bfd/cofflink.c2
-rw-r--r--bfd/config.bfd17
-rwxr-xr-xbfd/configure30
-rw-r--r--bfd/configure.in6
-rw-r--r--bfd/cpu-m68hc11.c39
-rw-r--r--bfd/cpu-m68hc12.c38
-rw-r--r--bfd/doc/Makefile.in2
-rw-r--r--bfd/elf-bfd.h20
-rw-r--r--bfd/elf.c12
-rw-r--r--bfd/elf32-m68hc11.c281
-rw-r--r--bfd/elf32-m68hc12.c281
-rw-r--r--bfd/elfcode.h16
-rw-r--r--bfd/elfcore.h4
-rw-r--r--bfd/elfxx-target.h1
-rw-r--r--bfd/libbfd.h3
-rw-r--r--bfd/peicode.h2
-rw-r--r--bfd/po/POTFILES.in72
-rw-r--r--bfd/po/bfd.pot889
-rw-r--r--bfd/reloc.c17
-rw-r--r--bfd/section.c12
-rw-r--r--bfd/targets.c4
30 files changed, 1385 insertions, 489 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index df53b6a13e..3bf5a1744d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,23 @@
+2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
+
+ * Makefile.in, bfd-in2.h, libbfd.h, configure: Rebuild.
+ * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES, BFD32_BACKENDS,
+ BFD32_BACKENDS_CFILES): Add 68hc12, 68hc11 files.
+ * configure.in (bfd_elf32_m68hc12_vec): Recognize.
+ (bfd_elf32_m68hc11_vec): Likewise.
+ * config.bfd (targ_cpu): Recognize 68hc12 and 68hc11.
+ Supports 68hc11 & 68hc12 at the same time.
+ * targets.c (bfd_elf32_m68hc12_vec): Declare and put in
+ bfd_target_vector.
+ (bfd_elf32_m68hc11_vec): Likewise.
+ * elf.c (prep_headers): Recognize bfd_arch_m68hc12 and 68hc11.
+ * archures.c (bfd_m68hc12_arch): Define and register in global list
+ (bfd_m68hc11_arch): Likewise.
+ * reloc.c (BFD_RELOC_M68HC11_HI8, BFD_RELOC_M68HC11_LO8,
+ BFD_RELOC_M68HC11_3B): Define.
+ * cpu-m68hc12.c, elf32-m68hc12.c: New files for 68hc12 support.
+ * cpu-m68hc11.c, elf32-m68hc11.c: New files for 68hc11 support.
+
2000-06-18 Ulf Carlsson <ulfc@engr.sgi.com>
* elf_bfd.h (struct elf_backend_data): Add info argument to
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 1b6a0a77c7..39c745533d 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -57,6 +57,8 @@ ALL_MACHINES = \
cpu-i860.lo \
cpu-i960.lo \
cpu-m32r.lo \
+ cpu-m68hc11.lo \
+ cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-m10200.lo \
@@ -96,6 +98,8 @@ ALL_MACHINES_CFILES = \
cpu-i860.c \
cpu-i960.c \
cpu-m32r.c \
+ cpu-m68hc11.c \
+ cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-m10200.c \
@@ -179,6 +183,8 @@ BFD32_BACKENDS = \
elf32-i860.lo \
elf32-i960.lo \
elf32-m32r.lo \
+ elf32-m68hc11.lo \
+ elf32-m68hc12.lo \
elf32-m68k.lo \
elf32-m88k.lo \
elf-m10200.lo \
@@ -313,6 +319,8 @@ BFD32_BACKENDS_CFILES = \
elf32-i960.c \
elf32-m32r.c \
elf32-m68k.c \
+ elf32-m68hc11.c \
+ elf32-m68hc12.c \
elf32-m88k.c \
elf-m10200.c \
elf-m10300.c \
@@ -721,6 +729,8 @@ cpu-i860.lo: cpu-i860.c $(INCDIR)/filenames.h
cpu-i960.lo: cpu-i960.c $(INCDIR)/filenames.h
cpu-m32r.lo: cpu-m32r.c $(INCDIR)/filenames.h
cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h
+cpu-m68hc11.lo: cpu-m68hc11.c $(INCDIR)/filenames.h
+cpu-m68hc12.lo: cpu-m68hc12.c $(INCDIR)/filenames.h
cpu-m88k.lo: cpu-m88k.c $(INCDIR)/filenames.h
cpu-m10200.lo: cpu-m10200.c $(INCDIR)/filenames.h
cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h
@@ -913,6 +923,10 @@ elf32-fr30.lo: elf32-fr30.c $(INCDIR)/filenames.h elf-bfd.h \
elf32-gen.lo: elf32-gen.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h elf32-target.h
+elf32-m68hc11.lo: elf32-m68hc11.c $(INCDIR)/bfdlink.h elf-bfd.h \
+ $(INCDIR)/elf/m68hc11.h elf32-target.h
+elf32-m68hc12.lo: elf32-m68hc12.c $(INCDIR)/bfdlink.h elf-bfd.h \
+ $(INCDIR)/elf/m68hc11.h elf32-target.h
elf32-hppa.lo: elf32-hppa.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index f23960a6b7..a894da4710 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -172,6 +172,8 @@ ALL_MACHINES = \
cpu-i860.lo \
cpu-i960.lo \
cpu-m32r.lo \
+ cpu-m68hc11.lo \
+ cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-m10200.lo \
@@ -212,6 +214,8 @@ ALL_MACHINES_CFILES = \
cpu-i860.c \
cpu-i960.c \
cpu-m32r.c \
+ cpu-m68hc11.c \
+ cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-m10200.c \
@@ -296,6 +300,8 @@ BFD32_BACKENDS = \
elf32-i860.lo \
elf32-i960.lo \
elf32-m32r.lo \
+ elf32-m68hc11.lo \
+ elf32-m68hc12.lo \
elf32-m68k.lo \
elf32-m88k.lo \
elf-m10200.lo \
@@ -431,6 +437,8 @@ BFD32_BACKENDS_CFILES = \
elf32-i960.c \
elf32-m32r.c \
elf32-m68k.c \
+ elf32-m68hc11.c \
+ elf32-m68hc12.c \
elf32-m88k.c \
elf-m10200.c \
elf-m10300.c \
@@ -663,7 +671,7 @@ configure.in
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
-TAR = tar
+TAR = gtar
GZIP_ENV = --best
SOURCES = $(libbfd_a_SOURCES) $(libbfd_la_SOURCES)
OBJECTS = $(libbfd_a_OBJECTS) $(libbfd_la_OBJECTS)
@@ -1249,6 +1257,8 @@ cpu-i860.lo: cpu-i860.c $(INCDIR)/filenames.h
cpu-i960.lo: cpu-i960.c $(INCDIR)/filenames.h
cpu-m32r.lo: cpu-m32r.c $(INCDIR)/filenames.h
cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h
+cpu-m68hc11.lo: cpu-m68hc11.c $(INCDIR)/filenames.h
+cpu-m68hc12.lo: cpu-m68hc12.c $(INCDIR)/filenames.h
cpu-m88k.lo: cpu-m88k.c $(INCDIR)/filenames.h
cpu-m10200.lo: cpu-m10200.c $(INCDIR)/filenames.h
cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h
@@ -1441,6 +1451,10 @@ elf32-fr30.lo: elf32-fr30.c $(INCDIR)/filenames.h elf-bfd.h \
elf32-gen.lo: elf32-gen.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h elf32-target.h
+elf32-m68hc11.lo: elf32-m68hc11.c $(INCDIR)/bfdlink.h elf-bfd.h \
+ $(INCDIR)/elf/m68hc11.h elf32-target.h
+elf32-m68hc12.lo: elf32-m68hc12.c $(INCDIR)/bfdlink.h elf-bfd.h \
+ $(INCDIR)/elf/m68hc11.h elf32-target.h
elf32-hppa.lo: elf32-hppa.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h \
diff --git a/bfd/archures.c b/bfd/archures.c
index 69e42bfa8a..ffc79377e8 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -174,6 +174,8 @@ DESCRIPTION
.#define bfd_mach_d10v_ts2 2
.#define bfd_mach_d10v_ts3 3
. bfd_arch_d30v, {* Mitsubishi D30V *}
+. bfd_arch_m68hc11, {* Motorola 68HC11 *}
+. bfd_arch_m68hc12, {* Motorola 68HC12 *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
.#define bfd_mach_z8002 2
@@ -279,6 +281,8 @@ extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_i860_arch;
extern const bfd_arch_info_type bfd_i960_arch;
extern const bfd_arch_info_type bfd_m32r_arch;
+extern const bfd_arch_info_type bfd_m68hc11_arch;
+extern const bfd_arch_info_type bfd_m68hc12_arch;
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
extern const bfd_arch_info_type bfd_mips_arch;
@@ -322,6 +326,8 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_i860_arch,
&bfd_i960_arch,
&bfd_m32r_arch,
+ &bfd_m68hc11_arch,
+ &bfd_m68hc12_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
&bfd_mips_arch,
diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h
index 26a90800d7..f0a1d84ebd 100644
--- a/bfd/bfd-in.h
+++ b/bfd/bfd-in.h
@@ -23,7 +23,7 @@ You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-/* bfd.h -- The only header file required by users of the bfd library
+/* bfd.h -- The only header file required by users of the bfd library
The bfd.h file is generated from bfd-in.h and various .c files; if you
change it, your changes will probably be lost.
@@ -109,7 +109,7 @@ typedef enum bfd_boolean {bfd_fffalse, bfd_tttrue} boolean;
/* FIXME: This should be using off_t from <sys/types.h>.
For now, try to avoid breaking stuff by not including <sys/types.h> here.
This will break on systems with 64-bit file offsets (e.g. 4.4BSD).
- Probably the best long-term answer is to avoid using file_ptr AND off_t
+ Probably the best long-term answer is to avoid using file_ptr AND off_t
in this header file, and to handle this in the BFD implementation
rather than in its interface. */
/* typedef off_t file_ptr; */
@@ -284,11 +284,11 @@ typedef struct carsym {
file_ptr file_offset; /* look here to find the file */
} carsym; /* to make these you call a carsymogen */
-
+
/* Used in generating armaps (archive tables of contents).
Perhaps just a forward definition would do? */
struct orl { /* output ranlib */
- char **name; /* symbol name */
+ char **name; /* symbol name */
file_ptr pos; /* bfd* or file position */
int namidx; /* index into string table */
};
@@ -296,7 +296,7 @@ struct orl { /* output ranlib */
/* Linenumber stuff */
typedef struct lineno_cache_entry {
- unsigned int line_number; /* Linenumber from start of function*/
+ unsigned int line_number; /* Linenumber from start of function*/
union {
struct symbol_cache_entry *sym; /* Function name */
unsigned long offset; /* Offset into section */
@@ -327,15 +327,15 @@ typedef struct sec *sec_ptr;
#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),true)
#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),true)
-typedef struct stat stat_type;
+typedef struct stat stat_type;
typedef enum bfd_print_symbol
-{
+{
bfd_print_symbol_name,
bfd_print_symbol_more,
bfd_print_symbol_all
} bfd_print_symbol_type;
-
+
/* Information about a symbol that nm needs. */
typedef struct _symbol_info
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 92501f003c..b0832b90ce 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -23,7 +23,7 @@ You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-/* bfd.h -- The only header file required by users of the bfd library
+/* bfd.h -- The only header file required by users of the bfd library
The bfd.h file is generated from bfd-in.h and various .c files; if you
change it, your changes will probably be lost.
@@ -109,7 +109,7 @@ typedef enum bfd_boolean {bfd_fffalse, bfd_tttrue} boolean;
/* FIXME: This should be using off_t from <sys/types.h>.
For now, try to avoid breaking stuff by not including <sys/types.h> here.
This will break on systems with 64-bit file offsets (e.g. 4.4BSD).
- Probably the best long-term answer is to avoid using file_ptr AND off_t
+ Probably the best long-term answer is to avoid using file_ptr AND off_t
in this header file, and to handle this in the BFD implementation
rather than in its interface. */
/* typedef off_t file_ptr; */
@@ -284,11 +284,11 @@ typedef struct carsym {
file_ptr file_offset; /* look here to find the file */
} carsym; /* to make these you call a carsymogen */
-
+
/* Used in generating armaps (archive tables of contents).
Perhaps just a forward definition would do? */
struct orl { /* output ranlib */
- char **name; /* symbol name */
+ char **name; /* symbol name */
file_ptr pos; /* bfd* or file position */
int namidx; /* index into string table */
};
@@ -296,7 +296,7 @@ struct orl { /* output ranlib */
/* Linenumber stuff */
typedef struct lineno_cache_entry {
- unsigned int line_number; /* Linenumber from start of function*/
+ unsigned int line_number; /* Linenumber from start of function*/
union {
struct symbol_cache_entry *sym; /* Function name */
unsigned long offset; /* Offset into section */
@@ -327,15 +327,15 @@ typedef struct sec *sec_ptr;
#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),true)
#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),true)
-typedef struct stat stat_type;
+typedef struct stat stat_type;
typedef enum bfd_print_symbol
-{
+{
bfd_print_symbol_name,
bfd_print_symbol_more,
bfd_print_symbol_all
} bfd_print_symbol_type;
-
+
/* Information about a symbol that nm needs. */
typedef struct _symbol_info
@@ -1413,6 +1413,8 @@ enum bfd_architecture
#define bfd_mach_d10v_ts2 2
#define bfd_mach_d10v_ts3 3
bfd_arch_d30v, /* Mitsubishi D30V */
+ bfd_arch_m68hc11, /* Motorola 68HC11 */
+ bfd_arch_m68hc12, /* Motorola 68HC12 */
bfd_arch_z8k, /* Zilog Z8000 */
#define bfd_mach_z8001 1
#define bfd_mach_z8002 2
@@ -2545,6 +2547,18 @@ this offset in the reloc's section offset. */
BFD_RELOC_IA64_LTOFF_TP22,
BFD_RELOC_IA64_LTOFF22X,
BFD_RELOC_IA64_LDXMOV,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bits high part of an absolute address. */
+ BFD_RELOC_M68HC11_HI8,
+
+/* Motorola 68HC11 reloc.
+This is the 8 bits low part of an absolute address. */
+ BFD_RELOC_M68HC11_LO8,
+
+/* Motorola 68HC11 reloc.
+This is the 3 bits of a value. */
+ BFD_RELOC_M68HC11_3B,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *
diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c
index c7aa659c0e..0f233254f1 100644
--- a/bfd/coff-i386.c
+++ b/bfd/coff-i386.c
@@ -176,19 +176,17 @@ coff_i386_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
}
#ifdef COFF_WITH_PE
-
/* Return true if this relocation should appear in the output .reloc
section. */
static boolean in_reloc_p PARAMS ((bfd *, reloc_howto_type *));
static boolean in_reloc_p (abfd, howto)
- bfd *abfd ATTRIBUTE_UNUSED;
+ bfd * abfd ATTRIBUTE_UNUSED;
reloc_howto_type *howto;
{
return ! howto->pc_relative && howto->type != R_IMAGEBASE;
}
-
#endif /* COFF_WITH_PE */
#ifndef PCRELOFFSET
diff --git a/bfd/coff-mcore.c b/bfd/coff-mcore.c
index 19cbea1dc8..f20c2ca815 100644
--- a/bfd/coff-mcore.c
+++ b/bfd/coff-mcore.c
@@ -582,5 +582,9 @@ coff_mcore_relocate_section (output_bfd, info, input_bfd, input_section,
extern const bfd_target TARGET_LITTLE_SYM;
/* The transfer vectors that lead the outside world to all of the above. */
-CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, (SEC_LINK_ONCE | SEC_LINK_DUPLICATES), 0, & TARGET_LITTLE_SYM)
-CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, (SEC_LINK_ONCE | SEC_LINK_DUPLICATES), 0, & TARGET_BIG_SYM)
+CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED,
+ (SEC_CODE | SEC_DATA | SEC_DEBUGGING | SEC_READONLY | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
+ 0, & TARGET_LITTLE_SYM)
+CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED,
+ (SEC_CODE | SEC_DATA | SEC_DEBUGGING | SEC_READONLY | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
+ 0, & TARGET_BIG_SYM)
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index 9344498867..f4e27fad25 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -1466,8 +1466,8 @@ static const unsigned int coff_section_alignment_table_size =
static boolean
coff_new_section_hook (abfd, section)
- bfd *abfd;
- asection *section;
+ bfd * abfd;
+ asection * section;
{
combined_entry_type *native;
@@ -3342,7 +3342,7 @@ coff_write_object_contents (abfd)
&& ! is_reloc_section)
hasdebug = true;
-#ifdef RS6000COFF_C
+#ifdef RS6000COFF_C
#ifndef XCOFF64
/* Indicate the use of an XCOFF overflow section header. */
if (current->reloc_count >= 0xffff || current->lineno_count >= 0xffff)
@@ -3395,7 +3395,7 @@ coff_write_object_contents (abfd)
SCNHDR buff;
if (coff_swap_scnhdr_out (abfd, &section, &buff) == 0
|| bfd_write ((PTR) (&buff), 1, bfd_coff_scnhsz (abfd), abfd)
- != bfd_coff_scnhsz (abfd))
+ != bfd_coff_scnhsz (abfd))
return false;
}
@@ -3517,7 +3517,7 @@ coff_write_object_contents (abfd)
scnhdr.s_flags = STYP_OVRFLO;
if (coff_swap_scnhdr_out (abfd, &scnhdr, &buff) == 0
|| bfd_write ((PTR) &buff, 1, bfd_coff_scnhsz (abfd), abfd)
- != bfd_coff_scnhsz (abfd))
+ != bfd_coff_scnhsz (abfd))
return false;
}
}
@@ -4438,7 +4438,7 @@ coff_slurp_symbol_table (abfd)
#endif
case C_BLOCK: /* ".bb" or ".eb" */
- case C_FCN: /* ".bf" or ".ef" (or PE ".lf") */
+ case C_FCN: /* ".bf" or ".ef" (or PE ".lf") */
case C_EFCN: /* physical end of function */
#if defined COFF_WITH_PE
/* PE sets the symbol to a value relative to the start
diff --git a/bfd/cofflink.c b/bfd/cofflink.c
index b648fa19ee..01fa2e7b91 100644
--- a/bfd/cofflink.c
+++ b/bfd/cofflink.c
@@ -2201,7 +2201,7 @@ _bfd_coff_link_input_bfd (finfo, input_bfd)
is.n_numaux, auxptr);
}
- skipping = false;
+ skipping = false;
}
iline.l_addr.l_symndx = indx;
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 324a168efc..f85a6def7d 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -37,6 +37,8 @@ c54x*) targ_archs=bfd_tic54x_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3456]86) targ_archs=bfd_i386_arch ;;
i370) targ_archs=bfd_i370_arch ;;
+m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch" ;;
+m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch" ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
@@ -118,7 +120,7 @@ case "${targ}" in
targ_selvecs="armpe_little_vec armpe_big_vec armpei_little_vec armpei_big_vec"
targ_underscore=yes
;;
- arm-*-aout | armel-*-aout)
+ arm-*-aout | armel-*-aout)
targ_defvec=aout_arm_little_vec
targ_selvecs=aout_arm_big_vec
;;
@@ -231,7 +233,7 @@ case "${targ}" in
hppa*-*-*elf* | hppa*-*-linux-gnu* | hppa*-*-lites* | hppa*-*-sysv4* | hppa*-*-rtems*)
targ_defvec=bfd_elf32_hppa_vec
;;
-#ifdef BFD64
+#ifdef BFD64
hppa*64*-*-hpux11*)
targ_defvec=bfd_elf64_hppa_vec
targ_cflags=-DHPUX_LARGE_AR_IDS
@@ -404,6 +406,15 @@ case "${targ}" in
targ_defvec=bfd_elf32_m32r_vec
;;
+ m68hc11-*-* | m6811-*-*)
+ targ_defvec=bfd_elf32_m68hc11_vec
+ targ_selvecs="bfd_elf32_m68hc11_vec bfd_elf32_m68hc12_vec"
+ ;;
+ m68hc12-*-* | m6812-*-*)
+ targ_defvec=bfd_elf32_m68hc12_vec
+ targ_selvecs="bfd_elf32_m68hc11_vec bfd_elf32_m68hc12_vec"
+ ;;
+
m68*-apollo-*)
targ_defvec=apollocoff_vec
;;
@@ -740,7 +751,7 @@ case "${targ}" in
sparc64-*-elf*)
targ_defvec=bfd_elf64_sparc_vec
targ_selvecs=bfd_elf32_sparc_vec
- ;;
+ ;;
#endif /* BFD64 */
sparc*-*-coff*)
targ_defvec=sparccoff_vec
diff --git a/bfd/configure b/bfd/configure
index ba644d2f05..092c2283d7 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -5144,6 +5144,8 @@ do
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elf32-mips.lo elf32.lo $elf ecofflink.lo"
target64=true ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
+ bfd_elf32_m68hc11_vec) tb="$tb elf32-m68hc11.lo elf32.lo $elf" ;;
+ bfd_elf32_m68hc12_vec) tb="$tb elf32-m68hc12.lo elf32.lo $elf" ;;
bfd_elf32_m68k_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;;
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.lo elf32.lo $elf" ;;
bfd_elf32_mcore_big_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
@@ -5236,8 +5238,8 @@ do
shlcoff_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
shcoff_small_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
shlcoff_small_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
- shlpe_vec) tb="$tb pe-sh.lo coff-sh.lo cofflink.lo" ;;
- shlpei_vec) tb="$tb pei-sh.lo coff-sh.lo cofflink.lo" ;;
+ shlpe_vec) tb="$tb pe-sh.lo coff-sh.lo peigen.lo cofflink.lo" ;;
+ shlpei_vec) tb="$tb pei-sh.lo coff-sh.lo peigen.lo cofflink.lo" ;;
som_vec) tb="$tb som.lo" ;;
sparcle_aout_vec) tb="$tb aout-sparcle.lo aout32.lo" ;;
sparclinux_vec) tb="$tb sparclinux.lo aout32.lo" ;;
@@ -5346,17 +5348,17 @@ for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:5350: checking for $ac_hdr" >&5
+echo "configure:5352: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5355 "configure"
+#line 5357 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:5360: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:5362: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -5385,12 +5387,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:5389: checking for $ac_func" >&5
+echo "configure:5391: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5394 "configure"
+#line 5396 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -5413,7 +5415,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:5417: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5419: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -5438,7 +5440,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:5442: checking for working mmap" >&5
+echo "configure:5444: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5446,7 +5448,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 5450 "configure"
+#line 5452 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@@ -5586,7 +5588,7 @@ main()
}
EOF
-if { (eval echo configure:5590: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:5592: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@@ -5611,12 +5613,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:5615: checking for $ac_func" >&5
+echo "configure:5617: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5620 "configure"
+#line 5622 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -5639,7 +5641,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:5643: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5645: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
diff --git a/bfd/configure.in b/bfd/configure.in
index 08daaa8799..4b1c723e5f 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -501,6 +501,8 @@ do
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elf32-mips.lo elf32.lo $elf ecofflink.lo"
target64=true ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
+ bfd_elf32_m68hc11_vec) tb="$tb elf32-m68hc11.lo elf32.lo $elf" ;;
+ bfd_elf32_m68hc12_vec) tb="$tb elf32-m68hc12.lo elf32.lo $elf" ;;
bfd_elf32_m68k_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;;
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.lo elf32.lo $elf" ;;
bfd_elf32_mcore_big_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
@@ -593,8 +595,8 @@ do
shlcoff_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
shcoff_small_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
shlcoff_small_vec) tb="$tb coff-sh.lo cofflink.lo" ;;
- shlpe_vec) tb="$tb pe-sh.lo coff-sh.lo cofflink.lo" ;;
- shlpei_vec) tb="$tb pei-sh.lo coff-sh.lo cofflink.lo" ;;
+ shlpe_vec) tb="$tb pe-sh.lo coff-sh.lo peigen.lo cofflink.lo" ;;
+ shlpei_vec) tb="$tb pei-sh.lo coff-sh.lo peigen.lo cofflink.lo" ;;
som_vec) tb="$tb som.lo" ;;
sparcle_aout_vec) tb="$tb aout-sparcle.lo aout32.lo" ;;
sparclinux_vec) tb="$tb sparclinux.lo aout32.lo" ;;
diff --git a/bfd/cpu-m68hc11.c b/bfd/cpu-m68hc11.c
new file mode 100644
index 0000000000..0df14c8d30
--- /dev/null
+++ b/bfd/cpu-m68hc11.c
@@ -0,0 +1,39 @@
+/* BFD support for the Motorola 68HC11 processor
+ Copyright 1999, 2000 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m68hc11_arch =
+{
+ 16, /* 16 bits in a word */
+ 16, /* 16 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_m68hc11,
+ 0,
+ "m68hc11",
+ "m68hc11",
+ 4, /* section alignment power */
+ true,
+ bfd_default_compatible,
+ bfd_default_scan,
+ 0,
+};
+
diff --git a/bfd/cpu-m68hc12.c b/bfd/cpu-m68hc12.c
new file mode 100644
index 0000000000..830ddb51ae
--- /dev/null
+++ b/bfd/cpu-m68hc12.c
@@ -0,0 +1,38 @@
+/* BFD support for the Motorola 68HC12 processor
+ Copyright 1999, 2000 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m68hc12_arch =
+{
+ 16, /* 16 bits in a word */
+ 16, /* 16 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_m68hc12,
+ 0,
+ "m68hc12",
+ "m68hc12",
+ 4, /* section alignment power */
+ true,
+ bfd_default_compatible,
+ bfd_default_scan,
+ 0,
+};
diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
index e45ab482ca..80be82a2b5 100644
--- a/bfd/doc/Makefile.in
+++ b/bfd/doc/Makefile.in
@@ -188,7 +188,7 @@ DIST_COMMON = ChangeLog Makefile.am Makefile.in
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
-TAR = tar
+TAR = gtar
GZIP_ENV = --best
all: all-redirect
.SUFFIXES:
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index b17f7c6cda..8489a32de3 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -373,8 +373,8 @@ struct elf_backend_data
/* A function to set the type of the info field. Processor-specific
types should be handled here. */
- int (*elf_backend_get_symbol_type) PARAMS (( Elf_Internal_Sym *, int));
-
+ int (*elf_backend_get_symbol_type) PARAMS (( Elf_Internal_Sym *, int));
+
/* A function to do additional processing on the ELF section header
just before writing it out. This is used to set the flags and
type fields for some sections, or to actually write out data for
@@ -638,7 +638,7 @@ struct elf_backend_data
both REL and RELA relocations, and this flag is set for those
backends.) */
unsigned may_use_rel_p : 1;
-
+
/* Whether the backend may use RELA relocations. (Some backends use
both REL and RELA relocations, and this flag is set for those
backends.) */
@@ -647,8 +647,8 @@ struct elf_backend_data
/* Whether the default relocation type is RELA. If a backend with
this flag set wants REL relocations for a particular section,
it must note that explicitly. Similarly, if this flag is clear,
- and the backend wants RELA relocations for a particular
- section. */
+ and the backend wants RELA relocations for a particular
+ section. */
unsigned default_use_rela_p : 1;
/* True if addresses "naturally" sign extend. This is used when
@@ -1013,7 +1013,7 @@ extern boolean _bfd_elf_find_nearest_line PARAMS ((bfd *, asection *,
#define _bfd_elf_minisymbol_to_symbol _bfd_generic_minisymbol_to_symbol
extern int _bfd_elf_sizeof_headers PARAMS ((bfd *, boolean));
extern boolean _bfd_elf_new_section_hook PARAMS ((bfd *, asection *));
-extern boolean _bfd_elf_init_reloc_shdr
+extern boolean _bfd_elf_init_reloc_shdr
PARAMS ((bfd *, Elf_Internal_Shdr *, asection *, boolean));
/* If the target doesn't have reloc handling written yet: */
@@ -1282,11 +1282,11 @@ extern boolean _bfd_mips_elf_finish_dynamic_symbol
Elf_Internal_Sym *));
extern boolean _bfd_mips_elf_finish_dynamic_sections
PARAMS ((bfd *, struct bfd_link_info *));
-extern asection * _bfd_mips_elf_gc_mark_hook
+extern asection * _bfd_mips_elf_gc_mark_hook
PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Rela *,
struct elf_link_hash_entry *, Elf_Internal_Sym *));
-extern boolean _bfd_mips_elf_gc_sweep_hook
- PARAMS ((bfd *, struct bfd_link_info *, asection *,
+extern boolean _bfd_mips_elf_gc_sweep_hook
+ PARAMS ((bfd *, struct bfd_link_info *, asection *,
const Elf_Internal_Rela *));
extern boolean _bfd_mips_elf_always_size_sections
PARAMS ((bfd *, struct bfd_link_info *));
@@ -1297,7 +1297,7 @@ extern boolean _bfd_mips_elf_check_relocs
const Elf_Internal_Rela *));
extern struct bfd_link_hash_table *_bfd_mips_elf_link_hash_table_create
PARAMS ((bfd *));
-extern boolean _bfd_mips_elf_print_private_bfd_data
+extern boolean _bfd_mips_elf_print_private_bfd_data
PARAMS ((bfd *, PTR));
extern boolean _bfd_mips_elf_link_output_symbol_hook
PARAMS ((bfd *, struct bfd_link_info *, const char *, Elf_Internal_Sym *,
diff --git a/bfd/elf.c b/bfd/elf.c
index a52d7933cd..f88ebbd6ee 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -1333,8 +1333,10 @@ bfd_section_from_shdr (abfd, shindex)
/* If this reloc section does not use the main symbol table we
don't treat it as a reloc section. BFD can't adequately
represent such a section, so at least for now, we don't
- try. We just present it as a normal section. */
- if (hdr->sh_link != elf_onesymtab (abfd))
+ try. We just present it as a normal section. We also
+ can't use it as a reloc section if it points to the null
+ section. */
+ if (hdr->sh_link != elf_onesymtab (abfd) || hdr->sh_info == SHN_UNDEF)
return _bfd_elf_make_section_from_shdr (abfd, hdr, name);
if (! bfd_section_from_shdr (abfd, hdr->sh_info))
@@ -3265,6 +3267,12 @@ prep_headers (abfd)
case bfd_arch_ia64:
i_ehdrp->e_machine = EM_IA_64;
break;
+ case bfd_arch_m68hc11:
+ i_ehdrp->e_machine = EM_68HC11;
+ break;
+ case bfd_arch_m68hc12:
+ i_ehdrp->e_machine = EM_68HC12;
+ break;
case bfd_arch_m68k:
i_ehdrp->e_machine = EM_68K;
break;
diff --git a/bfd/elf32-m68hc11.c b/bfd/elf32-m68hc11.c
new file mode 100644
index 0000000000..594d114ea9
--- /dev/null
+++ b/bfd/elf32-m68hc11.c
@@ -0,0 +1,281 @@
+/* Motorola 68HC11-specific support for 32-bit ELF
+ Copyright (C) 1999, 2000 Free Software Foundation, Inc.
+ Contributed by Stephane Carrez (stcarrez@worldnet.fr)
+ (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/m68hc11.h"
+
+static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
+PARAMS ((bfd * abfd, bfd_reloc_code_real_type code));
+static void m68hc11_info_to_howto_rel
+PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
+
+
+/* Use REL instead of RELA to save space */
+#define USE_REL
+
+/* The Motorola 68HC11 microcontroler only addresses 64Kb.
+ We must handle 8 and 16-bit relocations. The 32-bit relocation
+ is defined but not used except by gas when -gstabs is used (which
+ is wrong).
+ The 3-bit and 16-bit PC rel relocation is only used by 68HC12. */
+static reloc_howto_type elf_m68hc11_howto_table[] = {
+ /* This reloc does nothing. */
+ HOWTO (R_M68HC11_NONE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_NONE", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation */
+ HOWTO (R_M68HC11_8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (upper address) */
+ HOWTO (R_M68HC11_HI8, /* type */
+ 8, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_HI8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (upper address) */
+ HOWTO (R_M68HC11_LO8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_LO8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit PC-rel relocation */
+ HOWTO (R_M68HC11_PCREL_8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_PCREL_8", /* name */
+ false, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 16 bit absolute relocation */
+ HOWTO (R_M68HC11_16, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont /*bitfield */ , /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_16", /* name */
+ false, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 32 bit absolute relocation. This one is never used for the
+ code relocation. It's used by gas for -gstabs generation. */
+ HOWTO (R_M68HC11_32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_32", /* name */
+ false, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 3 bit absolute relocation */
+ HOWTO (R_M68HC11_3B, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 3, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_4B", /* name */
+ false, /* partial_inplace */
+ 0x003, /* src_mask */
+ 0x003, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 16 bit PC-rel relocation */
+ HOWTO (R_M68HC11_PCREL_16, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_PCREL_16", /* name */
+ false, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0xffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* GNU extension to record C++ vtable hierarchy */
+ HOWTO (R_M68HC11_GNU_VTINHERIT, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ NULL, /* special_function */
+ "R_M68HC11_GNU_VTINHERIT", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* GNU extension to record C++ vtable member usage */
+ HOWTO (R_M68HC11_GNU_VTENTRY, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ _bfd_elf_rel_vtable_reloc_fn, /* special_function */
+ "R_M68HC11_GNU_VTENTRY", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+};
+
+/* Map BFD reloc types to M68HC11 ELF reloc types. */
+
+struct m68hc11_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_val;
+ unsigned char elf_reloc_val;
+};
+
+static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
+ {BFD_RELOC_NONE, R_M68HC11_NONE,},
+ {BFD_RELOC_8, R_M68HC11_8},
+ {BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8},
+ {BFD_RELOC_M68HC11_LO8, R_M68HC11_LO8},
+ {BFD_RELOC_8_PCREL, R_M68HC11_PCREL_8},
+ {BFD_RELOC_16_PCREL, R_M68HC11_PCREL_16},
+ {BFD_RELOC_16, R_M68HC11_16},
+ {BFD_RELOC_32, R_M68HC11_32},
+ {BFD_RELOC_M68HC11_3B, R_M68HC11_3B},
+
+ /* The following relocs are defined but they probably don't work yet. */
+ {BFD_RELOC_VTABLE_INHERIT, R_M68HC11_GNU_VTINHERIT},
+ {BFD_RELOC_VTABLE_ENTRY, R_M68HC11_GNU_VTENTRY},
+};
+
+static reloc_howto_type *
+bfd_elf32_bfd_reloc_type_lookup (abfd, code)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ unsigned int i;
+
+ for (i = 0;
+ i < sizeof (m68hc11_reloc_map) / sizeof (struct m68hc11_reloc_map);
+ i++)
+ {
+ if (m68hc11_reloc_map[i].bfd_reloc_val == code)
+ return &elf_m68hc11_howto_table[m68hc11_reloc_map[i].elf_reloc_val];
+ }
+
+ return NULL;
+}
+
+/* Set the howto pointer for an M68HC11 ELF reloc. */
+
+static void
+m68hc11_info_to_howto_rel (abfd, cache_ptr, dst)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ arelent *cache_ptr;
+ Elf32_Internal_Rel *dst;
+{
+ unsigned int r_type;
+
+ r_type = ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (r_type < (unsigned int) R_M68HC11_max);
+ cache_ptr->howto = &elf_m68hc11_howto_table[r_type];
+}
+
+/* Below is the only difference between elf32-m68hc12.c and elf32-m68hc11.c.
+ The Motorola spec says to use a different Elf machine code. */
+#define ELF_ARCH bfd_arch_m68hc11
+#define ELF_MACHINE_CODE EM_68HC11
+#define ELF_MAXPAGESIZE 0x1000
+
+#define TARGET_BIG_SYM bfd_elf32_m68hc11_vec
+#define TARGET_BIG_NAME "elf32-m68hc11"
+
+#define elf_info_to_howto 0
+#define elf_info_to_howto_rel m68hc11_info_to_howto_rel
+#define elf_backend_object_p 0
+#define elf_backend_final_write_processing 0
+
+#include "elf32-target.h"
diff --git a/bfd/elf32-m68hc12.c b/bfd/elf32-m68hc12.c
new file mode 100644
index 0000000000..b4db9bc58e
--- /dev/null
+++ b/bfd/elf32-m68hc12.c
@@ -0,0 +1,281 @@
+/* Motorola 68HC12-specific support for 32-bit ELF
+ Copyright (C) 1999, 2000 Free Software Foundation, Inc.
+ Contributed by Stephane Carrez (stcarrez@worldnet.fr)
+ (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/m68hc11.h"
+
+static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
+PARAMS ((bfd * abfd, bfd_reloc_code_real_type code));
+static void m68hc11_info_to_howto_rel
+PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
+
+
+/* Use REL instead of RELA to save space */
+#define USE_REL
+
+/* The Motorola 68HC11 microcontroler only addresses 64Kb.
+ We must handle 8 and 16-bit relocations. The 32-bit relocation
+ is defined but not used except by gas when -gstabs is used (which
+ is wrong).
+ The 3-bit and 16-bit PC rel relocation is only used by 68HC12. */
+static reloc_howto_type elf_m68hc11_howto_table[] = {
+ /* This reloc does nothing. */
+ HOWTO (R_M68HC11_NONE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_NONE", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation */
+ HOWTO (R_M68HC11_8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (upper address) */
+ HOWTO (R_M68HC11_HI8, /* type */
+ 8, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_HI8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (upper address) */
+ HOWTO (R_M68HC11_LO8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_LO8", /* name */
+ false, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 8 bit PC-rel relocation */
+ HOWTO (R_M68HC11_PCREL_8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_PCREL_8", /* name */
+ false, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0x00ff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 16 bit absolute relocation */
+ HOWTO (R_M68HC11_16, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont /*bitfield */ , /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_16", /* name */
+ false, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 32 bit absolute relocation. This one is never used for the
+ code relocation. It's used by gas for -gstabs generation. */
+ HOWTO (R_M68HC11_32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_32", /* name */
+ false, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 3 bit absolute relocation */
+ HOWTO (R_M68HC11_3B, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 3, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_4B", /* name */
+ false, /* partial_inplace */
+ 0x003, /* src_mask */
+ 0x003, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* A 16 bit PC-rel relocation */
+ HOWTO (R_M68HC11_PCREL_16, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC11_PCREL_16", /* name */
+ false, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0xffff, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* GNU extension to record C++ vtable hierarchy */
+ HOWTO (R_M68HC11_GNU_VTINHERIT, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ NULL, /* special_function */
+ "R_M68HC11_GNU_VTINHERIT", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ /* GNU extension to record C++ vtable member usage */
+ HOWTO (R_M68HC11_GNU_VTENTRY, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ _bfd_elf_rel_vtable_reloc_fn, /* special_function */
+ "R_M68HC11_GNU_VTENTRY", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+};
+
+/* Map BFD reloc types to M68HC11 ELF reloc types. */
+
+struct m68hc11_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_val;
+ unsigned char elf_reloc_val;
+};
+
+static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
+ {BFD_RELOC_NONE, R_M68HC11_NONE,},
+ {BFD_RELOC_8, R_M68HC11_8},
+ {BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8},
+ {BFD_RELOC_M68HC11_LO8, R_M68HC11_LO8},
+ {BFD_RELOC_8_PCREL, R_M68HC11_PCREL_8},
+ {BFD_RELOC_16_PCREL, R_M68HC11_PCREL_16},
+ {BFD_RELOC_16, R_M68HC11_16},
+ {BFD_RELOC_32, R_M68HC11_32},
+ {BFD_RELOC_M68HC11_3B, R_M68HC11_3B},
+
+ /* The following relocs are defined but they probably don't work yet. */
+ {BFD_RELOC_VTABLE_INHERIT, R_M68HC11_GNU_VTINHERIT},
+ {BFD_RELOC_VTABLE_ENTRY, R_M68HC11_GNU_VTENTRY},
+};
+
+static reloc_howto_type *
+bfd_elf32_bfd_reloc_type_lookup (abfd, code)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ unsigned int i;
+
+ for (i = 0;
+ i < sizeof (m68hc11_reloc_map) / sizeof (struct m68hc11_reloc_map);
+ i++)
+ {
+ if (m68hc11_reloc_map[i].bfd_reloc_val == code)
+ return &elf_m68hc11_howto_table[m68hc11_reloc_map[i].elf_reloc_val];
+ }
+
+ return NULL;
+}
+
+/* Set the howto pointer for an M68HC11 ELF reloc. */
+
+static void
+m68hc11_info_to_howto_rel (abfd, cache_ptr, dst)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ arelent *cache_ptr;
+ Elf32_Internal_Rel *dst;
+{
+ unsigned int r_type;
+
+ r_type = ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (r_type < (unsigned int) R_M68HC11_max);
+ cache_ptr->howto = &elf_m68hc11_howto_table[r_type];
+}
+
+/* Below is the only difference between elf32-m68hc12.c and elf32-m68hc11.c.
+ The Motorola spec says to use a different Elf machine code. */
+#define ELF_ARCH bfd_arch_m68hc12
+#define ELF_MACHINE_CODE EM_68HC12
+#define ELF_MAXPAGESIZE 0x1000
+
+#define TARGET_BIG_SYM bfd_elf32_m68hc12_vec
+#define TARGET_BIG_NAME "elf32-m68hc12"
+
+#define elf_info_to_howto 0
+#define elf_info_to_howto_rel m68hc11_info_to_howto_rel
+#define elf_backend_object_p 0
+#define elf_backend_final_write_processing 0
+
+#include "elf32-target.h"
diff --git a/bfd/elfcode.h b/bfd/elfcode.h
index b1ce9d820f..cd8e9a6a35 100644
--- a/bfd/elfcode.h
+++ b/bfd/elfcode.h
@@ -167,7 +167,7 @@ static void elf_swap_shdr_out
#define section_from_elf_index bfd_section_from_elf_index
-static boolean elf_slurp_reloc_table_from_section
+static boolean elf_slurp_reloc_table_from_section
PARAMS ((bfd *, asection *, Elf_Internal_Shdr *, bfd_size_type,
arelent *, asymbol **, boolean));
@@ -1224,7 +1224,7 @@ error_return:
return -1;
}
-/* Read relocations for ASECT from REL_HDR. There are RELOC_COUNT of
+/* Read relocations for ASECT from REL_HDR. There are RELOC_COUNT of
them. */
static boolean
@@ -1349,7 +1349,7 @@ elf_slurp_reloc_table (abfd, asect, symbols, dynamic)
rel_hdr = &d->rel_hdr;
reloc_count = rel_hdr->sh_size / rel_hdr->sh_entsize;
rel_hdr2 = d->rel_hdr2;
- reloc_count2 = (rel_hdr2
+ reloc_count2 = (rel_hdr2
? (rel_hdr2->sh_size / rel_hdr2->sh_entsize)
: 0);
@@ -1373,8 +1373,8 @@ elf_slurp_reloc_table (abfd, asect, symbols, dynamic)
reloc_count2 = 0;
}
- relents = ((arelent *)
- bfd_alloc (abfd,
+ relents = ((arelent *)
+ bfd_alloc (abfd,
(reloc_count + reloc_count2) * sizeof (arelent)));
if (relents == NULL)
return false;
@@ -1384,15 +1384,15 @@ elf_slurp_reloc_table (abfd, asect, symbols, dynamic)
relents,
symbols, dynamic))
return false;
-
- if (rel_hdr2
+
+ if (rel_hdr2
&& !elf_slurp_reloc_table_from_section (abfd, asect,
rel_hdr2, reloc_count2,
relents + reloc_count,
symbols, dynamic))
return false;
-
+
asect->relocation = relents;
return true;
}
diff --git a/bfd/elfcore.h b/bfd/elfcore.h
index ec03ec3f63..11bfeac734 100644
--- a/bfd/elfcore.h
+++ b/bfd/elfcore.h
@@ -99,9 +99,7 @@ elf_core_file_p (abfd)
/* Check the magic number. */
if (elf_file_p (&x_ehdr) == false)
- {
- goto wrong;
- }
+ goto wrong;
/* FIXME: Check EI_VERSION here ! */
diff --git a/bfd/elfxx-target.h b/bfd/elfxx-target.h
index b1f4867e56..3b9b434fcf 100644
--- a/bfd/elfxx-target.h
+++ b/bfd/elfxx-target.h
@@ -313,7 +313,6 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define elf_backend_hide_symbol _bfd_elf_link_hash_hide_symbol
#endif
-
/* Previously, backends could only use SHT_REL or SHT_RELA relocation
sections, but not both. They defined USE_REL to indicate SHT_REL
sections, and left it undefined to indicated SHT_RELA sections.
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index effb0e819b..d7e77308e1 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -965,6 +965,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_IA64_LTOFF_TP22",
"BFD_RELOC_IA64_LTOFF22X",
"BFD_RELOC_IA64_LDXMOV",
+ "BFD_RELOC_M68HC11_HI8",
+ "BFD_RELOC_M68HC11_LO8",
+ "BFD_RELOC_M68HC11_3B",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif
diff --git a/bfd/peicode.h b/bfd/peicode.h
index 56bc1c31d3..8f64453a3f 100644
--- a/bfd/peicode.h
+++ b/bfd/peicode.h
@@ -69,7 +69,6 @@ static boolean (*pe_saved_coff_bfd_print_private_bfd_data)
static boolean pe_print_private_bfd_data PARAMS ((bfd *, PTR));
#define coff_bfd_print_private_bfd_data pe_print_private_bfd_data
-
static boolean (*pe_saved_coff_bfd_copy_private_bfd_data)
PARAMS ((bfd *, bfd *)) =
#ifndef coff_bfd_copy_private_bfd_data
@@ -243,7 +242,6 @@ coff_swap_filehdr_in (abfd, src, dst)
#define coff_swap_filehdr_out _bfd_pe_only_swap_filehdr_out
#endif
-
static void
coff_swap_scnhdr_in (abfd, ext, in)
bfd *abfd;
diff --git a/bfd/po/POTFILES.in b/bfd/po/POTFILES.in
index 94b82823ee..aecb88ec78 100644
--- a/bfd/po/POTFILES.in
+++ b/bfd/po/POTFILES.in
@@ -1,14 +1,14 @@
aix386-core.c
+aout0.c
+aout32.c
+aout64.c
aout-adobe.c
aout-arm.c
+aoutf1.h
aout-ns32k.c
aout-sparcle.c
aout-target.h
aout-tic30.c
-aout0.c
-aout32.c
-aout64.c
-aoutf1.h
aoutx.h
archive.c
archures.c
@@ -21,17 +21,21 @@ cf-i386lynx.c
cf-m68klynx.c
cf-sparclynx.c
cisco-core.c
+coff64-rs6000.c
coff-a29k.c
coff-alpha.c
coff-apollo.c
coff-arm.c
coff-aux.c
+coffcode.h
+coffgen.c
coff-go32.c
coff-h8300.c
coff-h8500.c
coff-i386.c
coff-i860.c
coff-i960.c
+cofflink.c
coff-m68k.c
coff-m88k.c
coff-mips.c
@@ -41,21 +45,20 @@ coff-sh.c
coff-sparc.c
coff-stgo32.c
coff-svm68k.c
+coffswap.h
coff-tic30.c
+coff-tic54x.c
coff-tic80.c
coff-u68k.c
coff-w65.c
coff-we32k.c
coff-z8k.c
-coffcode.h
-coffgen.c
-cofflink.c
-coffswap.h
corefile.c
cpu-a29k.c
cpu-alpha.c
cpu-arc.c
cpu-arm.c
+cpu-avr.c
cpu-d10v.c
cpu-d30v.c
cpu-fr30.c
@@ -66,9 +69,12 @@ cpu-i370.c
cpu-i386.c
cpu-i860.c
cpu-i960.c
+cpu-ia64.c
cpu-m10200.c
cpu-m10300.c
cpu-m32r.c
+cpu-m68hc11.c
+cpu-m68hc12.c
cpu-m68k.c
cpu-m88k.c
cpu-mcore.c
@@ -80,6 +86,7 @@ cpu-rs6000.c
cpu-sh.c
cpu-sparc.c
cpu-tic30.c
+cpu-tic54x.c
cpu-tic80.c
cpu-v850.c
cpu-vax.c
@@ -92,21 +99,25 @@ dwarf2.c
ecoff.c
ecofflink.c
ecoffswap.h
-elf-bfd.h
-elf-m10200.c
-elf-m10300.c
-elf.c
+efi-app-ia32.c
+efi-app-ia64.c
elf32-arc.c
elf32-arm.h
+elf32-avr.c
+elf32.c
elf32-d10v.c
elf32-d30v.c
elf32-fr30.c
elf32-gen.c
+elf32-hppa.c
+elf32-hppa.h
elf32-i370.c
elf32-i386.c
elf32-i860.c
elf32-i960.c
elf32-m32r.c
+elf32-m68hc11.c
+elf32-m68hc12.c
elf32-m68k.c
elf32-m88k.c
elf32-mcore.c
@@ -116,20 +127,25 @@ elf32-ppc.c
elf32-sh.c
elf32-sparc.c
elf32-v850.c
-elf32.c
elf64-alpha.c
+elf64.c
elf64-gen.c
elf64-hppa.c
elf64-hppa.h
+elf64-ia64.c
elf64-mips.c
elf64-sparc.c
-elf64.c
elfarm-nabi.c
elfarm-oabi.c
+elf-bfd.h
+elf.c
elfcode.h
elfcore.h
+elf-hppa.h
elflink.c
elflink.h
+elf-m10200.c
+elf-m10300.c
epoc-pe-arm.c
epoc-pei-arm.c
format.c
@@ -139,6 +155,7 @@ go32stub.h
hash.c
hp300bsd.c
hp300hpux.c
+hppa_stubs.h
hpux-core.c
i386aout.c
i386bsd.c
@@ -174,16 +191,16 @@ m88kmach3.c
mipsbsd.c
netbsd.h
newsos3.c
-nlm-target.h
-nlm.c
nlm32-alpha.c
+nlm32.c
nlm32-i386.c
nlm32-ppc.c
nlm32-sparc.c
-nlm32.c
nlm64.c
+nlm.c
nlmcode.h
nlmswap.h
+nlm-target.h
ns32k.h
ns32knetbsd.c
oasys.c
@@ -192,17 +209,21 @@ osf-core.c
pc532-mach.c
pe-arm.c
pe-i386.c
-pe-mcore.c
-pe-ppc.c
pei-arm.c
+peicode.h
+peigen.c
pei-i386.c
pei-mcore.c
+pei-mips.c
pei-ppc.c
-peicode.h
-peigen.c
+pei-sh.c
+pe-mcore.c
+pe-mips.c
+pe-ppc.c
+pe-sh.c
ppcboot.c
-reloc.c
reloc16.c
+reloc.c
riscix.c
sco5-core.c
section.c
@@ -212,8 +233,8 @@ sparclinux.c
sparclynx.c
sparcnetbsd.c
srec.c
-stab-syms.c
stabs.c
+stab-syms.c
sunos.c
syms.c
targets.c
@@ -221,10 +242,11 @@ tekhex.c
trad-core.c
vaxnetbsd.c
versados.c
+vms.c
vms-gsd.c
+vms.h
vms-hdr.c
vms-misc.c
vms-tir.c
-vms.c
-vms.h
xcofflink.c
+xcoff-target.h
diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot
index 10ce3220b9..3275437c3a 100644
--- a/bfd/po/bfd.pot
+++ b/bfd/po/bfd.pot
@@ -6,7 +6,7 @@
msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
-"POT-Creation-Date: 2000-04-04 23:18+0930\n"
+"POT-Creation-Date: 2000-06-18 17:36-0700\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@@ -39,16 +39,16 @@ msgstr ""
msgid "%s: relocateable link from %s to %s not supported"
msgstr ""
-#: archive.c:1724
+#: archive.c:1808
msgid "Warning: writing archive was slow: rewriting timestamp\n"
msgstr ""
-#: archive.c:1990
+#: archive.c:2074
msgid "Reading archive file mod timestamp"
msgstr ""
#. FIXME: bfd can't call perror.
-#: archive.c:2014
+#: archive.c:2098
msgid "Writing updated armap timestamp"
msgstr ""
@@ -176,7 +176,7 @@ msgstr ""
msgid "GP relative relocation used when GP not defined"
msgstr ""
-#: coff-alpha.c:1486 elf64-alpha.c:3990
+#: coff-alpha.c:1486 elf64-alpha.c:3993
msgid "using multiple gp values"
msgstr ""
@@ -213,7 +213,7 @@ msgstr ""
msgid " consider relinking with --support-old-code enabled"
msgstr ""
-#: coff-arm.c:1722 coff-tic80.c:682 cofflink.c:2980
+#: coff-arm.c:1722 coff-tic80.c:682 cofflink.c:2979
#, c-format
msgid "%s: bad reloc address 0x%lx in section `%s'"
msgstr ""
@@ -271,19 +271,19 @@ msgstr ""
msgid "private flags = %x:"
msgstr ""
-#: coff-arm.c:2293 elf32-arm.h:2089
+#: coff-arm.c:2293 elf32-arm.h:2142
msgid " [floats passed in float registers]"
msgstr ""
-#: coff-arm.c:2295 elf32-arm.h:2091
+#: coff-arm.c:2295
msgid " [floats passed in integer registers]"
msgstr ""
-#: coff-arm.c:2298 elf32-arm.h:2094
+#: coff-arm.c:2298 elf32-arm.h:2145
msgid " [position independent]"
msgstr ""
-#: coff-arm.c:2300 elf32-arm.h:2096
+#: coff-arm.c:2300
msgid " [absolute position]"
msgstr ""
@@ -311,144 +311,154 @@ msgstr ""
msgid "Warning: Clearing the interworking flag of %s due to outside request"
msgstr ""
-#: coff-i960.c:136 coff-i960.c:485
-msgid "uncertain calling convention for non-COFF symbol"
-msgstr ""
-
-#: coff-mips.c:875 elf32-mips.c:1406
-msgid "GP relative relocation when _gp not defined"
-msgstr ""
-
-#: coff-mips.c:2433
-msgid "unsupported reloc type"
-msgstr ""
-
-#. No other sections should appear in -membedded-pic
-#. code.
-#: coff-mips.c:2470
-msgid "reloc against unsupported section"
-msgstr ""
-
-#: coff-mips.c:2478
-msgid "reloc not properly aligned"
-msgstr ""
-
-#: coff-tic80.c:445
+#: coffcode.h:2101
#, c-format
-msgid "Unrecognized reloc type 0x%x"
+msgid "Unrecognized TI COFF target id '0x%x'"
msgstr ""
-#: coff-w65.c:383
-#, c-format
-msgid "ignoring reloc %s\n"
-msgstr ""
-
-#: coffcode.h:3965
+#: coffcode.h:4121
#, c-format
msgid "%s: warning: illegal symbol index %ld in line numbers"
msgstr ""
-#: coffcode.h:3979
+#: coffcode.h:4135
#, c-format
msgid "%s: warning: duplicate line number information for `%s'"
msgstr ""
-#: coffcode.h:4334
+#: coffcode.h:4495
#, c-format
msgid "%s: Unrecognized storage class %d for %s symbol `%s'"
msgstr ""
-#: coffcode.h:4465
+#: coffcode.h:4626
#, c-format
msgid "warning: %s: local symbol `%s' has no section"
msgstr ""
-#: coffcode.h:4578
+#: coff-tic54x.c:377 coffcode.h:4739
#, c-format
msgid "%s: warning: illegal symbol index %ld in relocs"
msgstr ""
-#: coffcode.h:4616
+#: coffcode.h:4777
#, c-format
msgid "%s: illegal relocation type %d at address 0x%lx"
msgstr ""
-#: coffgen.c:1613
+#: coffgen.c:1635
#, c-format
msgid "%s: bad string table size %lu"
msgstr ""
-#: coffgen.c:2076
+#: coffgen.c:2098
#, c-format
msgid "AUX tagndx %ld ttlsiz 0x%lx lnnos %ld next %ld"
msgstr ""
-#: cofflink.c:518 elflink.h:1568
+#: coff-i960.c:136 coff-i960.c:485
+msgid "uncertain calling convention for non-COFF symbol"
+msgstr ""
+
+#: cofflink.c:518 elflink.h:1567
#, c-format
msgid "Warning: type of symbol `%s' changed from %d to %d in %s"
msgstr ""
-#: cofflink.c:2285
+#: cofflink.c:2284
#, c-format
msgid "%s: relocs in section `%s', but it has no contents"
msgstr ""
-#: cofflink.c:2619 coffswap.h:904
+#: cofflink.c:2618 coffswap.h:897
#, c-format
msgid "%s: %s: reloc overflow: 0x%lx > 0xffff"
msgstr ""
-#: cofflink.c:2628 coffswap.h:891
+#: cofflink.c:2627 coffswap.h:883
#, c-format
msgid "%s: warning: %s: line number overflow: 0x%lx > 0xffff"
msgstr ""
-#: dwarf2.c:429
+#: coff-mips.c:875 elf32-mips.c:1406
+msgid "GP relative relocation when _gp not defined"
+msgstr ""
+
+#: coff-mips.c:2433
+msgid "unsupported reloc type"
+msgstr ""
+
+#. No other sections should appear in -membedded-pic
+#. code.
+#: coff-mips.c:2470
+msgid "reloc against unsupported section"
+msgstr ""
+
+#: coff-mips.c:2478
+msgid "reloc not properly aligned"
+msgstr ""
+
+#: coff-tic54x.c:264 coff-tic80.c:445
+#, c-format
+msgid "Unrecognized reloc type 0x%x"
+msgstr ""
+
+#: coff-w65.c:383
+#, c-format
+msgid "ignoring reloc %s\n"
+msgstr ""
+
+#: dwarf2.c:432
msgid "Dwarf Error: Can't find .debug_abbrev section."
msgstr ""
-#: dwarf2.c:447
+#: dwarf2.c:450
#, c-format
msgid "Dwarf Error: Abbrev offset (%u) bigger than abbrev size (%u)."
msgstr ""
-#: dwarf2.c:627
+#: dwarf2.c:630
#, c-format
msgid "Dwarf Error: Invalid or unhandled FORM value: %d."
msgstr ""
-#: dwarf2.c:700
+#: dwarf2.c:704
msgid "Dwarf Error: mangled line number section (bad file number)."
msgstr ""
-#: dwarf2.c:791
+#: dwarf2.c:793
msgid "Dwarf Error: Can't find .debug_line section."
msgstr ""
-#: dwarf2.c:963
+#: dwarf2.c:817
+#, c-format
+msgid "Dwarf Error: Line offset (%u) bigger than line size (%u)."
+msgstr ""
+
+#: dwarf2.c:976
msgid "Dwarf Error: mangled line number section."
msgstr ""
-#: dwarf2.c:1151 dwarf2.c:1307
+#: dwarf2.c:1164 dwarf2.c:1320
#, c-format
msgid "Dwarf Error: Could not find abbrev number %d."
msgstr ""
-#: dwarf2.c:1268
+#: dwarf2.c:1281
#, c-format
msgid ""
"Dwarf Error: found dwarf version '%hu', this reader only handles version 2 "
"information."
msgstr ""
-#: dwarf2.c:1275
+#: dwarf2.c:1288
#, c-format
msgid ""
"Dwarf Error: found address size '%u', this reader can not handle sizes "
"greater than '%u'."
msgstr ""
-#: dwarf2.c:1298
+#: dwarf2.c:1311
#, c-format
msgid "Dwarf Error: Bad abbrev number: %d."
msgstr ""
@@ -514,230 +524,185 @@ msgid ""
" Type: %s"
msgstr ""
-#: elf-m10200.c:455 elf-m10300.c:670 elf32-arm.h:1853 elf32-d10v.c:493
-#: elf32-fr30.c:651 elf32-m32r.c:1265 elf32-v850.c:1677
-msgid "internal error: out of range error"
-msgstr ""
-
-#: elf-m10200.c:459 elf-m10300.c:674 elf32-arm.h:1857 elf32-d10v.c:497
-#: elf32-fr30.c:655 elf32-m32r.c:1269 elf32-v850.c:1681
-msgid "internal error: unsupported relocation error"
-msgstr ""
-
-#: elf-m10200.c:463 elf-m10300.c:678 elf32-arm.h:1861 elf32-d10v.c:501
-#: elf32-m32r.c:1273
-msgid "internal error: dangerous error"
-msgstr ""
-
-#: elf-m10200.c:467 elf-m10300.c:682 elf32-arm.h:1865 elf32-d10v.c:505
-#: elf32-fr30.c:663 elf32-m32r.c:1277 elf32-v850.c:1701
-msgid "internal error: unknown error"
-msgstr ""
-
-#: elf.c:323
-#, c-format
-msgid "%s: invalid string offset %u >= %lu for section `%s'"
-msgstr ""
-
-#: elf.c:546
-msgid ""
-"\n"
-"Program Header:\n"
-msgstr ""
-
-#: elf.c:594
-msgid ""
-"\n"
-"Dynamic Section:\n"
-msgstr ""
-
-#: elf.c:696
-msgid ""
-"\n"
-"Version definitions:\n"
-msgstr ""
-
-#: elf.c:719
-msgid ""
-"\n"
-"Version References:\n"
-msgstr ""
-
-#: elf.c:724
+#: elf32-arm.h:1188
#, c-format
-msgid " required from %s:\n"
+msgid "%s: Warning: Arm BLX instruction targets Arm function '%s'."
msgstr ""
-#: elf.c:1286
+#: elf32-arm.h:1377
#, c-format
-msgid "%s: invalid link %lu for reloc section %s (index %u)"
+msgid "%s: Warning: Thumb BLX instruction targets thumb function '%s'."
msgstr ""
-#: elf.c:2045
+#: elf-hppa.h:1329 elf-hppa.h:1362 elf32-arm.h:1825 elf32-i386.c:1418
+#: elf32-ppc.c:3082
#, c-format
msgid ""
-"creating section symbol, name = %s, value = 0x%.8lx, index = %d, section = "
-"0x%.8lx\n"
-msgstr ""
-
-#: elf.c:2648
-#, c-format
-msgid "%s: Not enough room for program headers (allocated %u, need %u)"
-msgstr ""
-
-#: elf.c:2747
-#, c-format
-msgid "%s: Not enough room for program headers, try linking with -N"
-msgstr ""
-
-#: elf.c:2873
-#, c-format
-msgid "Error: First section in segment (%s) starts at 0x%x"
-msgstr ""
-
-#: elf.c:2876
-#, c-format
-msgid " whereas segment starts at 0x%x"
-msgstr ""
-
-#: elf.c:3146
-#, c-format
-msgid "%s: warning: allocated section `%s' not in segment"
-msgstr ""
-
-#: elf.c:3528
-#, c-format
-msgid "%s: symbol `%s' required but not present"
+"%s: warning: unresolvable relocation against symbol `%s' from %s section"
msgstr ""
-#: elf.c:3537
-#, c-format
-msgid ""
-"elf_symbol_from_bfd_symbol 0x%.8lx, name = %s, sym num = %d, flags = "
-"0x%.8lx%s\n"
+#: elf-m10200.c:455 elf-m10300.c:670 elf32-arm.h:1894 elf32-avr.c:844
+#: elf32-d10v.c:479 elf32-fr30.c:651 elf32-m32r.c:1265 elf32-v850.c:1677
+msgid "internal error: out of range error"
msgstr ""
-#: elf.c:3679
-#, c-format
-msgid "%s: warning: Empty loadable segment detected\n"
+#: elf-m10200.c:459 elf-m10300.c:674 elf32-arm.h:1898 elf32-avr.c:848
+#: elf32-d10v.c:483 elf32-fr30.c:655 elf32-m32r.c:1269 elf32-v850.c:1681
+msgid "internal error: unsupported relocation error"
msgstr ""
-#: elf.c:4956
-#, c-format
-msgid "%s: unsupported relocation type %s"
+#: elf-m10200.c:463 elf-m10300.c:678 elf32-arm.h:1902 elf32-d10v.c:487
+#: elf32-m32r.c:1273
+msgid "internal error: dangerous error"
msgstr ""
-#: elf32-arm.h:1787 elf32-i386.c:1304 elf32-ppc.c:3092
-#, c-format
-msgid ""
-"%s: warning: unresolvable relocation against symbol `%s' from %s section"
+#: elf-m10200.c:467 elf-m10300.c:682 elf32-arm.h:1906 elf32-avr.c:856
+#: elf32-d10v.c:491 elf32-fr30.c:663 elf32-m32r.c:1277 elf32-v850.c:1701
+msgid "internal error: unknown error"
msgstr ""
-#: elf32-arm.h:1891
+#: elf32-arm.h:1934
#, c-format
msgid ""
"Warning: Not setting interwork flag of %s since it has already been "
"specified as non-interworking"
msgstr ""
-#: elf32-arm.h:1895
+#: elf32-arm.h:1938
#, c-format
msgid "Warning: Clearing the interwork flag of %s due to outside request"
msgstr ""
-#: elf32-arm.h:1943
+#: elf32-arm.h:1989
#, c-format
msgid ""
"Warning: Clearing the interwork flag in %s because non-interworking code in "
"%s has been linked with it"
msgstr ""
-#: elf32-arm.h:1977
+#: elf32-arm.h:2058
#, c-format
-msgid "%s: compiled for a %s endian system and target is %s endian"
+msgid ""
+"Error: %s compiled for EABI version %d, whereas %s is compiled for version %d"
msgstr ""
-#: elf32-arm.h:2023
+#: elf32-arm.h:2070
#, c-format
msgid "Error: %s compiled for APCS-%d, whereas %s is compiled for APCS-%d"
msgstr ""
-#: elf32-arm.h:2031
+#: elf32-arm.h:2078
#, c-format
msgid ""
"Error: %s passes floats in %s registers, whereas %s passes them in %s "
"registers"
msgstr ""
-#: elf32-arm.h:2034 elf32-arm.h:2036
+#: elf32-arm.h:2081 elf32-arm.h:2083
msgid "float"
msgstr ""
-#: elf32-arm.h:2034 elf32-arm.h:2036
+#: elf32-arm.h:2081 elf32-arm.h:2083
msgid "integer"
msgstr ""
-#: elf32-arm.h:2039
+#: elf32-arm.h:2086
#, c-format
msgid "Error: %s is compiled as position %s code, whereas %s is not"
msgstr ""
-#: elf32-arm.h:2042
+#: elf32-arm.h:2089
msgid "independent"
msgstr ""
-#: elf32-arm.h:2042
+#: elf32-arm.h:2089
msgid "dependent"
msgstr ""
-#: elf32-arm.h:2048
+#: elf32-arm.h:2095
#, c-format
msgid "Warning: %s %s interworking, whereas %s %s"
msgstr ""
-#: elf32-arm.h:2051
+#: elf32-arm.h:2098
msgid "supports"
msgstr ""
-#: elf32-arm.h:2051
+#: elf32-arm.h:2098
msgid "does not support"
msgstr ""
-#: elf32-arm.h:2053
+#: elf32-arm.h:2100
msgid "does not"
msgstr ""
-#: elf32-arm.h:2053
+#: elf32-arm.h:2100
msgid "does"
msgstr ""
#. Ignore init flag - it may not be set, despite the flags field containing valid data.
-#: elf32-arm.h:2076 elf32-m68k.c:430 elf32-mips.c:2634
+#: elf32-arm.h:2125 elf32-m68k.c:430 elf32-mips.c:2621
#, c-format
msgid "private flags = %lx:"
msgstr ""
-#: elf32-arm.h:2079
+#: elf32-arm.h:2134
msgid " [interworking enabled]"
msgstr ""
-#: elf32-arm.h:2081
-msgid " [interworking not enabled]"
-msgstr ""
-
-#: elf32-arm.h:2084
+#: elf32-arm.h:2137
msgid " [APCS-26]"
msgstr ""
-#: elf32-arm.h:2086
+#: elf32-arm.h:2139
msgid " [APCS-32]"
msgstr ""
-#: elf32-fr30.c:659 elf32-v850.c:1685
+#: elf32-arm.h:2148
+msgid " [new ABI]"
+msgstr ""
+
+#: elf32-arm.h:2151
+msgid " [old ABI]"
+msgstr ""
+
+#: elf32-arm.h:2154
+msgid " [software FP]"
+msgstr ""
+
+#: elf32-arm.h:2161
+msgid " [Version1 EABI]"
+msgstr ""
+
+#: elf32-arm.h:2164
+msgid " [sorted symbol table]"
+msgstr ""
+
+#: elf32-arm.h:2166
+msgid " [unsorted symbol table]"
+msgstr ""
+
+#: elf32-arm.h:2172
+msgid " <EABI version unrecognised>"
+msgstr ""
+
+#: elf32-arm.h:2179
+msgid " [relocatable executable]"
+msgstr ""
+
+#: elf32-arm.h:2182
+msgid " [has entry point]"
+msgstr ""
+
+#: elf32-arm.h:2187
+msgid "<Unrecognised flag bits set>"
+msgstr ""
+
+#: elf32-avr.c:852 elf32-fr30.c:659 elf32-v850.c:1685
msgid "internal error: dangerous relocation"
msgstr ""
-#: elf32-i386.c:239
+#: elf32-i386.c:274
#, c-format
msgid "%s: invalid relocation type %d"
msgstr ""
@@ -746,7 +711,7 @@ msgstr ""
msgid "SDA relocation when _SDA_BASE_ not defined"
msgstr ""
-#: elf32-m32r.c:1000 elf32-ppc.c:2963
+#: elf32-m32r.c:1000 elf32-ppc.c:2950 elf64-ia64.c:3185
#, c-format
msgid "%s: unknown relocation type %d"
msgstr ""
@@ -778,17 +743,12 @@ msgstr ""
msgid " [cpu32]"
msgstr ""
-#: elf32-mcore.c:329
-#, c-format
-msgid "%s: compiled for a %s endian system and target is %s endian.\n"
-msgstr ""
-
-#: elf32-mcore.c:377 elf32-mcore.c:504
+#: elf32-mcore.c:367 elf32-mcore.c:494
#, c-format
msgid "%s: Relocation %s (%d) is not currently supported.\n"
msgstr ""
-#: elf32-mcore.c:463
+#: elf32-mcore.c:453
#, c-format
msgid "%s: Unknown relocation type %d\n"
msgstr ""
@@ -802,228 +762,218 @@ msgstr ""
msgid "Linking mips16 objects into %s format is not supported"
msgstr ""
-#: elf32-mips.c:2469 elf32-ppc.c:1408
-#, c-format
-msgid "%s: compiled for a big endian system and target is little endian"
-msgstr ""
-
-#: elf32-mips.c:2471 elf32-ppc.c:1410
-#, c-format
-msgid "%s: compiled for a little endian system and target is big endian"
-msgstr ""
-
-#: elf32-mips.c:2520
+#: elf32-mips.c:2507
#, c-format
msgid "%s: linking PIC files with non-PIC files"
msgstr ""
-#: elf32-mips.c:2530
+#: elf32-mips.c:2517
#, c-format
msgid "%s: linking abicalls files with non-abicalls files"
msgstr ""
-#: elf32-mips.c:2560
+#: elf32-mips.c:2547
#, c-format
msgid "%s: ISA mismatch (-mips%d) with previous modules (-mips%d)"
msgstr ""
-#: elf32-mips.c:2569
+#: elf32-mips.c:2556
#, c-format
msgid "%s: ISA mismatch (%d) with previous modules (%d)"
msgstr ""
-#: elf32-mips.c:2592
+#: elf32-mips.c:2579
#, c-format
msgid "%s: ABI mismatch: linking %s module with previous %s modules"
msgstr ""
-#: elf32-mips.c:2606 elf32-ppc.c:1477 elf64-sparc.c:2844
+#: elf32-mips.c:2593 elf32-ppc.c:1464 elf64-sparc.c:2957
#, c-format
msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"
msgstr ""
-#: elf32-mips.c:2637
+#: elf32-mips.c:2624
msgid " [abi=O32]"
msgstr ""
-#: elf32-mips.c:2639
+#: elf32-mips.c:2626
msgid " [abi=O64]"
msgstr ""
-#: elf32-mips.c:2641
+#: elf32-mips.c:2628
msgid " [abi=EABI32]"
msgstr ""
-#: elf32-mips.c:2643
+#: elf32-mips.c:2630
msgid " [abi=EABI64]"
msgstr ""
-#: elf32-mips.c:2645
+#: elf32-mips.c:2632
msgid " [abi unknown]"
msgstr ""
-#: elf32-mips.c:2647
+#: elf32-mips.c:2634
msgid " [abi=N32]"
msgstr ""
-#: elf32-mips.c:2649
+#: elf32-mips.c:2636
msgid " [abi=64]"
msgstr ""
-#: elf32-mips.c:2651
+#: elf32-mips.c:2638
msgid " [no abi set]"
msgstr ""
-#: elf32-mips.c:2654
+#: elf32-mips.c:2641
msgid " [mips1]"
msgstr ""
-#: elf32-mips.c:2656
+#: elf32-mips.c:2643
msgid " [mips2]"
msgstr ""
-#: elf32-mips.c:2658
+#: elf32-mips.c:2645
msgid " [mips3]"
msgstr ""
-#: elf32-mips.c:2660
+#: elf32-mips.c:2647
msgid " [mips4]"
msgstr ""
-#: elf32-mips.c:2662
+#: elf32-mips.c:2649
msgid " [unknown ISA]"
msgstr ""
-#: elf32-mips.c:2665
+#: elf32-mips.c:2652
msgid " [32bitmode]"
msgstr ""
-#: elf32-mips.c:2667
+#: elf32-mips.c:2654
msgid " [not 32bitmode]"
msgstr ""
-#: elf32-mips.c:4270
+#: elf32-mips.c:4257
msgid "static procedure (no name)"
msgstr ""
-#: elf32-mips.c:4887 elf64-alpha.c:4364
+#: elf32-mips.c:4874 elf64-alpha.c:4367
#, c-format
msgid "%s: illegal section name `%s'"
msgstr ""
-#: elf32-mips.c:5414
+#: elf32-mips.c:5401
msgid "not enough GOT space for local GOT entries"
msgstr ""
-#: elf32-mips.c:6493
+#: elf32-mips.c:6495
#, c-format
msgid "%s: %s+0x%lx: jump to stub routine which is not jal"
msgstr ""
-#: elf32-mips.c:7521
+#: elf32-mips.c:7523
#, c-format
msgid "%s: CALL16 reloc at 0x%lx not against global symbol"
msgstr ""
-#: elf32-ppc.c:1443
+#: elf32-ppc.c:1430
#, c-format
msgid ""
"%s: compiled with -mrelocatable and linked with modules compiled normally"
msgstr ""
-#: elf32-ppc.c:1451
+#: elf32-ppc.c:1438
#, c-format
msgid ""
"%s: compiled normally and linked with modules compiled with -mrelocatable"
msgstr ""
-#: elf32-ppc.c:1578
+#: elf32-ppc.c:1565
#, c-format
msgid "%s: Unknown special linker type %d"
msgstr ""
-#: elf32-ppc.c:2251 elf32-ppc.c:2285 elf32-ppc.c:2320
+#: elf32-ppc.c:2238 elf32-ppc.c:2272 elf32-ppc.c:2307
#, c-format
msgid "%s: relocation %s cannot be used when making a shared object"
msgstr ""
-#: elf32-ppc.c:3123
+#: elf32-ppc.c:3116
#, c-format
msgid "%s: unknown relocation type %d for symbol %s"
msgstr ""
-#: elf32-ppc.c:3491 elf32-ppc.c:3513 elf32-ppc.c:3562
+#: elf32-ppc.c:3484 elf32-ppc.c:3506 elf32-ppc.c:3555
#, c-format
msgid ""
"%s: The target (%s) of a %s relocation is in the wrong output section (%s)"
msgstr ""
-#: elf32-ppc.c:3628
+#: elf32-ppc.c:3621
#, c-format
msgid "%s: Relocation %s is not yet supported for symbol %s."
msgstr ""
-#: elf32-sh.c:681
+#: elf32-sh.c:819
#, c-format
msgid "%s: 0x%lx: warning: bad R_SH_USES offset"
msgstr ""
-#: elf32-sh.c:693
+#: elf32-sh.c:831
#, c-format
msgid "%s: 0x%lx: warning: R_SH_USES points to unrecognized insn 0x%x"
msgstr ""
-#: elf32-sh.c:710
+#: elf32-sh.c:848
#, c-format
msgid "%s: 0x%lx: warning: bad R_SH_USES load offset"
msgstr ""
-#: elf32-sh.c:725
+#: elf32-sh.c:863
#, c-format
msgid "%s: 0x%lx: warning: could not find expected reloc"
msgstr ""
-#: elf32-sh.c:762
+#: elf32-sh.c:900
#, c-format
msgid "%s: 0x%lx: warning: symbol in unexpected section"
msgstr ""
-#: elf32-sh.c:884
+#: elf32-sh.c:1022
#, c-format
msgid "%s: 0x%lx: warning: could not find expected COUNT reloc"
msgstr ""
-#: elf32-sh.c:893
+#: elf32-sh.c:1031
#, c-format
msgid "%s: 0x%lx: warning: bad count"
msgstr ""
-#: elf32-sh.c:1279 elf32-sh.c:1666
+#: elf32-sh.c:1424 elf32-sh.c:1811
#, c-format
msgid "%s: 0x%lx: fatal: reloc overflow while relaxing"
msgstr ""
-#: elf32-sparc.c:1486 elf64-sparc.c:2242
+#: elf32-sparc.c:1509 elf64-sparc.c:2262
#, c-format
msgid "%s: probably compiled without -fPIC?"
msgstr ""
-#: elf32-sparc.c:1856
+#: elf32-sparc.c:1970
#, c-format
msgid "%s: compiled for a v8plus system and target is v8"
msgstr ""
-#: elf32-sparc.c:1865
+#: elf32-sparc.c:1979
#, c-format
msgid "%s: compiled for a v8plusa system and target is v8plus"
msgstr ""
-#: elf32-sparc.c:1873
+#: elf32-sparc.c:1987
#, c-format
msgid "%s: compiled for a 64 bit system and target is 32 bit"
msgstr ""
-#: elf32-sparc.c:1888
+#: elf32-sparc.c:2002
#, c-format
msgid "%s: linking little endian files with big endian files"
msgstr ""
@@ -1104,77 +1054,227 @@ msgstr ""
msgid "%s: .got subsegment exceeds 64K (size %d)"
msgstr ""
-#: elf64-sparc.c:1249
+#: elf64-ia64.c:1826
+msgid "@pltoff reloc against local symbol"
+msgstr ""
+
+#: elf64-ia64.c:1873
+msgid "non-zero addend in @fptr reloc"
+msgstr ""
+
+#: elf64-ia64.c:3060
+#, c-format
+msgid "%s: short data segment overflowed (0x%lx >= 0x400000)"
+msgstr ""
+
+#: elf64-ia64.c:3071
+#, c-format
+msgid "%s: __gp does not cover short data segment"
+msgstr ""
+
+#: elf64-ia64.c:3335
+#, c-format
+msgid "%s: linking non-pic code in a shared library"
+msgstr ""
+
+#: elf64-ia64.c:3365
+#, c-format
+msgid "%s: @gprel relocation against dynamic symbol %s"
+msgstr ""
+
+#: elf64-ia64.c:3500
+#, c-format
+msgid "%s: dynamic relocation against speculation fixup"
+msgstr ""
+
+#: elf64-ia64.c:3508
+#, c-format
+msgid "%s: speculation fixup against undefined weak symbol"
+msgstr ""
+
+#: elf64-ia64.c:3665
+msgid "unsupported reloc"
+msgstr ""
+
+#: elf64-ia64.c:3979
+#, c-format
+msgid "%s: linking trap-on-NULL-dereference with non-trapping files"
+msgstr ""
+
+#: elf64-ia64.c:3988
+#, c-format
+msgid "%s: linking big-endian files with little-endian files"
+msgstr ""
+
+#: elf64-ia64.c:3997
+#, c-format
+msgid "%s: linking 64-bit files with 32-bit files"
+msgstr ""
+
+#: elf64-sparc.c:1250
#, c-format
msgid "%s: check_relocs: unhandled reloc type %d"
msgstr ""
-#: elf64-sparc.c:1286
+#: elf64-sparc.c:1287
msgid "%s: Only registers %%g[2367] can be declared using STT_REGISTER"
msgstr ""
-#: elf64-sparc.c:1306
+#: elf64-sparc.c:1307
msgid ""
"Register %%g%d used incompatibly: previously declared in %s to %s, in %s "
"redefined to %s"
msgstr ""
-#: elf64-sparc.c:1329
+#: elf64-sparc.c:1330
#, c-format
msgid "Symbol `%s' has differing types: previously %s, REGISTER in %s"
msgstr ""
-#: elf64-sparc.c:1375
+#: elf64-sparc.c:1376
#, c-format
msgid "Symbol `%s' has differing types: REGISTER in %s, %s in %s"
msgstr ""
-#: elf64-sparc.c:2825
+#: elf64-sparc.c:2938
#, c-format
msgid "%s: linking UltraSPARC specific with HAL specific code"
msgstr ""
-#: elfcode.h:1061
+#: elf.c:327
+#, c-format
+msgid "%s: invalid string offset %u >= %lu for section `%s'"
+msgstr ""
+
+#: elf.c:550
+msgid ""
+"\n"
+"Program Header:\n"
+msgstr ""
+
+#: elf.c:598
+msgid ""
+"\n"
+"Dynamic Section:\n"
+msgstr ""
+
+#: elf.c:700
+msgid ""
+"\n"
+"Version definitions:\n"
+msgstr ""
+
+#: elf.c:723
+msgid ""
+"\n"
+"Version References:\n"
+msgstr ""
+
+#: elf.c:728
+#, c-format
+msgid " required from %s:\n"
+msgstr ""
+
+#: elf.c:1292
+#, c-format
+msgid "%s: invalid link %lu for reloc section %s (index %u)"
+msgstr ""
+
+#: elf.c:2069
+#, c-format
+msgid ""
+"creating section symbol, name = %s, value = 0x%.8lx, index = %d, section = "
+"0x%.8lx\n"
+msgstr ""
+
+#: elf.c:2672
+#, c-format
+msgid "%s: Not enough room for program headers (allocated %u, need %u)"
+msgstr ""
+
+#: elf.c:2771
+#, c-format
+msgid "%s: Not enough room for program headers, try linking with -N"
+msgstr ""
+
+#: elf.c:2897
+#, c-format
+msgid "Error: First section in segment (%s) starts at 0x%x"
+msgstr ""
+
+#: elf.c:2900
+#, c-format
+msgid " whereas segment starts at 0x%x"
+msgstr ""
+
+#: elf.c:3173
+#, c-format
+msgid "%s: warning: allocated section `%s' not in segment"
+msgstr ""
+
+#: elf.c:3564
+#, c-format
+msgid "%s: symbol `%s' required but not present"
+msgstr ""
+
+#: elf.c:3573
+#, c-format
+msgid ""
+"elf_symbol_from_bfd_symbol 0x%.8lx, name = %s, sym num = %d, flags = "
+"0x%.8lx%s\n"
+msgstr ""
+
+#: elf.c:3715
+#, c-format
+msgid "%s: warning: Empty loadable segment detected\n"
+msgstr ""
+
+#: elf.c:5030
+#, c-format
+msgid "%s: unsupported relocation type %s"
+msgstr ""
+
+#: elfcode.h:1059
#, c-format
msgid "%s: version count (%ld) does not match symbol count (%ld)"
msgstr ""
-#: elflink.c:423
+#: elflink.c:416
#, c-format
msgid "%s: Section %s is already to large to put hole of %ld bytes in"
msgstr ""
-#: elflink.h:1388
+#: elflink.h:1387
#, c-format
msgid "%s: %s: invalid version %u (max %d)"
msgstr ""
-#: elflink.h:1429
+#: elflink.h:1428
#, c-format
msgid "%s: %s: invalid needed version %d"
msgstr ""
-#: elflink.h:1546
+#: elflink.h:1545
#, c-format
msgid "Warning: size of symbol `%s' changed from %lu to %lu in %s"
msgstr ""
-#: elflink.h:1790
+#: elflink.h:1789
#, c-format
msgid "%s: warning: unexpected redefinition of `%s'"
msgstr ""
-#: elflink.h:3480
+#: elflink.h:3496
#, c-format
msgid "warning: type and size of dynamic symbol `%s' are not defined"
msgstr ""
-#: elflink.h:3752
+#: elflink.h:3768
#, c-format
msgid "%s: undefined versioned symbol name %s"
msgstr ""
-#: elflink.h:4983
+#: elflink.h:5012
#, c-format
msgid "%s: could not find output section %s for input section %s"
msgstr ""
@@ -1283,6 +1383,16 @@ msgstr ""
msgid "not mapping: env var not set\n"
msgstr ""
+#: libbfd.c:1315
+#, c-format
+msgid "%s: compiled for a big endian system and target is little endian"
+msgstr ""
+
+#: libbfd.c:1317
+#, c-format
+msgid "%s: compiled for a little endian system and target is big endian"
+msgstr ""
+
#: linker.c:2679
#, c-format
msgid "Attempt to do relocateable link with %s input and %s output"
@@ -1299,330 +1409,328 @@ msgid "Unhandled OSF/1 core file section type %d\n"
msgstr ""
#. XXX code yet to be written.
-#: peicode.h:806
+#: peicode.h:804
#, c-format
msgid "%s: Unhandled import type; %x"
msgstr ""
-#: peicode.h:811
+#: peicode.h:809
#, c-format
msgid "%s: Unrecognised import type; %x"
msgstr ""
-#: peicode.h:825
+#: peicode.h:823
#, c-format
msgid "%s: Unrecognised import name type; %x"
msgstr ""
-#: peicode.h:1182
+#: peicode.h:1180
#, c-format
msgid "%s: Unrecognised machine type (0x%x) in Import Library Format archive"
msgstr ""
-#: peicode.h:1194
+#: peicode.h:1192
#, c-format
msgid ""
"%s: Recognised but unhandled machine type (0x%x) in Import Library Format "
"archive"
msgstr ""
-#: peicode.h:1211
+#: peicode.h:1209
#, c-format
msgid "%s: size field is zero in Import Library Format header"
msgstr ""
-#: peicode.h:1239
+#: peicode.h:1237
#, c-format
msgid "%s: string not null terminated in ILF object file."
msgstr ""
-#: peigen.c:938
+#: peigen.c:968
#, c-format
msgid "%s: line number overflow: 0x%lx > 0xffff"
msgstr ""
-#: peigen.c:950
+#: peigen.c:980
#, c-format
msgid "%s: reloc overflow: 0x%lx > 0xffff"
msgstr ""
-#: peigen.c:963
+#: peigen.c:993
msgid "Export Directory [.edata (or where ever we found it)]"
msgstr ""
-#: peigen.c:964
+#: peigen.c:994
msgid "Import Directory [parts of .idata]"
msgstr ""
-#: peigen.c:965
+#: peigen.c:995
msgid "Resource Directory [.rsrc]"
msgstr ""
-#: peigen.c:966
+#: peigen.c:996
msgid "Exception Directory [.pdata]"
msgstr ""
-#: peigen.c:967
+#: peigen.c:997
msgid "Security Directory"
msgstr ""
-#: peigen.c:968
+#: peigen.c:998
msgid "Base Relocation Directory [.reloc]"
msgstr ""
-#: peigen.c:969
+#: peigen.c:999
msgid "Debug Directory"
msgstr ""
-#: peigen.c:970
+#: peigen.c:1000
msgid "Description Directory"
msgstr ""
-#: peigen.c:971
+#: peigen.c:1001
msgid "Special Directory"
msgstr ""
-#: peigen.c:972
+#: peigen.c:1002
msgid "Thread Storage Directory [.tls]"
msgstr ""
-#: peigen.c:973
+#: peigen.c:1003
msgid "Load Configuration Directory"
msgstr ""
-#: peigen.c:974
+#: peigen.c:1004
msgid "Bound Import Directory"
msgstr ""
-#: peigen.c:975
+#: peigen.c:1005
msgid "Import Address Table Directory"
msgstr ""
-#: peigen.c:976 peigen.c:977 peigen.c:978
-msgid "Reserved"
+#: peigen.c:1006
+msgid "Delay Import Directory"
msgstr ""
-#: peigen.c:1022
-msgid ""
-"\n"
-"The import table is the .idata section\n"
+#: peigen.c:1007 peigen.c:1008
+msgid "Reserved"
msgstr ""
-#: peigen.c:1044
+#: peigen.c:1072
msgid ""
"\n"
"There is an import table, but the section containing it could not be found\n"
msgstr ""
-#: peigen.c:1048
+#: peigen.c:1077
#, c-format
msgid ""
"\n"
"There is an import table in %s at 0x%lx\n"
msgstr ""
-#: peigen.c:1089
+#: peigen.c:1116
#, c-format
msgid ""
"\n"
"Function descriptor located at the start address: %04lx\n"
msgstr ""
-#: peigen.c:1092
+#: peigen.c:1119
#, c-format
msgid "\tcode-base %08lx toc (loadable/actual) %08lx/%08lx\n"
msgstr ""
-#: peigen.c:1098
+#: peigen.c:1125
msgid ""
"\n"
"No reldata section! Function descriptor not decoded.\n"
msgstr ""
-#: peigen.c:1103
+#: peigen.c:1130
+#, c-format
msgid ""
"\n"
-"The Import Tables (interpreted .idata section contents)\n"
+"The Import Tables (interpreted %s section contents)\n"
msgstr ""
-#: peigen.c:1105
+#: peigen.c:1133
msgid " vma: Hint Time Forward DLL First\n"
msgstr ""
-#: peigen.c:1107
+#: peigen.c:1135
msgid " Table Stamp Chain Name Thunk\n"
msgstr ""
-#: peigen.c:1157
+#: peigen.c:1185
#, c-format
msgid ""
"\n"
"\tDLL Name: %s\n"
msgstr ""
-#: peigen.c:1161 peigen.c:1224
+#: peigen.c:1189 peigen.c:1252
msgid "\tvma: Hint/Ord Member-Name\n"
msgstr ""
-#: peigen.c:1223
+#: peigen.c:1251
msgid "\tThe Import Address Table (difference found)\n"
msgstr ""
-#: peigen.c:1230
+#: peigen.c:1258
msgid "\t>>> Ran out of IAT members!\n"
msgstr ""
-#: peigen.c:1248
+#: peigen.c:1277
msgid "\tThe Import Address Table is identical\n"
msgstr ""
-#: peigen.c:1297
-msgid ""
-"\n"
-"The export table is the .edata section\n"
-msgstr ""
-
-#: peigen.c:1319
+#: peigen.c:1351
msgid ""
"\n"
"There is an export table, but the section containing it could not be found\n"
msgstr ""
-#: peigen.c:1323
+#: peigen.c:1356
#, c-format
msgid ""
"\n"
"There is an export table in %s at 0x%lx\n"
msgstr ""
-#: peigen.c:1355
+#: peigen.c:1387
+#, c-format
msgid ""
"\n"
-"The Export Tables (interpreted .edata section contents)\n"
+"The Export Tables (interpreted %s section contents)\n"
"\n"
msgstr ""
-#: peigen.c:1358
+#: peigen.c:1391
#, c-format
msgid "Export Flags \t\t\t%lx\n"
msgstr ""
-#: peigen.c:1361
+#: peigen.c:1394
#, c-format
msgid "Time/Date stamp \t\t%lx\n"
msgstr ""
-#: peigen.c:1364
+#: peigen.c:1397
#, c-format
msgid "Major/Minor \t\t\t%d/%d\n"
msgstr ""
-#: peigen.c:1367
+#: peigen.c:1400
msgid "Name \t\t\t\t"
msgstr ""
-#: peigen.c:1373
+#: peigen.c:1406
#, c-format
msgid "Ordinal Base \t\t\t%ld\n"
msgstr ""
-#: peigen.c:1376
+#: peigen.c:1409
msgid "Number in:\n"
msgstr ""
-#: peigen.c:1379
+#: peigen.c:1412
#, c-format
-msgid "\tExport Address Table \t\t%lx\n"
+msgid "\tExport Address Table \t\t%08lx\n"
msgstr ""
-#: peigen.c:1383
+#: peigen.c:1416
#, c-format
-msgid "\t[Name Pointer/Ordinal] Table\t%lu\n"
+msgid "\t[Name Pointer/Ordinal] Table\t%08lx\n"
msgstr ""
-#: peigen.c:1386
+#: peigen.c:1419
msgid "Table Addresses\n"
msgstr ""
-#: peigen.c:1389
+#: peigen.c:1422
msgid "\tExport Address Table \t\t"
msgstr ""
-#: peigen.c:1394
+#: peigen.c:1427
msgid "\tName Pointer Table \t\t"
msgstr ""
-#: peigen.c:1399
+#: peigen.c:1432
msgid "\tOrdinal Table \t\t\t"
msgstr ""
-#: peigen.c:1415
+#: peigen.c:1448
#, c-format
msgid ""
"\n"
"Export Address Table -- Ordinal Base %ld\n"
msgstr ""
-#: peigen.c:1436
+#: peigen.c:1467
msgid "Forwarder RVA"
msgstr ""
-#: peigen.c:1444
+#: peigen.c:1478
msgid "Export RVA"
msgstr ""
-#: peigen.c:1451
+#: peigen.c:1485
msgid ""
"\n"
"[Ordinal/Name Pointer] Table\n"
msgstr ""
-#: peigen.c:1496
+#: peigen.c:1539
#, c-format
msgid "Warning, .pdata section size (%ld) is not a multiple of %d\n"
msgstr ""
-#: peigen.c:1500
+#: peigen.c:1543
msgid ""
"\n"
"The Function Table (interpreted .pdata section contents)\n"
msgstr ""
-#: peigen.c:1502
+#: peigen.c:1546
+msgid " vma:\t\t\tBegin Address End Address Unwind Info\n"
+msgstr ""
+
+#: peigen.c:1549
msgid " vma:\t\tBegin End EH EH PrologEnd Exception\n"
msgstr ""
-#: peigen.c:1504
+#: peigen.c:1551
msgid " \t\tAddress Address Handler Data Address Mask\n"
msgstr ""
-#: peigen.c:1576
+#: peigen.c:1624
msgid " Register save millicode"
msgstr ""
-#: peigen.c:1579
+#: peigen.c:1627
msgid " Register restore millicode"
msgstr ""
-#: peigen.c:1582
+#: peigen.c:1630
msgid " Glue code sequence"
msgstr ""
-#: peigen.c:1628
+#: peigen.c:1682
msgid ""
"\n"
"\n"
"PE File Base Relocations (interpreted .reloc section contents)\n"
msgstr ""
-#: peigen.c:1663
+#: peigen.c:1717
#, c-format
msgid ""
"\n"
"Virtual Address: %08lx Chunk size %ld (0x%lx) Number of fixups %ld\n"
msgstr ""
-#: peigen.c:1676
+#: peigen.c:1730
#, c-format
msgid "\treloc %4d offset %4x [%4lx] %s"
msgstr ""
@@ -1630,57 +1738,72 @@ msgstr ""
#. The MS dumpbin program reportedly ands with 0xff0f before
#. printing the characteristics field. Not sure why. No reason to
#. emulate it here.
-#: peigen.c:1714
+#: peigen.c:1769
#, c-format
msgid ""
"\n"
"Characteristics 0x%x\n"
msgstr ""
-#: ppcboot.c:418
+#: pe-mips.c:657
+#, c-format
+msgid "%s: `ld -r' not supported with PE MIPS objects\n"
+msgstr ""
+
+#: pe-mips.c:820
+#, c-format
+msgid "%s: jump too far away\n"
+msgstr ""
+
+#: pe-mips.c:847
+#, c-format
+msgid "%s: bad pair/reflo after refhi\n"
+msgstr ""
+
+#: ppcboot.c:422
msgid ""
"\n"
"ppcboot header:\n"
msgstr ""
-#: ppcboot.c:419
+#: ppcboot.c:423
#, c-format
msgid "Entry offset = 0x%.8lx (%ld)\n"
msgstr ""
-#: ppcboot.c:420
+#: ppcboot.c:424
#, c-format
msgid "Length = 0x%.8lx (%ld)\n"
msgstr ""
-#: ppcboot.c:423
+#: ppcboot.c:427
#, c-format
msgid "Flag field = 0x%.2x\n"
msgstr ""
-#: ppcboot.c:429
+#: ppcboot.c:433
#, c-format
msgid "Partition name = \"%s\"\n"
msgstr ""
-#: ppcboot.c:448
+#: ppcboot.c:452
#, c-format
msgid ""
"\n"
"Partition[%d] start = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n"
msgstr ""
-#: ppcboot.c:454
+#: ppcboot.c:458
#, c-format
msgid "Partition[%d] end = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n"
msgstr ""
-#: ppcboot.c:460
+#: ppcboot.c:464
#, c-format
msgid "Partition[%d] sector = 0x%.8lx (%ld)\n"
msgstr ""
-#: ppcboot.c:461
+#: ppcboot.c:465
#, c-format
msgid "Partition[%d] length = 0x%.8lx (%ld)\n"
msgstr ""
@@ -1722,29 +1845,29 @@ msgstr ""
msgid "Object module NOT error-free !\n"
msgstr ""
-#: vms-misc.c:541
+#: vms-misc.c:544
#, c-format
msgid "Stack overflow (%d) in _bfd_vms_push"
msgstr ""
-#: vms-misc.c:560
+#: vms-misc.c:563
msgid "Stack underflow in _bfd_vms_pop"
msgstr ""
-#: vms-misc.c:931
+#: vms-misc.c:934
msgid "_bfd_vms_output_counted called with zero bytes"
msgstr ""
-#: vms-misc.c:936
+#: vms-misc.c:939
msgid "_bfd_vms_output_counted called with too many bytes"
msgstr ""
-#: vms-misc.c:1069
+#: vms-misc.c:1072
#, c-format
msgid "Symbol %s replaced by %s\n"
msgstr ""
-#: vms-misc.c:1133
+#: vms-misc.c:1136
#, c-format
msgid "failed to enter %s"
msgstr ""
@@ -1940,97 +2063,97 @@ msgstr ""
msgid "Unhandled relocation %s"
msgstr ""
-#: xcofflink.c:1661
+#: xcofflink.c:1653
#, c-format
msgid "%s: `%s' has line numbers but no enclosing section"
msgstr ""
-#: xcofflink.c:1713
+#: xcofflink.c:1705
#, c-format
msgid "%s: class %d symbol `%s' has no aux entries"
msgstr ""
-#: xcofflink.c:1736
+#: xcofflink.c:1728
#, c-format
msgid "%s: symbol `%s' has unrecognized csect type %d"
msgstr ""
-#: xcofflink.c:1748
+#: xcofflink.c:1740
#, c-format
msgid "%s: bad XTY_ER symbol `%s': class %d scnum %d scnlen %d"
msgstr ""
-#: xcofflink.c:1787
+#: xcofflink.c:1779
#, c-format
msgid "%s: XMC_TC0 symbol `%s' is class %d scnlen %d"
msgstr ""
-#: xcofflink.c:1911
+#: xcofflink.c:1903
#, c-format
msgid "%s: symbol `%s' has unrecognized smclas %d"
msgstr ""
-#: xcofflink.c:1930
+#: xcofflink.c:1922
#, c-format
msgid "%s: csect `%s' not in enclosing section"
msgstr ""
-#: xcofflink.c:2034
+#: xcofflink.c:2026
#, c-format
msgid "%s: misplaced XTY_LD `%s'"
msgstr ""
-#: xcofflink.c:2345
+#: xcofflink.c:2337
#, c-format
msgid "%s: reloc %s:%d not in csect"
msgstr ""
-#: xcofflink.c:2480
+#: xcofflink.c:2472
#, c-format
msgid "%s: XCOFF shared object when not producing XCOFF output"
msgstr ""
-#: xcofflink.c:2501
+#: xcofflink.c:2493
#, c-format
msgid "%s: dynamic object with no .loader section"
msgstr ""
-#: xcofflink.c:3141
+#: xcofflink.c:3133
#, c-format
msgid "%s: no such symbol"
msgstr ""
-#: xcofflink.c:3733
+#: xcofflink.c:3725
#, c-format
msgid "warning: attempt to export undefined symbol `%s'"
msgstr ""
-#: xcofflink.c:4709
+#: xcofflink.c:4701
#, c-format
msgid "TOC overflow: 0x%lx > 0x10000; try -mminimal-toc when compiling"
msgstr ""
-#: xcofflink.c:5534 xcofflink.c:5890 xcofflink.c:5927 xcofflink.c:6244
+#: xcofflink.c:5526 xcofflink.c:5882 xcofflink.c:5919 xcofflink.c:6236
#, c-format
msgid "%s: loader reloc in unrecognized section `%s'"
msgstr ""
-#: xcofflink.c:5556 xcofflink.c:6255
+#: xcofflink.c:5548 xcofflink.c:6247
#, c-format
msgid "%s: `%s' in loader reloc but not loader sym"
msgstr ""
-#: xcofflink.c:5571
+#: xcofflink.c:5563
#, c-format
msgid "%s: loader reloc in read-only section %s"
msgstr ""
-#: xcofflink.c:6451
+#: xcofflink.c:6443
#, c-format
msgid "%s: unsupported relocation type 0x%02x"
msgstr ""
-#: xcofflink.c:6497
+#: xcofflink.c:6489
#, c-format
msgid "%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry"
msgstr ""
diff --git a/bfd/reloc.c b/bfd/reloc.c
index a14d552d50..119aea9bdf 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2881,6 +2881,23 @@ ENUMX
BFD_RELOC_IA64_LDXMOV
ENUMDOC
Intel IA64 Relocations.
+
+ENUM
+ BFD_RELOC_M68HC11_HI8
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 8 bits high part of an absolute address.
+ENUM
+ BFD_RELOC_M68HC11_LO8
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 8 bits low part of an absolute address.
+ENUM
+ BFD_RELOC_M68HC11_3B
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 3 bits of a value.
+
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT
diff --git a/bfd/section.c b/bfd/section.c
index ff977fd78a..be881d8426 100644
--- a/bfd/section.c
+++ b/bfd/section.c
@@ -552,25 +552,25 @@ static const asymbol global_syms[] =
const asymbol * const SYM = (asymbol *) &global_syms[IDX]; \
const asection SEC = \
/* name, index, next, flags, set_vma, reloc_done, linker_mark, gc_mark */ \
- { NAME, 0, 0, FLAGS, 0, 0, 0, 0, \
+ { NAME, 0, NULL, FLAGS, 0, 0, 0, 0, \
\
/* vma, lma, _cooked_size, _raw_size, output_offset, output_section, */ \
0, 0, 0, 0, 0, (struct sec *) &SEC, \
\
/* alig..., reloc..., orel..., reloc_count, filepos, rel_..., line_... */ \
- 0, 0, 0, 0, 0, 0, 0, \
+ 0, NULL, NULL, 0, 0, 0, 0, \
\
/* userdata, contents, lineno, lineno_count */ \
- 0, 0, 0, 0, \
+ NULL, NULL, NULL, 0, \
\
/* comdat_info, moving_line_filepos, target_index, used_by_bfd, */ \
- NULL, 0, 0, 0, \
+ NULL, 0, 0, NULL, \
\
/* cons..., owner, symbol */ \
- 0, 0, (struct symbol_cache_entry *) &global_syms[IDX], \
+ NULL, NULL, (struct symbol_cache_entry *) &global_syms[IDX], \
\
/* symbol_ptr_ptr, link_order_head, ..._tail */ \
- (struct symbol_cache_entry **) &SYM, 0, 0 \
+ (struct symbol_cache_entry **) &SYM, NULL, NULL \
}
STD_SECTION (bfd_com_section, SEC_IS_COMMON, bfd_com_symbol,
diff --git a/bfd/targets.c b/bfd/targets.c
index 980f95c549..c9f7f959b5 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -533,6 +533,8 @@ extern const bfd_target bfd_elf32_little_generic_vec;
extern const bfd_target bfd_elf32_littlemips_vec;
extern const bfd_target bfd_elf64_littlemips_vec;
extern const bfd_target bfd_elf32_m32r_vec;
+extern const bfd_target bfd_elf32_m68hc11_vec;
+extern const bfd_target bfd_elf32_m68hc12_vec;
extern const bfd_target bfd_elf32_m68k_vec;
extern const bfd_target bfd_elf32_m88k_vec;
extern const bfd_target bfd_elf32_mn10200_vec;
@@ -738,6 +740,8 @@ const bfd_target * const bfd_target_vector[] = {
&bfd_elf32_m32r_vec,
&bfd_elf32_mn10200_vec,
&bfd_elf32_mn10300_vec,
+ &bfd_elf32_m68hc11_vec,
+ &bfd_elf32_m68hc12_vec,
&bfd_elf32_m68k_vec,
&bfd_elf32_m88k_vec,
&bfd_elf32_sparc_vec,