S/390: Add support for z15 as CPU name.

So far z15 was identified as arch13. After the machine has been
announced we can now add the real name.

gcc/ChangeLog:

2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>

	Backport from mainline
	2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>

	* common/config/s390/s390-common.c (PF_ARCH13): Rename to...
	(PF_Z15): ... this.
	* config.gcc: Add z15 as option for --with-arch and --with-tune
	configure switches.
	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add
	error reporting for unsupported builtins.
	* config/s390/s390-opts.h (enum processor_type): Rename
	PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15.
	* config/s390/8561.md: Rename arch13 to z15 throughout the file.
	* config/s390/driver-native.c (s390_host_detect_local_cpu):
	Likewise.
	* config/s390/s390-builtins.def: Likewise.
	* config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative.
	(s390_expand_builtin): Add missing check for unsupported builtins.
	(s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15.
	(s390_rtx_costs): Likewise.
	(s390_get_sched_attrmask): Rename arch13 to z15.
	(s390_get_unit_mask): Likewise.
	(s390_is_fpd): Likewise.
	(s390_is_fxd): Likewise.
	* config/s390/s390.h (enum processor_flags): Likewise.
	* config/s390/s390.md: Likewise.
	* config/s390/vector.md: Likewise.
	* config/s390/vx-builtins.md: Likewise.
	* config/s390/s390.opt: Add z15 to processor_type value.



git-svn-id: https://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@276793 138bc75d-0d04-0410-961f-82ee72b054a4

14 files changed, 172 insertions, 117 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9a1058f1cf4..f840f0180e9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,34 @@
+2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
+
+	Backport from mainline
+	2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
+
+	* common/config/s390/s390-common.c (PF_ARCH13): Rename to...
+	(PF_Z15): ... this.
+	* config.gcc: Add z15 as option for --with-arch and --with-tune
+	configure switches.
+	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add
+	error reporting for unsupported builtins.
+	* config/s390/s390-opts.h (enum processor_type): Rename
+	PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15.
+	* config/s390/8561.md: Rename arch13 to z15 throughout the file.
+	* config/s390/driver-native.c (s390_host_detect_local_cpu):
+	Likewise.
+	* config/s390/s390-builtins.def: Likewise.
+	* config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative.
+	(s390_expand_builtin): Add missing check for unsupported builtins.
+	(s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15.
+	(s390_rtx_costs): Likewise.
+	(s390_get_sched_attrmask): Rename arch13 to z15.
+	(s390_get_unit_mask): Likewise.
+	(s390_is_fpd): Likewise.
+	(s390_is_fxd): Likewise.
+	* config/s390/s390.h (enum processor_flags): Likewise.
+	* config/s390/s390.md: Likewise.
+	* config/s390/vector.md: Likewise.
+	* config/s390/vx-builtins.md: Likewise.
+	* config/s390/s390.opt: Add z15 to processor_type value.
+
 2019-10-07  Bill Schmidt  <wschmidt@linux.ibm.com>
 
 	Backport from mainline
diff --git a/gcc/common/config/s390/s390-common.c b/gcc/common/config/s390/s390-common.c
index f9c3a95f897..2e1914e3768 100644
--- a/gcc/common/config/s390/s390-common.c
+++ b/gcc/common/config/s390/s390-common.c
@@ -47,9 +47,9 @@ EXPORTED_CONST int processor_flags_table[] =
     /* z14 */    PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
 		 | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
 		 | PF_Z13 | PF_VX | PF_VXE | PF_Z14,
-    /* arch13 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
+    /* z15 */    PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
 		 | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
-		 | PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_ARCH13
+		 | PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_Z15
   };
 
 /* Change optimizations to be performed, depending on the
diff --git a/gcc/config.gcc b/gcc/config.gcc
index ddd3b8f4d9d..f5027bb289b 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4743,7 +4743,7 @@ case "${target}" in
 		for which in arch tune; do
 			eval "val=\$with_$which"
 			case ${val} in
-			"" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 )
+			"" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | z15 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 )
 				# OK
 				;;
 			*)
diff --git a/gcc/config/s390/8561.md b/gcc/config/s390/8561.md
index e5a345f4dba..2442349271b 100644
--- a/gcc/config/s390/8561.md
+++ b/gcc/config/s390/8561.md
@@ -1,4 +1,4 @@
-;; Scheduling description for arch13.
+;; Scheduling description for z15.
 ;;   Copyright (C) 2019 Free Software Foundation, Inc.
 ;;   Contributed by Robin Dapp (rdapp@linux.ibm.com)
 ;; This file is part of GCC.
@@ -17,12 +17,12 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_attr "arch13_unit_fpd" ""
+(define_attr "z15_unit_fpd" ""
 (cond [(eq_attr "mnemonic" "ddb,ddbr,deb,debr,dxbr,sqdb,sqdbr,sqeb,\
 sqebr,sqxbr,vfddb,vfdsb,vfsqdb,vfsqsb,wfddb,wfdsb,wfdxb,wfsqdb,wfsqxb")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_unit_fxa" ""
+(define_attr "z15_unit_fxa" ""
 (cond [(eq_attr "mnemonic" "a,afi,ag,agf,agfi,agfr,agh,aghi,aghik,\
 agr,agrk,ah,ahi,ahik,ahy,al,alc,alcg,alcgr,alcr,alfi,alg,algf,algfi,algfr,\
 alghsik,algr,algrk,alhsik,alr,alrk,aly,ar,ark,ay,bras,brasl,etnd,exrl,flogr,\
@@ -39,7 +39,7 @@ slgrk,sll,sllg,sllk,slr,slrk,sly,sr,sra,srag,srak,srk,srl,srlg,srlk,sy,x,xg,\
 xgr,xgrk,xihf,xilf,xr,xrk,xy")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_unit_fxb" ""
+(define_attr "z15_unit_fxb" ""
 (cond [(eq_attr "mnemonic" "agsi,algsi,alsi,asi,b,bc,bcr,bi,br,brcl,\
 c,cfi,cg,cgf,cgfi,cgfr,cgfrl,cgh,cghi,cghrl,cghsi,cgit,cgr,cgrl,cgrt,ch,\
 chi,chrl,chsi,chy,cit,cl,clfhsi,clfi,clfit,clg,clgf,clgfi,clgfr,clgfrl,\
@@ -52,11 +52,11 @@ tmhl,tml,tmlh,tmll,tmy,vlgvb,vlgvf,vlgvg,vlgvh,vlr,vlvgb,vlvgf,vlvgg,vlvgh,\
 vlvgp,vst,vstef,vsteg,vstl,vstrl,vstrlr,xi,xiy")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_unit_fxd" ""
+(define_attr "z15_unit_fxd" ""
 (cond [(eq_attr "mnemonic" "dlgr,dlr,dr,dsgfr,dsgr")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_unit_lsu" ""
+(define_attr "z15_unit_lsu" ""
 (cond [(eq_attr "mnemonic" "a,adb,aeb,ag,agf,agh,agsi,ah,ahy,al,alc,\
 alcg,alg,algf,algsi,alsi,aly,asi,ay,c,cdb,ceb,cg,cgf,cgfrl,cgh,cghrl,cghsi,\
 cgrl,ch,chrl,chsi,chy,cl,clc,clfhsi,clg,clgf,clgfrl,clghrl,clghsi,clgrl,\
@@ -73,7 +73,7 @@ vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr,vst,\
 vstef,vsteg,vstl,vstrl,vstrlr,x,xg,xi,xiy,xy")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_unit_vfu" ""
+(define_attr "z15_unit_vfu" ""
 (cond [(eq_attr "mnemonic" "adb,adbr,adtr,aeb,aebr,axbr,axtr,cdb,\
 cdbr,cdtr,ceb,cebr,cpsdr,cxbr,cxtr,ddtr,dxtr,fidbr,fidbra,fidtr,fiebr,\
 fiebra,fixbr,fixbra,fixtr,lcdbr,lcebr,lcxbr,ldeb,ldebr,ldetr,le,ledbr,ledtr,\
@@ -115,7 +115,7 @@ wflpxb,wfmadb,wfmasb,wfmaxb,wfmaxxb,wfmdb,wfminxb,wfmsb,wfmsdb,wfmssb,wfmsxb,\
 wfmxb,wfnmaxb,wfnmsxb,wfsdb,wfssb,wfsxb,wldeb,wledb")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_cracked" ""
+(define_attr "z15_cracked" ""
 (cond [(eq_attr "mnemonic" "bas,basr,cdfbr,cdftr,cdgbr,cdgtr,cdlfbr,\
 cdlftr,cdlgbr,cdlgtr,cefbr,cegbr,celfbr,celgbr,cfdbr,cfebr,cfxbr,cgdbr,cgdtr,\
 cgebr,cgxbr,cgxtr,chhsi,clfdbr,clfdtr,clfebr,clfxbr,clfxtr,clgdbr,clgdtr,\
@@ -123,13 +123,13 @@ clgebr,clgxbr,clgxtr,cs,csg,csy,d,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,\
 rxsbg,stpq,vgef,vgeg,vscef,vsceg,vsteb,vsteh")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_expanded" ""
+(define_attr "z15_expanded" ""
 (cond [(eq_attr "mnemonic" "cds,cdsg,cdsy,cxfbr,cxftr,cxgbr,cxgtr,\
 cxlfbr,cxlftr,cxlgbr,cxlgtr,dl,dlg,dsg,dsgf,lam,lm,lmg,lmy,sldl,srda,srdl,\
 stam,stm,stmg,stmy,tbegin,tbeginc")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_groupalone" ""
+(define_attr "z15_groupalone" ""
 (cond [(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,axbr,axtr,clc,cxbr,\
 cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
 lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\
@@ -137,11 +137,11 @@ ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,nc,oc,ppa,sfpc,slb,slbg,\
 slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_endgroup" ""
+(define_attr "z15_endgroup" ""
 (cond [(eq_attr "mnemonic" "bras,brasl,exrl,ipm")
  (const_int 1)] (const_int 0)))
 
-(define_attr "arch13_groupoftwo" ""
+(define_attr "z15_groupoftwo" ""
 (cond [(eq_attr "mnemonic" "vacccq,vacq,vfmadb,vfmasb,vfmsdb,vfmssb,\
 vfnmadb,vfnmasb,vfnmsdb,vfnmssb,vgfmab,vgfmaf,vgfmag,vgfmah,vmaeb,vmaef,vmaeh,\
 vmahb,vmahf,vmahh,vmalb,vmaleb,vmalef,vmaleh,vmalf,vmalhb,vmalhf,vmalhh,\
@@ -149,8 +149,8 @@ vmalhw,vmalob,vmalof,vmaloh,vmaob,vmaof,vmaoh,vmslg,vperm,vsbcbiq,vsbiq,vsel,\
 wfmadb,wfmasb,wfmaxb,wfmsdb,wfmssb,wfmsxb,wfnmaxb,wfnmsxb")
  (const_int 1)] (const_int 0)))
 
-(define_insn_reservation "arch13_0" 0
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_0" 0
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "a,afi,ag,agfi,aghi,aghik,agr,agrk,ahi,ahik,al,\
 alfi,alg,algf,algfi,algfr,alghsik,algr,algrk,alhsik,alr,alrk,aly,ar,ark,ay,\
 b,bc,bcr,bi,br,bras,brasl,brcl,c,cfi,cg,cgfi,cghi,cghsi,cgit,cgr,cgrl,\
@@ -168,8 +168,8 @@ sllk,slr,slrk,sly,sr,sra,srag,srak,srda,srdl,srk,srl,srlg,srlk,sy,tm,tmh,\
 tmhh,tmhl,tml,tmlh,tmll,tmy,vlr,vlvgb,vlvgf,vlvgg,vlvgh,x,xg,xgr,xgrk,xihf,\
 xilf,xr,xrk,xy")) "nothing")
 
-(define_insn_reservation "arch13_1" 1
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_1" 1
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "agf,agfr,agh,agsi,ah,ahy,algsi,alsi,asi,cgf,\
 cgfr,cgfrl,cgh,cghrl,ch,chrl,chy,clm,clmy,cpsdr,laa,laag,lan,lang,lao,laog,\
 lax,laxg,le,ler,ley,loc,locg,locghi,locgr,lochi,locr,mvghi,mvhhi,mvhi,mvi,\
@@ -196,8 +196,8 @@ wfcedb,wfcesb,wfcexb,wfchdb,wfchedb,wfchesb,wfchexb,wfchsb,wfchxb,wflcdb,\
 wflcsb,wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,\
 xiy")) "nothing")
 
-(define_insn_reservation "arch13_2" 2
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_2" 2
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cdb,cdbr,ceb,cebr,ear,ipm,l,lcbb,lcdbr,lcebr,ld,\
 lde,ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lm,\
 lmg,lmy,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
@@ -208,8 +208,8 @@ vistrh,vlgvb,vlgvf,vlgvg,vlgvh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,\
 vlrepf,vlrepg,vlreph,vlrl,vlvgp,vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,\
 wfcdb,wfcexbs,wfchexbs,wfchxbs,wfcsb")) "nothing")
 
-(define_insn_reservation "arch13_3" 3
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_3" 3
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cds,cdsy,mgh,mghi,mh,mhi,mhy,std,stdy,ste,stey,\
 vcksm,vfeezbs,vfeezfs,vfeezhs,vgfmab,vgfmaf,vgfmag,vgfmah,vgfmb,vgfmf,vgfmg,\
 vgfmh,vistrbs,vistrfs,vistrhs,vl,vlbb,vll,vlrlr,vmaeb,vmaef,vmaeh,vmahb,\
@@ -218,14 +218,14 @@ vmalob,vmalof,vmaloh,vmaob,vmaof,vmaoh,vmeb,vmef,vmeh,vmhb,vmhf,vmhh,vmlb,\
 vmleb,vmlef,vmleh,vmlf,vmlhb,vmlhf,vmlhh,vmlhw,vmlob,vmlof,vmloh,vmob,vmof,\
 vmoh,vsumb,vsumgf,vsumgh,vsumh,vsumqf,vsumqg,vtm")) "nothing")
 
-(define_insn_reservation "arch13_4" 4
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_4" 4
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "bas,basr,chhsi,clc,ex,lam,lcgfr,lngfr,lpgfr,lxr,\
 lzxr,ms,msfi,msgf,msgfi,msgfr,msr,msy,mvc,nc,oc,ppa,rxsbg,tabort,tbegin,\
 tbeginc,tend,vst,vstef,vsteg,vstl,vstrl,vstrlr,xc")) "nothing")
 
-(define_insn_reservation "arch13_5" 5
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_5" 5
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "adb,adbr,aeb,aebr,alc,alcg,alcgr,alcr,cs,csg,\
 csy,fidbr,fidbra,fiebr,fiebra,ldeb,ldebr,ledbr,madbr,mdb,mdbr,meeb,meebr,\
 msdbr,msrkc,sdb,sdbr,seb,sebr,slb,slbg,slbgr,slbr,stm,stmg,stmy,vfadb,vfasb,\
@@ -233,53 +233,53 @@ vfidb,vfisb,vfmadb,vfmasb,vfmdb,vfmsb,vfmsdb,vfmssb,vfnmadb,vfnmasb,vfnmsdb,\
 vfnmssb,vfsdb,vfssb,vldeb,vledb,vmslg,wfadb,wfasb,wfidb,wfisb,wflld,wfmadb,\
 wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing")
 
-(define_insn_reservation "arch13_6" 6
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_6" 6
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "msg,msgr,sfpc")) "nothing")
 
-(define_insn_reservation "arch13_7" 7
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_7" 7
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,ltdtr,msgrkc,sdtr,tdcdt,\
 tdcet,vgef,vgeg")) "nothing")
 
-(define_insn_reservation "arch13_8" 8
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_8" 8
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cdsg,flogr,lpq,stpq,vsteb,vsteh")) "nothing")
 
-(define_insn_reservation "arch13_9" 9
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_9" 9
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cdfbr,cdgbr,cdlfbr,cdlgbr,cefbr,cegbr,celfbr,\
 celgbr,cxfbr,cxgbr,cxlfbr,cxlgbr,m,madb,maeb,maebr,mfy,ml,mlr,mr,msdb,mseb,\
 msebr,stam,wfaxb,wfixb,wfsxb")) "nothing")
 
-(define_insn_reservation "arch13_10" 10
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_10" 10
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "lxdb,lxdbr,lxeb,lxebr,vscef,vsceg")) "nothing")
 
-(define_insn_reservation "arch13_11" 11
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_11" 11
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cfdbr,cfebr,cgdbr,cgebr,clfdbr,clfebr,clgdbr,\
 clgebr,mg,mgrk,mlg,mlgr")) "nothing")
 
-(define_insn_reservation "arch13_12" 12
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_12" 12
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cxbr,cxftr,cxlftr,cxtr,tcxb,tdcxt")) "nothing")
 
-(define_insn_reservation "arch13_13" 13
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_13" 13
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "axbr,axtr,fixbr,fixbra,fixtr,lcxbr,lnxbr,lpxbr,\
 ltxbr,ltxtr,lxdtr,sxbr,sxtr")) "nothing")
 
-(define_insn_reservation "arch13_14" 14
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_14" 14
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cfxbr,cgxbr,clfxbr,clgxbr,ledtr")) "nothing")
 
-(define_insn_reservation "arch13_16" 16
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_16" 16
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cdftr,cdlftr")) "nothing")
 
-(define_insn_reservation "arch13_20" 20
-  (and (eq_attr "cpu" "arch13")
+(define_insn_reservation "z15_20" 20
+  (and (eq_attr "cpu" "z15")
 (eq_attr "mnemonic" "cdgtr,cdlgtr,cgdtr,cgxtr,clfdtr,clfxtr,clgdtr,\
 clgxtr,cxgtr,cxlgtr,d,ddb,ddbr,ddtr,deb,debr,dl,dlg,dlgr,dlr,dr,dsg,dsgf,\
 dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,sqebr,sqxbr,vfddb,\
diff --git a/gcc/config/s390/driver-native.c b/gcc/config/s390/driver-native.c
index a386d633a87..6bc7d590668 100644
--- a/gcc/config/s390/driver-native.c
+++ b/gcc/config/s390/driver-native.c
@@ -121,10 +121,10 @@ s390_host_detect_local_cpu (int argc, const char **argv)
 	      break;
 	    case 0x8561:
 	    case 0x8562:
-	      cpu = "arch13";
+	      cpu = "z15";
 	      break;
 	    default:
-	      cpu = "arch13";
+	      cpu = "z15";
 	      break;
 	    }
 	}
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index fbf7d9f50e8..3f39b9d3b88 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -281,7 +281,7 @@
 #define B_HTM   (1 << 1)  /* Builtins requiring the transactional execution facility.  */
 #define B_VX    (1 << 2)  /* Builtins requiring the z13 vector extensions.  */
 #define B_VXE   (1 << 3)  /* Builtins requiring the z14 vector extensions.  */
-#define B_VXE2  (1 << 4)  /* Builtins requiring the arch13 vector extensions.  */
+#define B_VXE2  (1 << 4)  /* Builtins requiring the z15 vector extensions.  */
 #define B_DEP   (1 << 5)  /* Builtin has been deprecated and a warning should be issued.  */
 
 /* B_DEF defines a standard (not overloaded) builtin
diff --git a/gcc/config/s390/s390-c.c b/gcc/config/s390/s390-c.c
index 97debdc3905..c2f9b507011 100644
--- a/gcc/config/s390/s390-c.c
+++ b/gcc/config/s390/s390-c.c
@@ -905,6 +905,12 @@ s390_resolve_overloaded_builtin (location_t loc,
       return error_mark_node;
     }
 
+  if (!TARGET_VXE2 && (ob_flags & B_VXE2))
+    {
+      error_at (loc, "%qF requires z15 or higher", ob_fndecl);
+      return error_mark_node;
+    }
+
   ob_fcode -= S390_BUILTIN_MAX;
 
   for (b_arg_chain = TYPE_ARG_TYPES (TREE_TYPE (ob_fndecl));
@@ -983,6 +989,15 @@ s390_resolve_overloaded_builtin (location_t loc,
       return error_mark_node;
     }
 
+
+  if (!TARGET_VXE2
+      && bflags_overloaded_builtin_var[last_match_index] & B_VXE2)
+    {
+      error_at (loc, "%qs matching variant requires z15 or higher",
+		IDENTIFIER_POINTER (DECL_NAME (ob_fndecl)));
+      return error_mark_node;
+    }
+
   if (bflags_overloaded_builtin_var[last_match_index] & B_DEP)
     warning_at (loc, 0, "%qs matching variant is deprecated.",
 		IDENTIFIER_POINTER (DECL_NAME (ob_fndecl)));
diff --git a/gcc/config/s390/s390-opts.h b/gcc/config/s390/s390-opts.h
index ab41cb883f3..502edea719b 100644
--- a/gcc/config/s390/s390-opts.h
+++ b/gcc/config/s390/s390-opts.h
@@ -37,7 +37,7 @@ enum processor_type
   PROCESSOR_2827_ZEC12,
   PROCESSOR_2964_Z13,
   PROCESSOR_3906_Z14,
-  PROCESSOR_8561_ARCH13,
+  PROCESSOR_8561_Z15,
   PROCESSOR_NATIVE,
   PROCESSOR_max
 };
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index fc4571d0d0c..21aaae1fdbd 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -337,7 +337,7 @@ const struct s390_processor processor_table[] =
   { "zEC12",  "zEC12",  PROCESSOR_2827_ZEC12,  &zEC12_cost,  10 },
   { "z13",    "z13",    PROCESSOR_2964_Z13,    &zEC12_cost,  11 },
   { "z14",    "arch12", PROCESSOR_3906_Z14,    &zEC12_cost,  12 },
-  { "arch13", "",       PROCESSOR_8561_ARCH13, &zEC12_cost,  13 },
+  { "z15",    "arch13", PROCESSOR_8561_Z15,    &zEC12_cost,  13 },
   { "native", "",       PROCESSOR_NATIVE,      NULL,         0  }
 };
 
@@ -811,6 +811,12 @@ s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 	  error ("Builtin %qF requires z14 or higher.", fndecl);
 	  return const0_rtx;
 	}
+
+      if ((bflags & B_VXE2) && !TARGET_VXE2)
+	{
+	  error ("Builtin %qF requires z15 or higher.", fndecl);
+	  return const0_rtx;
+	}
     }
   if (fcode >= S390_OVERLOADED_BUILTIN_VAR_OFFSET
       && fcode < S390_ALL_BUILTIN_MAX)
@@ -1795,7 +1801,7 @@ s390_canonicalize_comparison (int *code, rtx *op0, rtx *op1,
     }
 
   /* ~a==b -> ~(a^b)==0   ~a!=b -> ~(a^b)!=0 */
-  if (TARGET_ARCH13
+  if (TARGET_Z15
       && (*code == EQ || *code == NE)
       && (GET_MODE (*op0) == DImode || GET_MODE (*op0) == SImode)
       && GET_CODE (*op0) == NOT)
@@ -1807,7 +1813,7 @@ s390_canonicalize_comparison (int *code, rtx *op0, rtx *op1,
     }
 
   /* a&b == -1 -> ~a|~b == 0    a|b == -1 -> ~a&~b == 0  */
-  if (TARGET_ARCH13
+  if (TARGET_Z15
       && (*code == EQ || *code == NE)
       && (GET_CODE (*op0) == AND || GET_CODE (*op0) == IOR)
       && (GET_MODE (*op0) == DImode || GET_MODE (*op0) == SImode)
@@ -3529,7 +3535,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
 
 	/* It is a real IF-THEN-ELSE.  An additional move will be
 	   needed to implement that.  */
-	if (!TARGET_ARCH13
+	if (!TARGET_Z15
 	    && reload_completed
 	    && !rtx_equal_p (dst, then)
 	    && !rtx_equal_p (dst, els))
@@ -3551,7 +3557,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
     case IOR:
 
       /* nnrk, nngrk */
-      if (TARGET_ARCH13
+      if (TARGET_Z15
 	  && (mode == SImode || mode == DImode)
 	  && GET_CODE (XEXP (x, 0)) == NOT
 	  && GET_CODE (XEXP (x, 1)) == NOT)
@@ -3598,7 +3604,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
 
     case AND:
       /* nork, nogrk */
-      if (TARGET_ARCH13
+      if (TARGET_Z15
 	  && (mode == SImode || mode == DImode)
 	  && GET_CODE (XEXP (x, 0)) == NOT
 	  && GET_CODE (XEXP (x, 1)) == NOT)
@@ -3770,7 +3776,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
       *total = COSTS_N_INSNS (1);
 
       /* nxrk, nxgrk ~(a^b)==0 */
-      if (TARGET_ARCH13
+      if (TARGET_Z15
 	  && GET_CODE (XEXP (x, 0)) == NOT
 	  && XEXP (x, 1) == const0_rtx
 	  && GET_CODE (XEXP (XEXP (x, 0), 0)) == XOR
@@ -3785,7 +3791,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
 	}
 
       /* nnrk, nngrk, nork, nogrk */
-      if (TARGET_ARCH13
+      if (TARGET_Z15
 	  && (GET_CODE (XEXP (x, 0)) == AND || GET_CODE (XEXP (x, 0)) == IOR)
 	  && XEXP (x, 1) == const0_rtx
 	  && (GET_MODE (XEXP (x, 0)) == SImode || GET_MODE (XEXP (x, 0)) == DImode)
@@ -14440,16 +14446,16 @@ s390_get_sched_attrmask (rtx_insn *insn)
       if (get_attr_z14_groupoftwo (insn))
 	mask |= S390_SCHED_ATTR_MASK_GROUPOFTWO;
       break;
-    case PROCESSOR_8561_ARCH13:
-      if (get_attr_arch13_cracked (insn))
+    case PROCESSOR_8561_Z15:
+      if (get_attr_z15_cracked (insn))
 	mask |= S390_SCHED_ATTR_MASK_CRACKED;
-      if (get_attr_arch13_expanded (insn))
+      if (get_attr_z15_expanded (insn))
 	mask |= S390_SCHED_ATTR_MASK_EXPANDED;
-      if (get_attr_arch13_endgroup (insn))
+      if (get_attr_z15_endgroup (insn))
 	mask |= S390_SCHED_ATTR_MASK_ENDGROUP;
-      if (get_attr_arch13_groupalone (insn))
+      if (get_attr_z15_groupalone (insn))
 	mask |= S390_SCHED_ATTR_MASK_GROUPALONE;
-      if (get_attr_arch13_groupoftwo (insn))
+      if (get_attr_z15_groupoftwo (insn))
 	mask |= S390_SCHED_ATTR_MASK_GROUPOFTWO;
       break;
     default:
@@ -14487,15 +14493,15 @@ s390_get_unit_mask (rtx_insn *insn, int *units)
       if (get_attr_z14_unit_vfu (insn))
 	mask |= 1 << 3;
       break;
-    case PROCESSOR_8561_ARCH13:
+    case PROCESSOR_8561_Z15:
       *units = 4;
-      if (get_attr_arch13_unit_lsu (insn))
+      if (get_attr_z15_unit_lsu (insn))
 	mask |= 1 << 0;
-      if (get_attr_arch13_unit_fxa (insn))
+      if (get_attr_z15_unit_fxa (insn))
 	mask |= 1 << 1;
-      if (get_attr_arch13_unit_fxb (insn))
+      if (get_attr_z15_unit_fxb (insn))
 	mask |= 1 << 2;
-      if (get_attr_arch13_unit_vfu (insn))
+      if (get_attr_z15_unit_vfu (insn))
 	mask |= 1 << 3;
       break;
     default:
@@ -14511,7 +14517,7 @@ s390_is_fpd (rtx_insn *insn)
     return false;
 
   return get_attr_z13_unit_fpd (insn) || get_attr_z14_unit_fpd (insn)
-    || get_attr_arch13_unit_fpd (insn);
+    || get_attr_z15_unit_fpd (insn);
 }
 
 static bool
@@ -14521,7 +14527,7 @@ s390_is_fxd (rtx_insn *insn)
     return false;
 
   return get_attr_z13_unit_fxd (insn) || get_attr_z14_unit_fxd (insn)
-    || get_attr_arch13_unit_fxd (insn);
+    || get_attr_z15_unit_fxd (insn);
 }
 
 /* Returns TRUE if INSN is a long-running instruction.  */
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index 969f58a2ba0..f7023d985f1 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -41,12 +41,12 @@ enum processor_flags
   PF_Z14 = 2048,
   PF_VXE = 4096,
   PF_VXE2 = 8192,
-  PF_ARCH13 = 16384
+  PF_Z15 = 16384
 };
 
 /* This is necessary to avoid a warning about comparing different enum
    types.  */
-#define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_8561_ARCH13 ? PROCESSOR_8561_ARCH13 : s390_tune ))
+#define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_8561_Z15 ? PROCESSOR_8561_Z15 : s390_tune ))
 
 /* These flags indicate that the generated code should run on a cpu
    providing the respective hardware facility regardless of the
@@ -100,10 +100,10 @@ enum processor_flags
 	(s390_arch_flags & PF_VXE)
 #define TARGET_CPU_VXE_P(opts) \
 	(opts->x_s390_arch_flags & PF_VXE)
-#define TARGET_CPU_ARCH13 \
-	(s390_arch_flags & PF_ARCH13)
-#define TARGET_CPU_ARCH13_P(opts) \
-	(opts->x_s390_arch_flags & PF_ARCH13)
+#define TARGET_CPU_Z15 \
+	(s390_arch_flags & PF_Z15)
+#define TARGET_CPU_Z15_P(opts) \
+	(opts->x_s390_arch_flags & PF_Z15)
 #define TARGET_CPU_VXE2 \
 	(s390_arch_flags & PF_VXE2)
 #define TARGET_CPU_VXE2_P(opts) \
@@ -160,9 +160,9 @@ enum processor_flags
 	(TARGET_VX && TARGET_CPU_VXE)
 #define TARGET_VXE_P(opts)						\
 	(TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
-#define TARGET_ARCH13 (TARGET_ZARCH && TARGET_CPU_ARCH13)
-#define TARGET_ARCH13_P(opts)						\
-	(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH13_P (opts))
+#define TARGET_Z15 (TARGET_ZARCH && TARGET_CPU_Z15)
+#define TARGET_Z15_P(opts)						\
+	(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z15_P (opts))
 #define TARGET_VXE2					\
 	(TARGET_VX && TARGET_CPU_VXE2)
 #define TARGET_VXE2_P(opts)						\
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 714d8b00a80..5a3496ac92e 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -513,11 +513,11 @@
 ;; Processor type.  This attribute must exactly match the processor_type
 ;; enumeration in s390.h.
 
-(define_attr "cpu" "z900,z990,z9_109,z9_ec,z10,z196,zEC12,z13,z14,arch13"
+(define_attr "cpu" "z900,z990,z9_109,z9_ec,z10,z196,zEC12,z13,z14,z15"
   (const (symbol_ref "s390_tune_attr")))
 
 (define_attr "cpu_facility"
-  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,arch13,vxe2"
+  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2"
   (const_string "standard"))
 
 (define_attr "enabled" ""
@@ -575,8 +575,8 @@
 	      (match_test "TARGET_VXE"))
 	 (const_int 1)
 
-	 (and (eq_attr "cpu_facility" "arch13")
-	      (match_test "TARGET_ARCH13"))
+	 (and (eq_attr "cpu_facility" "z15")
+	      (match_test "TARGET_Z15"))
 	 (const_int 1)
 
          (and (eq_attr "cpu_facility" "vxe2")
@@ -613,7 +613,7 @@
 ;; Pipeline description for z14
 (include "3906.md")
 
-;; Pipeline description for arch13
+;; Pipeline description for z15
 (include "8561.md")
 
 ;; Predicates
@@ -642,7 +642,7 @@
 (define_mode_iterator DD_DF [DF DD])
 (define_mode_iterator TD_TF [TF TD])
 
-; 32 bit int<->fp conversion instructions are available since VXE2 (arch13).
+; 32 bit int<->fp conversion instructions are available since VXE2 (z15).
 (define_mode_iterator VX_CONV_BFP [DF (SF "TARGET_VXE2")])
 (define_mode_iterator VX_CONV_INT [DI (SI "TARGET_VXE2")])
 
@@ -6749,7 +6749,7 @@
    stoc<g>%C1\t%3,%0
    stoc<g>%D1\t%4,%0"
   [(set_attr "op_type" "RRF,RRF,RRF,RSY,RSY,RIE,RIE,RSY,RSY")
-   (set_attr "cpu_facility" "*,*,arch13,*,*,z13,z13,*,*")])
+   (set_attr "cpu_facility" "*,*,z15,*,*,z13,z13,*,*")])
 
 ;;
 ;;- Multiply instructions.
@@ -7568,7 +7568,7 @@
 	(and:GPR (not:GPR (match_operand:GPR 1 "nonimmediate_operand" ""))
 		 (match_operand:GPR 2 "general_operand" "")))
    (clobber (reg:CC CC_REGNUM))]
-  "!TARGET_ARCH13
+  "!TARGET_Z15
    && ! reload_completed
    && (GET_CODE (operands[0]) != MEM
       /* Ensure that s390_logical_operator_ok_p will succeed even
@@ -7925,7 +7925,7 @@
    (set (match_operand:GPR 0 "register_operand" "=d")
 	(ANDOR:GPR (not:GPR (match_dup 1))
 		   (match_dup 2)))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
   [(set_attr "op_type" "RRF")])
 
@@ -7937,7 +7937,7 @@
 		    (match_operand:GPR 2 "register_operand" "d"))
 	 (const_int 0)))
    (clobber (match_scratch:GPR 0 "=d"))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
   [(set_attr "op_type" "RRF")])
 
@@ -7947,7 +7947,7 @@
 	(ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
 		   (match_operand:GPR 2 "register_operand" "d")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARCH13"
+  "TARGET_Z15"
   "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
   [(set_attr "op_type" "RRF")])
 
@@ -7965,7 +7965,7 @@
    (set (match_operand:GPR 0 "register_operand" "=d")
 	(ANDOR:GPR (not:GPR (match_dup 1))
 		   (not:GPR (match_dup 2))))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -7977,7 +7977,7 @@
 		    (not:GPR (match_operand:GPR 2 "register_operand" "d")))
 	 (const_int 0)))
    (clobber (match_scratch:GPR 0 "=d"))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -7987,7 +7987,7 @@
 	(ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
 		   (not:GPR (match_operand:GPR 2 "register_operand" "d"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARCH13"
+  "TARGET_Z15"
   "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -8371,7 +8371,7 @@
    (set (match_operand:GPR 0 "register_operand" "=d")
 	(xor:GPR (not:GPR (match_dup 1))
 		    (match_dup 2)))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "nx<GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -8383,7 +8383,7 @@
 			   (match_operand:GPR 2 "register_operand" "d")))
 	 (const_int 0)))
    (clobber (match_scratch:GPR 0 "=d"))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "nx<GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -8393,7 +8393,7 @@
 	(not:GPR (xor:GPR (match_operand:GPR 1 "register_operand" "d")
 			  (match_operand:GPR 2 "register_operand" "d"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARCH13"
+  "TARGET_Z15"
   "nx<GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -11351,34 +11351,34 @@
 ; Population count instruction
 ;
 
-(define_insn "*popcountdi_arch13_cc"
+(define_insn "*popcountdi_z15_cc"
   [(set (reg CC_REGNUM)
 	(compare (popcount:DI (match_operand:DI 1 "register_operand" "d"))
 		 (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=d")
 	(match_dup 1))]
-  "TARGET_ARCH13 && s390_match_ccmode (insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode (insn, CCTmode)"
   "popcnt\t%0,%1,8"
   [(set_attr "op_type" "RRF")])
 
-(define_insn "*popcountdi_arch13_cconly"
+(define_insn "*popcountdi_z15_cconly"
   [(set (reg CC_REGNUM)
 	(compare (popcount:DI (match_operand:DI 1 "register_operand" "d"))
 		 (const_int 0)))
    (clobber (match_scratch:DI 0 "=d"))]
-  "TARGET_ARCH13 && s390_match_ccmode(insn, CCTmode)"
+  "TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
   "popcnt\t%0,%1,8"
   [(set_attr "op_type" "RRF")])
 
-(define_insn "*popcountdi_arch13"
+(define_insn "*popcountdi_z15"
   [(set (match_operand:DI 0 "register_operand" "=d")
 	(popcount:DI (match_operand:DI 1 "register_operand" "d")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARCH13"
+  "TARGET_Z15"
   "popcnt\t%0,%1,8"
   [(set_attr "op_type" "RRF")])
 
-; The pre-arch13 popcount instruction counts the bits of op1 in 8 byte
+; The pre-z15 popcount instruction counts the bits of op1 in 8 byte
 ; portions and stores the result in the corresponding bytes in op0.
 (define_insn "*popcount<mode>_z196"
   [(set (match_operand:INT 0 "register_operand" "=d")
@@ -11422,7 +11422,7 @@
      (clobber (reg:CC CC_REGNUM))])]
   "TARGET_Z196"
 {
-  if (!TARGET_ARCH13)
+  if (!TARGET_Z15)
     {
       emit_insn (gen_popcountdi2_z196 (operands[0], operands[1]));
       DONE;
@@ -11453,7 +11453,7 @@
 
 ; popcount always counts on the full 64 bit. With the z196 version
 ; counting bits per byte we just ignore the upper 4 bytes.  With the
-; arch13 version we have to zero out the upper 32 bits first.
+; z15 version we have to zero out the upper 32 bits first.
 (define_expand "popcountsi2"
   [(set (match_dup 2)
 	(zero_extend:DI (match_operand:SI 1 "register_operand")))
@@ -11463,7 +11463,7 @@
 	(subreg:SI (match_dup 3) 4))]
   "TARGET_Z196"
 {
-  if (!TARGET_ARCH13)
+  if (!TARGET_Z15)
     {
       emit_insn (gen_popcountsi2_z196 (operands[0], operands[1]));
       DONE;
@@ -11501,7 +11501,7 @@
 	(subreg:HI (match_dup 3) 6))]
   "TARGET_Z196"
 {
-  if (!TARGET_ARCH13)
+  if (!TARGET_Z15)
     {
       emit_insn (gen_popcounthi2_z196 (operands[0], operands[1]));
       DONE;
@@ -11516,7 +11516,7 @@
 ; For popcount on a single byte the old z196 style popcount
 ; instruction is ideal.  Since it anyway does a byte-wise popcount we
 ; just use it instead of zero extending the QImode input to DImode and
-; using the arch13 popcount variant.
+; using the z15 popcount variant.
 (define_expand "popcountqi2"
   [; popcnt op0, op1
    (parallel [(set (match_operand:QI 0 "register_operand" "")
diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
index 639f1679a56..6a6e1f75736 100644
--- a/gcc/config/s390/s390.opt
+++ b/gcc/config/s390/s390.opt
@@ -110,7 +110,10 @@ EnumValue
 Enum(processor_type) String(arch12) Value(PROCESSOR_3906_Z14)
 
 EnumValue
-Enum(processor_type) String(arch13) Value(PROCESSOR_8561_ARCH13)
+Enum(processor_type) String(z15) Value(PROCESSOR_8561_Z15)
+
+EnumValue
+Enum(processor_type) String(arch13) Value(PROCESSOR_8561_Z15)
 
 EnumValue
 Enum(processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 140ef474a92..21cc76534b1 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -70,7 +70,7 @@
 
 (define_mode_iterator V_128_NOSINGLE [V16QI V8HI V4SI V4SF V2DI V2DF])
 
-; 32 bit int<->fp vector conversion instructions are available since VXE2 (arch13).
+; 32 bit int<->fp vector conversion instructions are available since VXE2 (z15).
 (define_mode_iterator VX_VEC_CONV_BFP [V2DF (V4SF "TARGET_VXE2")])
 (define_mode_iterator VX_VEC_CONV_INT [V2DI (V4SI "TARGET_VXE2")])
 
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 3020bc94d3e..5ec3fb4fe58 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -2147,7 +2147,7 @@
   "<vw>fmax<sdx>b\t%v0,%v1,%v2,%b3"
   [(set_attr "op_type" "VRR")])
 
-; The element reversal builtins introduced with arch13 have been made
+; The element reversal builtins introduced with z15 have been made
 ; available also for older CPUs down to z13.
 (define_expand "eltswap<mode>"
   [(set (match_operand:VEC_HW                 0 "nonimmediate_operand" "")
@@ -2181,8 +2181,8 @@
    vster<bhfgq>\t%v1,%v0"
   [(set_attr "op_type" "*,VRX,VRX")])
 
-; arch13 has instructions for doing element reversal from mem to reg
-; or the other way around.  For reg to reg or on pre arch13 machines
+; z15 has instructions for doing element reversal from mem to reg
+; or the other way around.  For reg to reg or on pre z15 machines
 ; we have to emulate it with vector permute.
 (define_insn_and_split "*eltswap<mode>_emu"
   [(set (match_operand:VEC_HW                 0 "nonimmediate_operand" "=vR")