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2015-03-02 Terry Guo <terry.guo@arm.com>
Backport from mainline r220999
2015-02-26 Terry Guo <terry.guo@arm.com>
* config/arm/arm-cores.def (cortex-m7): Add flag FL_NO_VOLATILE_CE.
* config/arm/arm-protos.h (FL_NO_VOLATILE_CE): New flag.
(arm_arch_no_volatile_ce): Declare new global variable.
* config/arm/arm.c (arm_arch_no_volatile_ce): New global variable.
(arm_option_override): Assign value to arm_arch_no_volatile_ce.
* config/arm/arm.h (arm_arch_no_volatile_ce): Declare it.
(TARGET_NO_VOLATILE_CE): New macro.
* config/arm/arm.md (arm_comparison_operator): Disabled if not allow
volatile memory access in IT block
2015-02-27 Terry Guo <terry.guo@arm.com>
* config/arm/t-rmprofile (Multilibs for M7): Slightly adjust the path.
2015-01-29 Terry Guo <terry.guo@arm.com>
Backport from mainline r220197
2015-01-28 Terry Guo <terry.guo@arm.com>
* config/arm/thumb1.md (*thumb1_movpc_insn): New insn pattern.
2015-01-29 Terry Guo <terry.guo@arm.com>
Backport from mainline r220106
2015-01-26 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (arm_file_start): Update the assignment of
Tag_ABI_HardFP_use.
2015-01-15 Terry Guo <terry.guo@arm.com>
* config/arm/t-rmprofile (Multilibs for M7): Five new multilib
variants for Cortex-M7.
2014-12-02 Terry Guo <terry.guo@arm.com>
Backport from mainline r214214
2014-08-20 Terry Guo <terry.guo@arm.com>
* config/arm/thumb1.md (64bit splitter): Replace const_double_operand
with immediate_operand.
2014-12-02 Terry Guo <terry.guo@arm.com>
Backport from mainline r211817
2014-06-19 Terry Guo <terry.guo@arm.com>
* config/arm/thumb1.md (define_split): Split 64bit constant in earlier
stage.
2014-11-19 Terry Guo <terry.guo@arm.com>
Backport from mainline r217687
2014-11-17 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
* config/arm/arm.md (generic_sched): Exclude cortex-m7.
(generic_vfp): Likewise.
* config/arm/cortex-m7.md: Pipeline description for cortex-m7.
2014-11-10 Hale Wang <hale.wang@arm.com>
Backport from mainline r217175
2014-11-06 Hale Wang <hale.wang@arm.com>
* config/arm/arm-cores.def: Add support for
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm.c: Update the rtx-costs for MUL.
* config/arm/bpabi.h: Handle
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.
* doc/invoke.texi: Document
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.
2014-11-10 Hale Wang <hale.wang@arm.com>
Backport from mainline r217173
2014-11-06 Hale Wang <hale.wang@arm.com>
* config/arm/arm.c: Add cortex-m7 tune.
* config/arm/arm-cores.def: Use cortex-m7 tune.
2014-11-03 Hale Wang <hale.wang@arm.com>
* Makefile.in (tree-switch-shortcut): New object file.
* common.opt (-ftree-switch-shortcut): New option.
* opts.c: Likewise.
* params.def: Define the maxinum number of instructions and paths
to duplicate when shortcutting a switch.
* passes.def (pass_tree_switch_shortcut): New pass.
* timevar.def (TV_TREE_SWITCH_SHORTCUT): Define new value.
* tree-pass.h (make_pass_tree_switch_shortcut): New pass.
* tree-switch-shortcut.c: New file.
2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
Backport from mainline r215444
2014-09-22 Zhenqiang Chen <zhenqiang.chen@arm.com>
* config/arm/arm.c: #include "tm-constrs.h"
(thumb1_size_rtx_costs): Adjust rtx costs.
2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
Backport from mainline r215540
2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
* ira-color.c (assign_hard_reg): Ignore conflict cost if the
HARD_REGNO is not availabe for CONFLICT_A.
testsuite/ChangeLog:
2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.target/arm/pr63210.c: New test.
2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
Backport from mainline r213691
2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
* tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
testsuite/ChangeLog
2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
2014-10-06 Terry Guo <terry.guo@arm.com>
Backport from mainline r215711
2014-09-30 Terry Guo <terry.guo@arm.com>
* config/arm/arm-cores.def (cortex-m7): New core name.
* config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
(fpv5-d16): Ditto.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm.h (TARGET_VFP5): New macro.
* config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
* config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
* doc/invoke.texi: Document new cpu and fpu names.
2014-10-05 Terry Guo <terry.guo@arm.com>
Backport from mainline r212750
2014-07-17 Terry Guo <terry.guo@arm.com>
* config/arm/types.md (alu_reg): Replaced by alu_sreg and alu_dsp_reg.
(alus_reg): Renamed to alus_sreg.
* config/arm/arm-fixed.md: Change type of non-dsp instructions
from alu_reg to alu_sreg. Change type of dsp instructions from
alu_reg to alu_dsp_reg.
* config/arm/thumb1.md: Likewise.
* config/arm/thumb2.md: Likewise.
* config/arm/arm.c (cortexa7_older_only): Use new ALU type names.
* config/arm/arm1020e.md (1020alu_op): Replace alu_reg and alus_reg
with alu_sreg and alus_sreg.
* config/arm/arm1026ejs.md (alu_op): Likewise.
* config/arm/arm1136jfs.md (11_alu_op): Likewise.
* config/arm/arm926ejs.md (9_alu_op): Likewise.
* config/arm/fa526.md (526_alu_op): Likewise.
* config/arm/fa606te.md (606te_alu_op): Likewise.
* config/arm/fa626te.md (626te_alu_op): Likewise.
* config/arm/fa726te.md (726te_alu_op): Likewise.
* config/arm/fmp626.md (mp626_alu_op): Likewise.
* config/arm/arm.md (core_cycles): Replace alu_reg and alus_reg with
alu_sreg, alu_dsp_reg and alus_sreg.
* config/arm/cortex-a15.md (cortex_a15_alu): Likewise.
* config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
* config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
* config/arm/cortex-a7.md (cortex_a7_alu_sreg): Likewise.
* config/arm/cortex-a8.md (cortex_a8_alu): Likewise.
* config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
* config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
* config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
* config/arm/marvell-pj4.md (pj4_alu, pj4_alu_conds): Likewise.
* config/aarch64/aarch64.md (*addsi3_aarch64, *addsi3_aarch64_uxtw,
subsi3, *adddi3_aarch64, *subsi3_uxtw, subdi3, absdi2, neg<mode>2,
*negsi2_uxtw, tlsle_small_<mode>): Rename type alu_reg to alu_sreg.
(add<mode>3_compare0, *addsi3_compare0_uxtw, *add<mode>3nr_compare0,
sub<mode>3_compare0, *compare_neg<mode>, *neg<mode>2_compare0,
subsi3_compare0_uxtw, *negsi2_compare0_uxtw, *cmp<mode>): Rename type
alus_reg to alus_sreg.
2014-10-05 Terry Guo <terry.guo@arm.com>
Backport from mainline r211443
2014-06-11 Terry Guo <terry.guo@arm.com>
* config/arm/arm.md (*thumb1_adddi3): Move into new file thumb1.md.
(*thumb1_addsi3): Ditto.
(*thumb_subdi3): Ditto.
(thumb1_subsi3_insn): Ditto.
(*thumb_mulsi3): Ditto.
(*thumb_mulsi3_v6): Ditto.
(*thumb1_andsi3_insn): Ditto.
(thumb1_bicsi3): Ditto.
(*thumb1_iorsi3_insn): Ditto.
(*thumb1_xorsi3_insn): Ditto.
(*thumb1_ashlsi3): Ditto.
(*thumb1_ashrsi3): Ditto.
(*thumb1_lshrsi3): Ditto.
(*thumb1_rotrsi3): Ditto.
(*thumb1_negdi2): Ditto.
(*thumb1_negsi2): Ditto.
(*thumb1_abssi2): Ditto.
(*thumb1_neg_abssi2): Ditto.
(*thumb1_one_cmplsi2): Ditto.
(*thumb1_zero_extendhisi2): Ditto.
(*thumb1_zero_extendqisi2): Ditto.
(*thumb1_zero_extendqisi2_v6): Ditto.
(thumb1_extendhisi2): Ditto.
(thumb1_extendqisi2): Ditto.
(*thumb1_movdi_insn): Ditto.
(*thumb1_movsi_insn): Ditto.
(*thumb1_movhi_insn): Ditto.
(thumb_movhi_clobber): Ditto.
(*thumb1_movqi_insn): Ditto.
(*thumb1_movhf): Ditto.
(*thumb1_movsf_insn): Ditto.
(*thumb_movdf_insn): Ditto.
(movmem12b): Ditto.
(movmem8b): Ditto.
(cbranchqi4): Ditto.
(cbranchsi4_insn): Ditto.
(cbranchsi4_scratch): Ditto.
(*negated_cbranchsi4): Ditto.
(*tbit_cbranch): Ditto.
(*tlobits_cbranch): Ditto.
(*tstsi3_cbranch): Ditto.
(*cbranchne_decr1): Ditto.
(*addsi3_cbranch): Ditto.
(*addsi3_cbranch_scratch): Ditto.
(*thumb_cmpdi_zero): Ditto.
(cstoresi_eq0_thumb1): Ditto.
(cstoresi_ne0_thumb1): Ditto.
(*cstoresi_eq0_thumb1_insn): Ditto.
(*cstoresi_ne0_thumb1_insn): Ditto.
(cstoresi_nltu_thumb1): Ditto.
(cstoresi_ltu_thumb1): Ditto.
(thumb1_addsi3_addgeu): Ditto.
(*thumb_jump): Ditto.
(*call_reg_thumb1_v5): Ditto.
(*call_reg_thumb1): Ditto.
(*call_value_reg_thumb1_v5): Ditto.
(*call_value_reg_thumb1): Ditto.
(*call_insn): Ditto.
(*call_value_insn): Ditto.
(thumb1_casesi_internal_pic): Ditto.
(thumb1_casesi_dispatch): Ditto.
(*thumb1_indirect_jump): Ditto.
(prologue_thumb1_interwork): Ditto.
(*epilogue_insns): Ditto.
(consttable_1): Ditto.
(consttable_2): Ditto.
(tablejump): Ditto.
(*thumb1_tablejump): Ditto.
(thumb_eh_return): Ditto.
(define_peephole2): Two of them are thumb1 only and got moved into
new file thumb1.md.
(define_split): Six of them are thumb1 only and got moved into new
file thumb1.md.
* config/arm/thumb1.md: New file comprised of above thumb1 only
patterns.
2014-09-30 Zhenqiang Chen <zhenqiang.chen@arm.com>
* config/arm/arm.c (arm_option_override): Disable loop2_invariant
pass when optimize_size and ira-loop-pressure is not enabled.
2014-05-12 Terry Guo <terry.guo@arm.com>
* config.gcc (--with-multilib-list): Accept arm embedded cores.
* configure.ac (with_multilib_list): Export for being used in arm
embedded multilib fragment.
* configure: Regenerated.
* Makefile.in (with_multilib_list): Import for being used in
multilib fragment.
* config/arm/t-rmprofile: New multilib fragment for arm embedded
cores.
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