From 6fb93118727d4942147f3124218561cac8f075b5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 30 Jun 1998 16:29:12 +0000 Subject: * alpha.c (reg_or_6bit_operand): Recognize CONSTANT_P_RTX. (reg_or_8bit_operand, cint8_operand, add_operand): Likewise. (sext_add_operand, and_operand, or_operand): Likewise. (reg_or_cint_operand, some_operand, input_operand): Likewise. * alpha.h (PREDICATE_CODES): Add CONSTANT_P_RTX where needed. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@20847 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/config/alpha/alpha.c | 26 ++++++++++++++++----- gcc/config/alpha/alpha.h | 60 ++++++++++++++++++++++++------------------------ 2 files changed, 50 insertions(+), 36 deletions(-) diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 5bcb1fb3abe..2ba9ac3d7c4 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -337,6 +337,7 @@ reg_or_6bit_operand (op, mode) { return ((GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 64) + || GET_CODE (op) == CONSTANT_P_RTX || register_operand (op, mode)); } @@ -350,6 +351,7 @@ reg_or_8bit_operand (op, mode) { return ((GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100) + || GET_CODE (op) == CONSTANT_P_RTX || register_operand (op, mode)); } @@ -360,8 +362,9 @@ cint8_operand (op, mode) register rtx op; enum machine_mode mode ATTRIBUTE_UNUSED; { - return (GET_CODE (op) == CONST_INT - && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100); + return ((GET_CODE (op) == CONST_INT + && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100) + || GET_CODE (op) == CONSTANT_P_RTX); } /* Return 1 if the operand is a valid second operand to an add insn. */ @@ -375,6 +378,8 @@ add_operand (op, mode) return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K') || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L') || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')); + else if (GET_CODE (op) == CONSTANT_P_RTX) + return 1; return register_operand (op, mode); } @@ -390,6 +395,8 @@ sext_add_operand (op, mode) if (GET_CODE (op) == CONST_INT) return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255); + else if (GET_CODE (op) == CONSTANT_P_RTX) + return 1; return register_operand (op, mode); } @@ -420,6 +427,8 @@ and_operand (op, mode) return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100 || zap_mask (INTVAL (op))); + else if (GET_CODE (op) == CONSTANT_P_RTX) + return 1; return register_operand (op, mode); } @@ -434,6 +443,8 @@ or_operand (op, mode) if (GET_CODE (op) == CONST_INT) return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100); + else if (GET_CODE (op) == CONSTANT_P_RTX) + return 1; return register_operand (op, mode); } @@ -532,7 +543,9 @@ reg_or_cint_operand (op, mode) register rtx op; enum machine_mode mode; { - return GET_CODE (op) == CONST_INT || register_operand (op, mode); + return (GET_CODE (op) == CONST_INT + || GET_CODE (op) == CONSTANT_P_RTX + || register_operand (op, mode)); } /* Return 1 if OP is something that can be reloaded into a register; @@ -548,8 +561,8 @@ some_operand (op, mode) switch (GET_CODE (op)) { - case REG: case MEM: case CONST_DOUBLE: - case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST: + case REG: case MEM: case CONST_DOUBLE: case CONST_INT: case LABEL_REF: + case SYMBOL_REF: case CONST: case CONSTANT_P_RTX: return 1; case SUBREG: @@ -580,7 +593,7 @@ input_operand (op, mode) case LABEL_REF: case SYMBOL_REF: case CONST: - /* This handles both the Windows/NT and OSF cases. */ + /* This handles both the Windows/NT and OSF cases. */ return mode == ptr_mode || mode == DImode; case REG: @@ -598,6 +611,7 @@ input_operand (op, mode) return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode); case CONST_INT: + case CONSTANT_P_RTX: return mode == QImode || mode == HImode || add_operand (op, mode); default: diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index d7bb2d16887..39b17351359 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -2181,36 +2181,36 @@ do { \ } /* Define the codes that are matched by predicates in alpha.c. */ -#define PREDICATE_CODES \ - {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ - {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ - {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ - {"cint8_operand", {CONST_INT}}, \ - {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ - {"add_operand", {SUBREG, REG, CONST_INT}}, \ - {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ - {"const48_operand", {CONST_INT}}, \ - {"and_operand", {SUBREG, REG, CONST_INT}}, \ - {"or_operand", {SUBREG, REG, CONST_INT}}, \ - {"mode_mask_operand", {CONST_INT}}, \ - {"mul8_operand", {CONST_INT}}, \ - {"mode_width_operand", {CONST_INT}}, \ - {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ - {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ - {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \ - {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ - {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ - {"fp0_operand", {CONST_DOUBLE}}, \ - {"current_file_function_operand", {SYMBOL_REF}}, \ - {"call_operand", {REG, SYMBOL_REF}}, \ - {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ - SYMBOL_REF, CONST, LABEL_REF}}, \ - {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ - SYMBOL_REF, CONST, LABEL_REF}}, \ - {"aligned_memory_operand", {MEM}}, \ - {"unaligned_memory_operand", {MEM}}, \ - {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ - {"any_memory_operand", {MEM}}, \ +#define PREDICATE_CODES \ + {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"cint8_operand", {CONST_INT, CONSTANT_P_RTX}}, \ + {"reg_or_cint_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"sext_add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"const48_operand", {CONST_INT}}, \ + {"and_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"or_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ + {"mode_mask_operand", {CONST_INT}}, \ + {"mul8_operand", {CONST_INT}}, \ + {"mode_width_operand", {CONST_INT}}, \ + {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ + {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ + {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \ + {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ + {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ + {"fp0_operand", {CONST_DOUBLE}}, \ + {"current_file_function_operand", {SYMBOL_REF}}, \ + {"call_operand", {REG, SYMBOL_REF}}, \ + {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ + SYMBOL_REF, CONST, LABEL_REF, CONSTANT_P_RTX}}, \ + {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ + SYMBOL_REF, CONST, LABEL_REF, CONSTANT_P_RTX}}, \ + {"aligned_memory_operand", {MEM}}, \ + {"unaligned_memory_operand", {MEM}}, \ + {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ + {"any_memory_operand", {MEM}}, \ {"hard_fp_register_operand", {SUBREG, REG}}, /* Tell collect that the object format is ECOFF. */ -- cgit v1.2.3