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-rw-r--r--gcc/config/mn10300/mn10300.md57
1 files changed, 53 insertions, 4 deletions
diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md
index 31239559192..770f7c5428e 100644
--- a/gcc/config/mn10300/mn10300.md
+++ b/gcc/config/mn10300/mn10300.md
@@ -1,5 +1,5 @@
;; GCC machine description for Matsushita MN10300
-;; Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
+;; Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
;; Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
@@ -1258,16 +1258,65 @@
[(set_attr "cc" "clobber,set_znv")])
(define_insn ""
+ [(set (match_operand:QI 0 "memory_operand" "=R,T")
+ (and:QI
+ (match_dup 0)
+ (not:QI (match_operand:QI 1 "nonmemory_operand" "i,d"))))]
+ ""
+ "@
+ bclr %U1,%A0
+ bclr %1,%0"
+ [(set_attr "cc" "clobber,clobber")])
+
+(define_insn ""
[(set (match_operand:QI 0 "nonimmediate_operand" "+R,d")
(subreg:QI
(ior:SI (subreg:SI (match_dup 0) 0)
(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
""
"@
- bset %1,%A0
+ bset %U1,%A0
or %1,%0"
[(set_attr "cc" "clobber,set_znv")])
+(define_expand "iorqi3"
+ [(set (match_operand:QI 0 "nonimmediate_operand" "")
+ (ior:QI (match_operand:QI 1 "nonimmediate_operand" "")
+ (match_operand:QI 2 "nonmemory_operand" "")))]
+ ""
+ "")
+
+(define_insn ""
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=R,T,r")
+ (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
+ ;; This constraint should really be nonmemory_operand,
+ ;; but making it general_operand, along with the
+ ;; condition that not both input operands are MEMs, it
+ ;; here helps combine do a better job.
+ (match_operand:QI 2 "general_operand" "i,d,ir")))]
+ "TARGET_AM33 &&
+ (GET_CODE (operands[2]) != MEM || GET_CODE (operands[1]) != MEM)"
+ "@
+ bset %U2,%A0
+ bset %2,%0
+ or %2,%0"
+ [(set_attr "cc" "clobber,clobber,set_znv")])
+
+(define_insn ""
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=R,T,d")
+ (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
+ ;; This constraint should really be nonmemory_operand,
+ ;; but making it general_operand, along with the
+ ;; condition that not both input operands are MEMs, it
+ ;; here helps combine do a better job.
+ (match_operand:QI 2 "general_operand" "i,d,id")))]
+ "GET_CODE (operands[2]) != MEM || GET_CODE (operands[1]) != MEM"
+ "@
+ bset %U2,%A0
+ bset %2,%0
+ or %2,%0"
+ [(set_attr "cc" "clobber,clobber,set_znv")])
+
(define_insn ""
[(set (cc0)
(zero_extract:SI (match_operand:SI 0 "register_operand" "dx")
@@ -1335,7 +1384,7 @@
if (GET_CODE (operands[0]) == REG)
output_asm_insn (\"btst %1,%0\", xoperands);
else
- output_asm_insn (\"btst %1,%A0\", xoperands);
+ output_asm_insn (\"btst %U1,%A0\", xoperands);
return \"\";
}"
[(set_attr "cc" "clobber")])
@@ -1354,7 +1403,7 @@
(match_operand:SI 1 "const_8bit_operand" "")))]
""
"@
- btst %1,%A0
+ btst %U1,%A0
btst %1,%0"
[(set_attr "cc" "clobber")])