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authorKelvin Nilsen <kelvin@gcc.gnu.org>2016-05-09 15:16:08 +0000
committerKelvin Nilsen <kelvin@gcc.gnu.org>2016-05-09 15:16:08 +0000
commitb874aca0096fe668becf57e9d5b6685d679b5458 (patch)
treeb82650a81d438ecc9e73f14f7d03a5b952898d0a
parent3999c51103d0f56db588c425d91b112e138bc924 (diff)
add documentation
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/kelvin-rfc2463@236039 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/config/rs6000/rs6000.h1
-rw-r--r--gcc/config/rs6000/rs6000.opt2
-rw-r--r--gcc/doc/extend.texi55
3 files changed, 55 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 6534eaeaea6..db02f65ebfb 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2702,6 +2702,7 @@ extern int frame_pointer_needed;
| RS6000_BTM_VSX \
| RS6000_BTM_P8_VECTOR \
| RS6000_BTM_P9_VECTOR \
+ | RS6000_BTM_P9_MISC \
| RS6000_BTM_MODULO \
| RS6000_BTM_CRYPTO \
| RS6000_BTM_FRE \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 10c2dcc7c18..74a11f4f450 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -610,7 +610,7 @@ Target Report Mask(P9_FUSION) Var(rs6000_isa_flags)
Fuse certain operations together for better performance on power9.
mpower9-misc
-Target Report Mask(P9_MISC) Var(rs6000_isa_flags)
+Target Undocumented Report Mask(P9_MISC) Var(rs6000_isa_flags)
Use/do not certain scalar instructions added in ISA 3.0.
mpower9-vector
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index e74c767db3b..461e3b36176 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -13902,12 +13902,31 @@ result returned from the @code{vec_srv} function is a
with this resulting value coerced to the @code{unsigned char} type.
The following built-in functions are available for the PowerPC family
-of processors, starting with ISA 3.0 or later (@option{-mcpu=power9})
-or with @option{-mmodulo}:
+of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}):
@smallexample
long long __builtin_darn (void);
long long __builtin_darn_raw (void);
int __builtin_darn_32 (void);
+
+int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_lt_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_gt_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_gt_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_eq_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_eq_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
@end smallexample
The @code{__builtin_darn} and @code{__builtin_darn_raw}
@@ -13918,6 +13937,38 @@ random number. The @code{__builtin_darn_raw} function provides a
64-bit raw random number. The @code{__builtin_darn_32} function
provides a 32-bit random number.
+The @code{__builtin_dfp_dtstsfi_lt} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+is less than its @code{comparison} argument. The
+@code{__builtin_dfp_dtstsfi_lt_dd} and
+@code{__builtin_dfp_dtstsfi_lt_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_gt} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+is greater than its @code{comparison} argument. The
+@code{__builtin_dfp_dtstsfi_gt_dd} and
+@code{__builtin_dfp_dtstsfi_gt_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_eq} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+equals its @code{comparison} argument. The
+@code{__builtin_dfp_dtstsfi_eq_dd} and
+@code{__builtin_dfp_dtstsfi_eq_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_ov} function returns a non-zero value
+if and only if its @code{value} argument has an undefined number of
+significant digits, such as when @code{value} is an encoding of @code{NaN}.
+The @code{__builtin_dfp_dtstsfi_ov_dd} and
+@code{__builtin_dfp_dtstsfi_ov_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
The following built-in functions are available for the PowerPC family
of processors when hardware decimal floating point
(@option{-mhard-dfp}) is available: