tidy up

git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/kelvin-rfc2463@235997 138bc75d-0d04-0410-961f-82ee72b054a4

7 files changed, 32 insertions, 33 deletions

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 79a0f2aa47b..b5f4eef876e 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3609,7 +3609,6 @@
 	 (match_operand:V2DF 4 "zero_constant" "j")))
    (clobber (match_scratch:V1TI 0 "=v"))]
   "TARGET_P8_VECTOR"
-  
   "bcd<bcd_add_sub>. %0,%1,%2,%3"
   [(set_attr "length" "4")
    (set_attr "type" "vecsimple")])
@@ -3635,7 +3634,7 @@
 (define_insn "darn_32"
   [(set (match_operand:SI 0 "register_operand" "")
         (unspec:SI [(const_int 0)] UNSPEC_DARN_32))]
-  "TARGET_MODULO"
+  "TARGET_P9_MISC"
   {
      return "darn %0,0";
   }
@@ -3645,7 +3644,7 @@
 (define_insn "darn_raw"
   [(set (match_operand:DI 0 "register_operand" "")
         (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))]
-  "TARGET_MODULO && TARGET_64BIT"
+  "TARGET_P9_MISC && TARGET_64BIT"
   {
      return "darn %0,2";
   }
@@ -3655,7 +3654,7 @@
 (define_insn "darn"
   [(set (match_operand:DI 0 "register_operand" "")
         (unspec:DI [(const_int 0)] UNSPEC_DARN))]
-  "TARGET_MODULO && TARGET_64BIT"
+  "TARGET_P9_MISC && TARGET_64BIT"
   {
      return "darn %0,1";
   }
diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index bf55b1a1c5d..14ac59534b1 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -367,7 +367,7 @@
    	(BCD_TEST:SI (match_dup 3) 
 		     (const_int 0)))
   ]
-  "TARGET_P9_VECTOR"
+  "TARGET_P9_MISC"
 {
   operands[3] = gen_reg_rtx (CCFPmode);
   operands[4] = CONST0_RTX (SImode);
@@ -380,7 +380,7 @@
 	 	           (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
           UNSPEC_DTSTSFI)
 	 (match_operand:SI 3 "zero_constant" "j")))]
-  "TARGET_P9_VECTOR"
+  "TARGET_P9_MISC"
   {
     /* If immediate operand is greater than 63, it will behave as if
      * the value had been 63.  The code generator does not support 
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 12d304174be..3c806551d51 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -659,7 +659,7 @@
 #define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE)                      \
   RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -667,7 +667,7 @@
 #define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE)				\
   RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_UNARY),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -679,7 +679,7 @@
 #define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO                                   \
+		    RS6000_BTM_P9_MISC					\
                      | RS6000_BTM_64BIT,		/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
@@ -692,8 +692,7 @@
 #define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    (RS6000_BTM_MODULO 					\
-		     | RS6000_BTM_DFP),			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -701,8 +700,7 @@
 #define BU_P9_DFP_MISC_1(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    (RS6000_BTM_MODULO 					\
-		     | RS6000_BTM_DFP),			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -710,8 +708,7 @@
 #define BU_P9_DFP_MISC_2(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    (RS6000_BTM_MODULO 					\
-		     | RS6000_BTM_DFP),			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -720,7 +717,7 @@
 #define BU_P9_DFP_OVERLOAD_1(ENUM, NAME)				\
   RS6000_BUILTIN_1 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
 		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
 		     | RS6000_BTC_UNARY),				\
 		    CODE_FOR_nothing)			/* ICODE */
@@ -728,7 +725,7 @@
 #define BU_P9_DFP_OVERLOAD_2(ENUM, NAME)				\
   RS6000_BUILTIN_2 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
 		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
 		     | RS6000_BTC_BINARY),				\
 		    CODE_FOR_nothing)			/* ICODE */
@@ -736,7 +733,7 @@
 #define BU_P9_DFP_OVERLOAD_3(ENUM, NAME)				\
   RS6000_BUILTIN_3 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
 		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
 		     | RS6000_BTC_TERNARY),				\
 		    CODE_FOR_nothing)			/* ICODE */
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index ed4af4017b9..9f5ec4823b0 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -69,6 +69,7 @@
 				 | OPTION_MASK_P9_FUSION		\
 				 | OPTION_MASK_P9_DFORM_SCALAR		\
 				 | OPTION_MASK_P9_DFORM_VECTOR		\
+				 | OPTION_MASK_P9_MISC			\
 				 | OPTION_MASK_P9_VECTOR)
 
 #define POWERPC_7400_MASK	(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)
@@ -108,6 +109,7 @@
 				 | OPTION_MASK_P9_DFORM_VECTOR		\
 				 | OPTION_MASK_P9_FUSION		\
 				 | OPTION_MASK_P9_MINMAX		\
+				 | OPTION_MASK_P9_MISC		\
 				 | OPTION_MASK_P9_VECTOR		\
 				 | OPTION_MASK_POPCNTB			\
 				 | OPTION_MASK_POPCNTD			\
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index b7f7cba19a0..8f4ac53e7e9 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3666,6 +3666,7 @@ rs6000_builtin_mask_calculate (void)
 	  | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL      : 0)
 	  | ((TARGET_P8_VECTOR)		    ? RS6000_BTM_P8_VECTOR : 0)
 	  | ((TARGET_P9_VECTOR)		    ? RS6000_BTM_P9_VECTOR : 0)
+	  | ((TARGET_P9_MISC)		    ? RS6000_BTM_P9_MISC : 0)
 	  | ((TARGET_MODULO)		    ? RS6000_BTM_MODULO    : 0)
 	  | ((TARGET_64BIT)		    ? RS6000_BTM_64BIT    : 0)
 	  | ((TARGET_CRYPTO)		    ? RS6000_BTM_CRYPTO	   : 0)
@@ -15185,25 +15186,18 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode)
 	   == (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR))
     error ("Builtin function %s requires the -mhard-dfp and"
 	   " -mpower8-vector options", name);
-  /*
-   * kelvin thinking about this.  as described currently in
-   * rs6000-builtin.def, the BU_P9_DFP_MISC_?? macros specify flag
-   * RS6000_BTM_MODULO | RS6000_BTM_DFP.  Maybe that's an error.
-   * Should probably just list RS6000_BTM_MODULO.  (because BTM_MODULO
-   * means Power9 and there are no optional features of Power9.)
-   *
-  else if ((fnmask & (RS6000_BTM_DFP | RS6000_BTM_P9_VECTOR))
-	   == (RS6000_BTM_DFP | RS6000_BTM_P9_VECTOR))
-    error ("Builtin function %s requires the -mhard-dfp and"
-	   " -mpower9-vector options", name);
-  */
-
   else if ((fnmask & RS6000_BTM_DFP) != 0)
     error ("Builtin function %s requires the -mhard-dfp option", name);
   else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0)
     error ("Builtin function %s requires the -mpower8-vector option", name);
   else if ((fnmask & RS6000_BTM_P9_VECTOR) != 0)
     error ("Builtin function %s requires the -mpower9-vector option", name);
+  else if ((fnmask & (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT)) 
+	   == (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT))
+    error ("Builtin function %s requires the -mpower9-misc and"
+	   " -m64 options", name);
+  else if ((fnmask & RS6000_BTM_P9_MISC) == RS6000_BTM_P9_MISC)
+    error ("Builtin function %s requires the -mpower9-misc option", name);
   else if ((fnmask & (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
 	   == (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
     error ("Builtin function %s requires the -mhard-float and"
@@ -35253,6 +35247,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "power9-dform-vector",	OPTION_MASK_P9_DFORM_VECTOR,	false, true  },
   { "power9-fusion",		OPTION_MASK_P9_FUSION,		false, true  },
   { "power9-minmax",		OPTION_MASK_P9_MINMAX,		false, true  },
+  { "power9-misc",		OPTION_MASK_P9_MISC,		false, true  },
   { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
   { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
   { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
@@ -35308,6 +35303,7 @@ static struct rs6000_opt_mask const rs6000_builtin_mask_names[] =
   { "cell",		 RS6000_BTM_CELL,	false, false },
   { "power8-vector",	 RS6000_BTM_P8_VECTOR,	false, false },
   { "power9-vector",	 RS6000_BTM_P9_VECTOR,	false, false },
+  { "power9-misc",	 RS6000_BTM_P9_MISC,	false, false },
   { "crypto",		 RS6000_BTM_CRYPTO,	false, false },
   { "htm",		 RS6000_BTM_HTM,	false, false },
   { "hard-dfp",		 RS6000_BTM_DFP,	false, false },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 083c1760653..6534eaeaea6 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -625,6 +625,7 @@ extern int rs6000_vector_align[];
 #define MASK_NO_UPDATE			OPTION_MASK_NO_UPDATE
 #define MASK_P8_VECTOR			OPTION_MASK_P8_VECTOR
 #define MASK_P9_VECTOR			OPTION_MASK_P9_VECTOR
+#define MASK_P9_MISC			OPTION_MASK_P9_MISC
 #define MASK_POPCNTB			OPTION_MASK_POPCNTB
 #define MASK_POPCNTD			OPTION_MASK_POPCNTD
 #define MASK_PPC_GFXOPT			OPTION_MASK_PPC_GFXOPT
@@ -669,7 +670,6 @@ extern int rs6000_vector_align[];
 #define RS6000_BTM_MODULO		OPTION_MASK_MODULO
 #endif
 
-
 /* For power systems, we want to enable Altivec and VSX builtins even if the
    user did not use -maltivec or -mvsx to allow the builtins to be used inside
    of #pragma GCC target or the target attribute to change the code level for a
@@ -2682,6 +2682,7 @@ extern int frame_pointer_needed;
 #define RS6000_BTM_VSX		MASK_VSX	/* VSX (vector/scalar).  */
 #define RS6000_BTM_P8_VECTOR	MASK_P8_VECTOR	/* ISA 2.07 vector.  */
 #define RS6000_BTM_P9_VECTOR	MASK_P9_VECTOR	/* ISA 3.00 vector.  */
+#define RS6000_BTM_P9_MISC	MASK_P9_MISC	/* ISA 3.00 misc. non-vector */
 #define RS6000_BTM_CRYPTO	MASK_CRYPTO	/* crypto funcs.  */
 #define RS6000_BTM_HTM		MASK_HTM	/* hardware TM funcs.  */
 #define RS6000_BTM_SPE		MASK_STRING	/* E500 */
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7b1670c9bbb..10c2dcc7c18 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -609,9 +609,13 @@ mpower9-fusion
 Target Report Mask(P9_FUSION) Var(rs6000_isa_flags)
 Fuse certain operations together for better performance on power9.
 
+mpower9-misc
+Target Report Mask(P9_MISC) Var(rs6000_isa_flags)
+Use/do not certain scalar instructions added in ISA 3.0.
+
 mpower9-vector
 Target Report Mask(P9_VECTOR) Var(rs6000_isa_flags)
-Use/do not use vector and scalar instructions added in ISA 3.0.
+Use/do not use vector instructions added in ISA 3.0.
 
 mpower9-dform-scalar
 Target Report Mask(P9_DFORM_SCALAR) Var(rs6000_isa_flags)