gcc/ChangeLog:

2016-04-18  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* doc/extend.texi: Add documentation for the vec_adu(),
	vec_adub(), vec_aduh(), and vec_aduw() built-ins.
	* config/rs6000/rs6000.h (MASK_P9_VECTOR): New macro definition.
	This change is redundant with a previously merged patch.
	(RS6000_BTM_P9_VECTOR): Correct error in previous definition of
	this macro.  This change is redundant with a previously merged patch.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Added
	three P9V_BUILTIN_VEC_VADU entries for three overloaded variants
	of the builtin_vec_vadu() function and P9V_BUILTIN_VEC_VADUB,
	P9V_BUILTIN_VEC_VADUH, and P9V_BUILTIN_VEC_VADUW entries for the
	builtin_vec_vadub(), builtin_vec_vaduh(), and builtin_vec_vaduw()
	functions.
	* config/rs6000/rs6000-builtin.def: Add macro expansions for
	__builtin_altivec_vadub, __builtin_altivec_vaduh, and
	__builtin_altivec_vaduw, and for overloaded functions
	__builtin_vec_vadu, __builtin_vec_vadub, __builtin_vec_vaduh, and
	__builtin_vec_vaduw.
	* config/rs6000/altivec.md (UNSPEC_VADU): New unspec constant.
	("vadu<mode>3"): New expand pattern.
	("*p9_vadu<mode>3"): New insn pattern.
	* config/rs6000/altivec.h (vec_adu): New macro definition.
	(vec_adub): New macro definition.
	(vec_aduh): New macro definition.
	(vec_aduw): new macro definition.

gcc/testsuite/ChangeLog:

2016-04-18  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vadsdu-0.c: New test.
	* gcc.target/powerpc/vadsdu-1.c: New test.
	* gcc.target/powerpc/vadsdu-2.c: New test.
	* gcc.target/powerpc/vadsdu-3.c: New test.
	* gcc.target/powerpc/vadsdu-4.c: New test.
	* gcc.target/powerpc/vadsdu-5.c: New test.
	* gcc.target/powerpc/vadsdub-1.c: New test.
	* gcc.target/powerpc/vadsdub-2.c: New test.
	* gcc.target/powerpc/vadsduh-1.c: New test.
	* gcc.target/powerpc/vadsduh-2.c: New test.
	* gcc.target/powerpc/vadsduw-1.c: New test.
	* gcc.target/powerpc/vadsduw-2.c: New test.




git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/pre-gcc7@235212 138bc75d-0d04-0410-961f-82ee72b054a4

19 files changed, 375 insertions, 0 deletions

diff --git a/gcc/ChangeLog.ibm b/gcc/ChangeLog.ibm
index 444ab957708..ec8d41d1f7c 100644
--- a/gcc/ChangeLog.ibm
+++ b/gcc/ChangeLog.ibm
@@ -1,3 +1,30 @@
+2016-04-18  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* doc/extend.texi: Add documentation for the vec_adu(),
+	vec_adub(), vec_aduh(), and vec_aduw() built-ins.
+	* config/rs6000/rs6000.h (MASK_P9_VECTOR): New macro definition.
+	This change is redundant with a previously merged patch.
+	(RS6000_BTM_P9_VECTOR): Correct error in previous definition of
+	this macro.  This change is redundant with a previously merged patch.
+	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Added
+	three P9V_BUILTIN_VEC_VADU entries for three overloaded variants
+	of the builtin_vec_vadu() function and P9V_BUILTIN_VEC_VADUB,
+	P9V_BUILTIN_VEC_VADUH, and P9V_BUILTIN_VEC_VADUW entries for the
+	builtin_vec_vadub(), builtin_vec_vaduh(), and builtin_vec_vaduw()
+	functions.
+	* config/rs6000/rs6000-builtin.def: Add macro expansions for
+	__builtin_altivec_vadub, __builtin_altivec_vaduh, and
+	__builtin_altivec_vaduw, and for overloaded functions
+	__builtin_vec_vadu, __builtin_vec_vadub, __builtin_vec_vaduh, and
+	__builtin_vec_vaduw.
+	* config/rs6000/altivec.md (UNSPEC_VADU): New unspec constant.
+	("vadu<mode>3"): New expand pattern.
+	("*p9_vadu<mode>3"): New insn pattern.
+	* config/rs6000/altivec.h (vec_adu): New macro definition.
+	(vec_adub): New macro definition.
+	(vec_aduh): New macro definition.
+	(vec_aduw): new macro definition.
+
 2016-04-18  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	Rebase branch to subversion id 235167 after gcc-6-branch
diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 8336d9229ce..371b05780c0 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -396,6 +396,11 @@
 #define vec_slv __builtin_vec_vslv
 #define vec_srv __builtin_vec_vsrv
 
+#define vec_adu __builtin_vec_vadu
+#define vec_adub __builtin_vec_vadub
+#define vec_aduh __builtin_vec_vaduh
+#define vec_aduw __builtin_vec_vaduw
+
 /* Non-Vector additions added in ISA 3.0. */
 #define darn __builtin_darn
 #define darn_32 __builtin_darn_32
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index c0da9a3187d..c66969a13d1 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -114,6 +114,7 @@
    UNSPEC_STVLXL
    UNSPEC_STVRX
    UNSPEC_STVRXL
+   UNSPEC_VADU
    UNSPEC_VSLV
    UNSPEC_VSRV
    UNSPEC_VMULWHUB
@@ -3416,6 +3417,26 @@
   [(set_attr "length" "4")
    (set_attr "type" "vecsimple")])
 
+
+;; Vector absolute difference unsigned
+(define_expand "vadu<mode>3"
+  [(set (match_operand:VI 0 "register_operand" "")
+        (unspec:VI [(match_operand:VI 1 "register_operand" "")
+		    (match_operand:VI 2 "register_operand" "")]
+         UNSPEC_VADU))]
+  "TARGET_P9_VECTOR")
+
+;; Vector absolute difference unsigned
+(define_insn "*p9_vadu<mode>3"
+  [(set (match_operand:VI 0 "register_operand" "=v")
+        (unspec:VI [(match_operand:VI 1 "register_operand" "v")
+		    (match_operand:VI 2 "register_operand" "v")]
+         UNSPEC_VADU))]
+  "TARGET_P9_VECTOR"
+  "vabsdu<wd> %0, %1, %2"
+  [(set_attr "type" "add")  
+   (set_attr "length" "4")])
+
 ;; Vector count trailing zeros
 (define_insn "*p9v_ctz<mode>2"
   [(set (match_operand:VI2 0 "register_operand" "=v")
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 12ed95e8532..267f6c17d43 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1781,6 +1781,17 @@ BU_P9V_AV_2 (VSRV,		"vsrv",			CONST, vsrv)
 BU_P9V_OVERLOAD_2 (VSLV,	"vslv")
 BU_P9V_OVERLOAD_2 (VSRV,	"vsrv")
 
+/* 2 argument vector functions added in ISA 3.0 (power9). */
+BU_P9V_AV_2 (VADUB,		"vadub",		CONST,  vaduv16qi3)
+BU_P9V_AV_2 (VADUH,		"vaduh",		CONST,  vaduv8hi3)
+BU_P9V_AV_2 (VADUW,		"vaduw",		CONST,  vaduv4si3)
+
+/* ISA 3.0 vector overloaded 2 argument functions. */
+BU_P9V_OVERLOAD_2 (VADU,	"vadu")
+BU_P9V_OVERLOAD_2 (VADUB,	"vadub")
+BU_P9V_OVERLOAD_2 (VADUH,	"vaduh")
+BU_P9V_OVERLOAD_2 (VADUW,	"vaduw")
+
 
 /* 1 argument crypto functions.  */
 BU_CRYPTO_1 (VSBOX,		"vsbox",	  CONST, crypto_vsbox)
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index dc7a87af6a3..4fe392fc317 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -4160,6 +4160,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
 
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 
+    RS6000_BTI_unsigned_V8HI, 0 },
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 
+    RS6000_BTI_unsigned_V4SI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
+    RS6000_BTI_unsigned_V8HI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
+
   { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index f28d29bbca9..e74c767db3b 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -16500,6 +16500,31 @@ int __builtin_bcdsub_gt (vector __int128_t, vector__int128_t);
 int __builtin_bcdsub_ov (vector __int128_t, vector__int128_t);
 @end smallexample
 
+The following built-in functions are available for the PowerPC family
+of processors, starting with ISA 3.0 or later (@option{-mcpu=power9})
+or with @option{-mpower9-vector}:
+@smallexample
+__vector unsigned char
+vec_adu (__vector unsigned char arg1, __vector unsigned char arg2);
+__vector unsighed short
+vec_adu (__vector unsigned short arg1, __vector unsigned short arg2);
+__vector unsigned int
+vec_adu (__vector unsigned int arg1, __vector unsigned int arg2);
+
+__vector unsigned char
+vec_adub (__vector unsigned char arg1, __vector unsigned char arg2);
+__vector unsighed short
+vec_aduh (__vector unsigned short arg1, __vector unsigned short arg2);
+__vector unsigned int
+vec_aduw (__vector unsigned int arg1, __vector unsigned int arg2);
+@end smallexample
+
+The @code{vec_adu}, @code{vec_adub}, @code{vec_aduh}, and
+@code{vec_aduw} built-in functions each computes the absolute
+differences of the pairs of vector elements supplied in its two vector
+arguments, placing the absolute differences into the corresponding
+elements of the vector result.
+
 If the cryptographic instructions are enabled (@option{-mcrypto} or
 @option{-mcpu=power8}), the following builtins are enabled.
 
diff --git a/gcc/testsuite/ChangeLog.ibm b/gcc/testsuite/ChangeLog.ibm
index c6d157c2669..2671813b71b 100644
--- a/gcc/testsuite/ChangeLog.ibm
+++ b/gcc/testsuite/ChangeLog.ibm
@@ -1,3 +1,18 @@
+2016-04-18  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* gcc.target/powerpc/vadsdu-0.c: New test.
+	* gcc.target/powerpc/vadsdu-1.c: New test.
+	* gcc.target/powerpc/vadsdu-2.c: New test.
+	* gcc.target/powerpc/vadsdu-3.c: New test.
+	* gcc.target/powerpc/vadsdu-4.c: New test.
+	* gcc.target/powerpc/vadsdu-5.c: New test.
+	* gcc.target/powerpc/vadsdub-1.c: New test.
+	* gcc.target/powerpc/vadsdub-2.c: New test.
+	* gcc.target/powerpc/vadsduh-1.c: New test.
+	* gcc.target/powerpc/vadsduh-2.c: New test.
+	* gcc.target/powerpc/vadsduw-1.c: New test.
+	* gcc.target/powerpc/vadsduw-2.c: New test.
+
 2016-04-18  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	Rebase branch to subversion id 235167 after gcc-6-branch
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
new file mode 100644
index 00000000000..3734ea77fee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedInt (__vector unsigned int *p, 
+				 __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
new file mode 100644
index 00000000000..9de5caf886d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int 
+doAbsoluteDifferenceUnsignedIntMacro (__vector unsigned int *p, 
+				      __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_adu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
new file mode 100644
index 00000000000..a57d6e06906
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedShort (__vector unsigned short *p, 
+				   __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
new file mode 100644
index 00000000000..7711607e920
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short 
+doAbsoluteDifferenceUnsignedShortMacro (__vector unsigned short *p, 
+				      __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_adu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
new file mode 100644
index 00000000000..479e0c36daa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsignedChar (__vector unsigned char *p, 
+				  __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
new file mode 100644
index 00000000000..a9695634d7f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char 
+doAbsoluteDifferenceUnsignedCharMacro (__vector unsigned char *p, 
+				       __vector unsigned char *q)
+{
+  __vector unsigned char result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_adu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
new file mode 100644
index 00000000000..c1807e6ef54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char 
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p, 
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = __builtin_vec_vadub (source_1, source_2);
+  return uc_result;
+}
+
+
+/* { dg-final { scan-assembler	   "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
new file mode 100644
index 00000000000..c1807e6ef54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char 
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p, 
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = __builtin_vec_vadub (source_1, source_2);
+  return uc_result;
+}
+
+
+/* { dg-final { scan-assembler	   "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
new file mode 100644
index 00000000000..9bc12a0b727
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsigned (__vector unsigned short *p, 
+			      __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short us_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  us_result = __builtin_vec_vaduh (source_1, source_2);
+  return us_result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
new file mode 100644
index 00000000000..424d280a108
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short 
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned short *p, 
+				   __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_aduh (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
new file mode 100644
index 00000000000..3327df8038c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsigned (__vector unsigned int *p, 
+			      __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int ui_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  ui_result = __builtin_vec_vaduw (source_1, source_2);
+  return ui_result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
new file mode 100644
index 00000000000..bfdffb6660b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int 
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned int *p, 
+				   __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_aduw (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler	   "vabsduw" } } */