diff options
| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-03-20 16:43:21 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-03-20 16:43:21 +0000 |
| commit | 24198622f7cdadf34672289cc9b0bc7a7e5e1f2b (patch) | |
| tree | 0f9d9bb773cc73d305413ea658406c94de71f06b | |
| parent | ffa7c91a5c6d849c176976e2adc7609d3b03221f (diff) | |
RISC-V: Don't prefer FP_REGS for integers
On RISC-V we can't store integers in floating-point registers as this is
forbidden by the ISA. We've always disallowed this, but we were
setting the preferred mode to FP_REGS for some integer modes. This
caused the LRA to blow up with some hard to read error messages.
This patch removes the prefered mode hook, as the right thing to do here
is nothing.
Thanks to Kito for finding the bug, and mpf for the fix. See also
<https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912>.
PR target/79912
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@246283 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/riscv/riscv.c | 13 |
2 files changed, 6 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 487a09be45b..7164d10df6b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2017-03-17 Palmer Dabbelt <palmer@dabbelt.com> + PR target/79912 + * config/riscv/riscv.c (riscv_preferred_reload_class): Remove. + (TARGET_PREFERRED_RELOAD_CLASS): Likewise. + +2017-03-17 Palmer Dabbelt <palmer@dabbelt.com> + * config/riscv/riscv.c (riscv_print_operand): Use "fence iorw,ow". * config/riscv/sync.mc (mem_thread_fence_1): Use "fence diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index fa93c3c32b2..d5928c334de 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -3629,16 +3629,6 @@ riscv_class_max_nregs (reg_class_t rclass, enum machine_mode mode) return 0; } -/* Implement TARGET_PREFERRED_RELOAD_CLASS. */ - -static reg_class_t -riscv_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) -{ - return reg_class_subset_p (FP_REGS, rclass) ? FP_REGS : - reg_class_subset_p (GR_REGS, rclass) ? GR_REGS : - rclass; -} - /* Implement TARGET_MEMORY_MOVE_COST. */ static int @@ -4031,9 +4021,6 @@ riscv_cannot_copy_insn_p (rtx_insn *insn) #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST riscv_address_cost -#undef TARGET_PREFERRED_RELOAD_CLASS -#define TARGET_PREFERRED_RELOAD_CLASS riscv_preferred_reload_class - #undef TARGET_ASM_FILE_START #define TARGET_ASM_FILE_START riscv_file_start #undef TARGET_ASM_FILE_START_FILE_DIRECTIVE |