This is the bulk of pin control changes for the v5.6 kernel cycle:

Core changes:

- Dropped the chained IRQ setup callback into GPIOLIB as we
  got rid of the last users of that in this changeset.

New drivers:

- New driver for Ingenic X1830.

- New driver for Freescale i.MX8MP.

Driver enhancements:

- Fix all remaining Intel drivers to pass their IRQ chips
  along with the GPIO chips.

- Intel Baytrail allocates its irqchip dynamically.

- Intel Lynxpoint is thoroughly rewritten and modernized.

- Aspeed AST2600 pin muxing and configuration is much
  improved.

- Qualcomm SC7180 functions are updated and wakeup interrupt
  map is provided.

- A whole slew of Renesas SH-PFC cleanups and improvements.

- Fix up the Intel DT bindings to use the generic YAML
  DT bindings schema. (A first user of this.)
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