diff options
| author | Olivier Masse <olivier.masse@nxp.com> | 2021-02-11 11:52:49 +0100 |
|---|---|---|
| committer | lei zhou <lei.zhou@linaro.org> | 2022-11-28 16:08:06 -0500 |
| commit | a6a0df986b5f89f2b2072122afba050cbbed897f (patch) | |
| tree | 015b2f76353f8fbd789e93297b418f399ea5673f | |
| parent | 79277f26713b30f87ee0fdd5309bba2aaffb829e (diff) | |
MMIOT-191: Do not prevent VPU to decode in CMA
When Secure Hantro VPU is enabled, allow decoding into non protected memory
Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
| -rw-r--r-- | plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | 12 | ||||
| -rw-r--r-- | plat/imx/imx8m/imx8mq/platform.mk | 4 |
2 files changed, 13 insertions, 3 deletions
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c index bdb4b2a8b..69e0cfa2e 100644 --- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c +++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c @@ -121,7 +121,6 @@ static void imx8mq_soc_info_init(void) #if !defined(DECRYPTED_BUFFER_END) && !defined(DECODED_BUFFER_END) #define RDC_DISABLED #else - static const struct imx_rdc_cfg rdc_cfg[] = { /* Master domain assignment */ RDC_MDAn(RDC_MDA_A53, DID0 | LCK), @@ -133,7 +132,13 @@ static const struct imx_rdc_cfg rdc_cfg[] = { /* peripherals domain permission */ /* memory region */ -#if defined(DECRYPTED_BUFFER_START) + + /* + * Need to substact offset 0x40000000 from CPU address when + * programming rdc region for i.mx8mq. + */ + +#if defined(DECRYPTED_BUFFER_START) && !defined(CFG_SECURE_HANTRO_VPU) /* Domain 2 no write access to memory region below decrypted video */ /* Prevent VPU to decode outside secure decoded buffer */ RDC_MEM_REGIONn(2, 0x0, (uint32_t)DECRYPTED_BUFFER_START - IMX_DDR_BASE, 0xC00000EF), @@ -149,15 +154,16 @@ static const struct imx_rdc_cfg rdc_cfg[] = { /* Domain 2+3 memory region R/W decoded video */ RDC_MEM_REGIONn(1, (uint32_t)DECODED_BUFFER_START - IMX_DDR_BASE, (uint32_t)DECODED_BUFFER_END - IMX_DDR_BASE, 0xC00000F0), +#ifndef CFG_SECURE_HANTRO_VPU /* Domain 2 no write access to memory region above decoded video */ RDC_MEM_REGIONn(3, (uint32_t)DECODED_BUFFER_END - IMX_DDR_BASE, 0x100000000 - IMX_DDR_BASE, 0xC00000EF), +#endif // CFG_SECURE_HANTRO_VPU #endif // DECODED_BUFFER_END /* Sentinel */ {0}, }; - #endif diff --git a/plat/imx/imx8m/imx8mq/platform.mk b/plat/imx/imx8m/imx8mq/platform.mk index 8c1815951..b15ff2ce7 100644 --- a/plat/imx/imx8m/imx8mq/platform.mk +++ b/plat/imx/imx8m/imx8mq/platform.mk @@ -101,3 +101,7 @@ ifneq (${DECODED_BUFFER_LEN},) $(eval $(call add_define,DECODED_BUFFER_LEN)) endif endif + +ifeq (${CFG_SECURE_HANTRO_VPU},y) +$(eval $(call add_define,CFG_SECURE_HANTRO_VPU)) +endif |