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2020-10-09Don't return error information from console_flushJimmy Brisson
And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2020-08-04Use abspath to dereference $BUILD_BASEGrant Likely
If the user tries to change BUILD_BASE to put the build products outside the build tree the compile will fail due to hard coded assumptions that $BUILD_BASE is a relative path. Fix by using $(abspath $(BUILD_BASE)) to rationalize to an absolute path every time and remove the relative path assumptions. This patch also adds documentation that BUILD_BASE can be specified by the user. Signed-off-by: Grant Likely <grant.likely@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib1af874de658484aaffc672f30029b852d2489c8
2020-06-05Merge "ti: k3: common: Make UART number configurable" into integrationMadhukar Pappireddy
2020-06-01ti: k3: common: Make UART number configurableJan Kiszka
This allows to build for k3-based boards that use a different UART as console, such as the IOT2050 which requires K3_USART=1. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: I7171f86c3cabae2c575b8fbeecef839b48bd109b
2020-05-25ti: k3: common: Implement stub system_offJan Kiszka
PSCI demands that SYSTEM_OFF must not return. While it seems like a generic ATF bug that this is possible when a platform does not Implement a corresponding handler, let's do that here until it's addressed differently. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: I4c08948b18bbfdc3a24214f2ae0fbad9e017ada1
2020-03-30TF-A GICv3 driver: Introduce makefileAlexei Fedorov
This patch moves all GICv3 driver files into new added 'gicv3.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms. The patch adds GICv3 driver configuration flags 'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and 'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in 'GICv3 driver options' section of 'build-option.rst' document. NOTE: Platforms with GICv3 driver need to be modified to include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles. Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-10TF-A GICv3 driver: Separate GICD and GICR accessor functionsAlexei Fedorov
This patch provides separation of GICD, GICR accessor functions and adds new macros for GICv3 registers access as a preparation for GICv3.1 and GICv4 support. NOTE: Platforms need to modify to include both 'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the single helper file previously. Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-02-2516550: Use generic console_t data structureAndre Przywara
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all. Change-Id: I5c2fe3b6a667acf80c808cfec4a64059a2c9c25f Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-01-30Merge "Use correct type when reading SCR register" into integrationAlexei Fedorov
2020-01-28Use correct type when reading SCR registerLouis Mayencourt
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2020-01-27ti: k3: drivers: ti_sci: Put sequence number in coherent memoryAndrew F. Davis
The current message sequence number is accessed both with caches on and off so put this memory in the un-cached coherent section so accesses are consistent and coherency is maintained. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Ieeefefeaffc691e4e4c4de7c74490d50ff9de807
2020-01-27ti: k3: drivers: ti_sci: Remove indirect structure of const dataAndrew F. Davis
The 'info' structure contained what is only static data for this implementation of TI-SCI. Remove this indirection and remove the struct. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I2328fddf388bf7d56a56bd673c080e78c86fe072
2020-01-27ti: k3: common: Enable ARM cluster power downAndrew F. Davis
When all cores in a cluster are powered down the parent cluster can be also powered down. When the last core has requested powering down follow by sending the cluster power down sequence to the system power controller firmware. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I0ffeb339852c66ef62743aecd3e17ca20bad6216
2020-01-27ti: k3: common: Rename device IDs to be more consistentAndrew F. Davis
The core number is called 'core_id' but the processor and device IDs are called 'proc' and 'device'. Rename these to make them less confusing. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I3d7c6dddd7aa37b5dee1aa9689ce31730e9c3b59
2020-01-24ti: Unify Platform specific defines for PSCI moduleDeepika Bhavnani
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ia7072d82116b03904c1b3982f37d96347203e621
2019-10-29ti: k3: common: Add PIE supportAndrew F. Davis
Running TF-A from non-standard location such as DRAM is useful for some SRAM heavy use-cases. Allow the TF-A binary to be executed from an arbitrary memory location. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Icd97926e4d97f37d7cde4a92758a52f57d569111
2019-07-04ti: k3: common: Trap all asynchronous bus errors to EL3Andrew F. Davis
These errors are asynchronous and cannot be directly correlated with the exact current running software, so handling them in the same EL is not critical. Handling them in TF-A allows for more platform specific decoding of the implementation defined exception registers Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Iee7a38c9fc9c698fa0ad42dafa598bcbed6a4fda
2019-06-28Remove MULTI_CONSOLE_API flag and references to itAmbroise Vincent
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-06ti: k3: common: Remove coherency workaround for AM65xAndrew F. Davis
We previously left our caches on during power-down to prevent any non-caching accesses to memory that is cached by other cores. Now with the last accessed areas all being marked as non-cached by USE_COHERENT_MEM we can rely on that to workaround our interconnect issues. Remove the old workaround. Change-Id: Idadb7696d1449499d1edff4f6f62ab3b99d1efb7 Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-06-06ti: k3: common: Use coherent memory for shared dataAndrew F. Davis
HW_ASSISTED_COHERENCY implies something stronger than just hardware coherent interconnect, specifically a DynamIQ capable ARM core. For K3, lets use WARMBOOT_ENABLE_DCACHE_EARLY to enable caches early and then let the caches get shut off on powerdown, to prevent data corruption we also need to USE_COHERENT_MEM so that any accesses to shared memory after this point is only to memory that is set as non-cached for all cores. Change-Id: Ib9337f012df0e0388237942607c501b6f3e2a949 Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-05-22ti: k3: common: Set L2 latency on A72 coresAndrew F. Davis
The Cortex-A72 based cores on K3 platforms can be clocked fast enough that an extra latency cycle is needed to ensure correct L2 access. Set the latency here for all A72 cores. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Id534316dec1c1f326908efbfd964f219cda7386a
2019-05-22ti: k3: common: Add support for J721ENishanth Menon
Enable Cortex-A72 support for J721E. Change-Id: I5bea5fb6ec45d1a9f8f2192d42da2cc03ae0f7ec Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-04-30ti: k3: common: Remove MSMC port definitionsAndrew F. Davis
The MSMC port defines were added to help in the case when some ports are not connected and have no cores attached. We can get the same functionality by defined the number of cores on that port to zero. This simplifies several code paths, do this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I3247fe37af7b86c3227e647b4f617fab70c8ee8a
2019-04-26ti: k3: common: Mark sections for AM65x coherency workaroundAndrew F. Davis
These sections of code are only needed for the coherency workaround used for AM65x, if this workaround is not needed then this code is not either. Mark it off to keep it separated from the rest of the PSCI implementation. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef
2019-04-26ti: k3: common: Allow USE_COHERENT_MEM for K3Andrew F. Davis
To make the USE_COHERENT_MEM option work we need to add an entry for the area to our memory map table. Also fixup the alignment here. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I1c05477a97646ac73846a711bc38d3746628d847
2019-04-26ti: k3: common: Fix RO data area size calculationAndrew F. Davis
The size of the RO data area was calculated by subtracting the area end address from itself and not the base address due to a typo. Fix this here. Note, this was noticed at a glance thanks to the new aligned formating of this table. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I994022ac9fc95dc5e37a420714da76081c61cce7
2019-04-26ti: k3: common: Remove unused STUB macroAndrew F. Davis
This macro was used when many of these functions were stubbed out, the macro is not used anymore, remove it. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Ida33f92fe3810a89e6e51faf6e93c1d2ada1a2ee
2019-04-24Merge changes from topic "k3-sequence-fix" into integrationAntonio Niño Díaz
* changes: ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID ti: k3: drivers: ti_sci: Cleanup sequence ID usage ti: k3: drivers: sec_proxy: Use direction definitions ti: k3: drivers: sec_proxy: Fix printf format specifiers
2019-04-23ti: k3: drivers: ti_sci: Retry message receive on bad sequence IDAndrew F. Davis
When we get a sequence ID that does not match what we expect then the we are looking at is not the one we are expecting and so we error out. We can also assume this message is a stale message left in the queue, in this case we can read in the next message and check again for our message. Switch to doing that here. We only retry a set number of times so we don't lock the system if our message is actually lost and will never show up. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I6c8186ccc45e646d3ba9d431f7d4c451dcd70c5c
2019-04-23ti: k3: drivers: ti_sci: Cleanup sequence ID usageAndrew F. Davis
The sequence ID can be set with a message to identify it when it is responded to in the response queue. We assign each message a number and check for this same number to detect response mismatches. Start this at 0 and increase it by one for each message sent, even ones that do not request or wait for a response as one may still be delivered in some cases and we want to detect this. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I72b4d1ef98bf1c1409d9db9db074af8dfbcd83ea
2019-04-23ti: k3: drivers: sec_proxy: Use direction definitionsAndrew F. Davis
The direction of a thread should be explicitly compared to avoid confusion. Also fixup message wording based on this direction. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Ia3cf9413cd23af476bb5d2e6d70bee15234cbd11
2019-04-23ti: k3: drivers: sec_proxy: Fix printf format specifiersAndrew F. Davis
The ID of a thread is not used outside for printing it out when something goes wrong. The specifier used is also not consistent. Instead of storing the thread ID, store its name and print that. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Id137c2f8dfdd5c599e220193344ece903f80af7b
2019-04-19ti: k3: common: Align elements of map region tableAndrew F. Davis
This is only a formatting change but makes it instantly clear how each region is set. This is over 80 chars and the MT_RO are not strictly needed but this section very important to get right so make readability the priority here. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I2432deda05d4502b3478170296b5da43f26ad8e6
2019-04-19ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by defaultAndrew F. Davis
This should be more secure and looks a bit cleaner. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Ie5eaf0234b211ba02631cf5eab5faa1402a34461
2019-04-19ti: k3: common: Remove shared RAM spaceAndrew F. Davis
We don't use this for anything right now, remove it. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I11505d01834f7ff1fdba46fda0acbb3b56fc9b66
2019-04-19ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other definesAndrew F. Davis
This makes definitions more consistent, plus helps alignment. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I38fcdd76207586613d9934c9dc83d7a347e9e0fc
2019-02-11ti: k3: common: Do not release processor control on startupAndrew F. Davis
ATF should be the only host needing to control a processor that it has started. ATF will need this control to stop the core later. Do not relinquish control of a core after starting the core. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power downAndrew F. Davis
Now that we have non-blocking TI-SCI functions we can initiate the shutdown sequence from the PSCI handler without needing the ti_sci_proc_shutdown helper function, which is removed. This gives us the greater control and flexibility that will be needed when cluster power down sequences are added. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messagesAndrew F. Davis
Most TI-SCI functions request an ACK and wait until it is received. For some power sequence tasks we cannot wait but instead queue messages asynchronously. Three messages have been identified that will need to be used in this way. Add non-waiting versions of these functions. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11ti: k3: drivers: ti_sci: Request and check for ACK by defaultAndrew F. Davis
Currently almost all TI-SCI messages request and check for an ACK from the system firmware. Move this into a common place to remove the same from each function. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11ti: k3: drivers: ti_sci: Add exclusive device accessorsAndrew F. Davis
When a device is requested with TI-SCI its control can be made exclusive to the requesting host. This was currently the default but is not what is needed most of the time. Add _exclusive versions of the request functions and remove the exclusive flag from the default version. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11ti: k3: drivers: ti_sci: Internalize raw get/set state functionsAndrew F. Davis
The raw get and set state functions for both devices and clocks are only meant for use internal to the TI-SCI driver, the same functionality is available from the other API that call into these. Remove them from the external interface and make them static scope to the driver. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-01-22ti: k3: common: Add support for runtime detection of GICR base addressAndrew F. Davis
Valid addresses for GICR base are always a set calculable distance from the GICD and is based on the number of cores a given instance of GICv3 IP can support. The formula for the number of address bits is given by the ARM GIC-500 TRM section 3.2 as 2^(18+log2(cores)) with the MSB set to one for GICR instances. Holes in the GIC address space are also guaranteed to safely return 0 on reads. This allows us to support runtime detection of the GICR base address by starting from GIC base address plus BIT(18) and walking until the GICR ID register (IIDR) is detected. We stop searching after BIT(20) to prevent searching out into space if something goes wrong. This can be extended out if we ever have a device with 16 or more cores. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-01-22Merge pull request #1772 from glneo/clear-proxy-queueAntonio Niño Díaz
TI K3 Clear proxy receive queue on transmit
2019-01-22Merge pull request #1775 from glneo/uart-baud-rateAntonio Niño Díaz
ti: k3: common: Allow customizing UART baud rate using build options
2019-01-22Merge pull request #1774 from glneo/error-messageAntonio Niño Díaz
ti: k3: drivers: sec_proxy: Switch error messages
2019-01-21ti: k3: common: Allow customizing UART baud rate using build optionsAndreas Dannenberg
To accommodate scenarios where we want to use a UART baud rate other than the default 115,200 allow the associated compiler definition to be set via the K3_USART_BAUD build option by updating the platform make file. Since the platform make file now also contains the default value (still 115,200), go ahead and remove the redundant definition from the platform header file. Suggested-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-01-21ti: k3: drivers: ti_sci: Clear receive queue before transmittingAndrew F. Davis
Send and receive currently must be be serialized, any message already in the receive queue when a new message is to be sent will cause a mismatch with the expected response from this new message. Clear out all messages from the response queue before sending a new request. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
2019-01-21ti: k3: drivers: sec_proxy: Allow clearing a Secure Proxy receive threadAndrew F. Davis
It can be needed to discard all messages in a receive queue. This can be used during some error recovery situations. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
2019-01-21ti: k3: common: Use shutdown API for PSCI core poweroffAndrew F. Davis
To ensure WFI is reached before the PSC is trigger to power-down a processor, the shutdonw API must be used. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
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