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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2019-06-07 17:48:00 +0300
committerVineet Gupta <vgupta@synopsys.com>2019-07-08 09:24:46 +0100
commitaab128d006e709954f2a67b5e27a4c587a0584bd (patch)
tree5dd6f98ff06957721cd75b144e67516107186f83 /arch/arc/boot
parentfd5de2721ea7d16e2b16c4049ac49f229551b290 (diff)
ARC: [plat-hsdk]: enable DW SPI controller
HSDK SoC has DW SPI controller. Enable it in preparation of enabling on-board SPI peripherals. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot')
-rw-r--r--arch/arc/boot/dts/hsdk.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index 9a45cb093096..bfc7f5f5d6f2 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -8,6 +8,7 @@
*/
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/snps,hsdk-reset.h>
/ {
@@ -252,6 +253,19 @@
dma-coherent;
};
+ spi0: spi@20000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x20000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <16>;
+ num-cs = <2>;
+ reg-io-width = <4>;
+ clocks = <&input_clk>;
+ cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_LOW>,
+ <&creg_gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
creg_gpio: gpio@14b0 {
compatible = "snps,creg-gpio-hsdk";
reg = <0x14b0 0x4>;