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authorJamie Iles <jamie@jamieiles.com>2011-07-25 17:36:42 +0100
committerJamie Iles <jamie@jamieiles.com>2011-09-26 16:11:56 +0100
commitaf75655c066621352c419646ec0775e9523dc720 (patch)
treeae3895ab4f9d8ce7823f4ef4dcbdbb8f838f3073 /arch/arm/mach-picoxcell/include/mach/irqs.h
parentc6a389f123b9f68d605bb7e0f9b32ec1e3e14132 (diff)
picoxcell: support for Picochip picoxcell devices
picoXcell is a family of femtocell devices with an ARM application processor and picoArray DSP processor array. This patch adds support for picoXcell boards to be booted using the device tree registering the VIC's, UART's and timers. v3: - fixup vic compatible string in binding v2: - cleanup empty mach headers - convert to of_platform_populate() - simplify uncompress.h - split vic node into 2 devices - add missing __initconst attributes Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Diffstat (limited to 'arch/arm/mach-picoxcell/include/mach/irqs.h')
-rw-r--r--arch/arm/mach-picoxcell/include/mach/irqs.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
new file mode 100644
index 00000000000..4d13ed97091
--- /dev/null
+++ b/arch/arm/mach-picoxcell/include/mach/irqs.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2011 Picochip Ltd., Jamie Iles
+ *
+ * This file contains the hardware definitions of the picoXcell SoC devices.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
+
+#define ARCH_NR_IRQS 64
+#define NR_IRQS (128 + ARCH_NR_IRQS)
+
+#define IRQ_VIC0_BASE 0
+#define IRQ_VIC1_BASE 32
+
+#endif /* __MACH_IRQS_H */