Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6: (82 commits)
  [MTD] m25p80: Add Support for ATMEL AT25DF641 64-Megabit SPI Flash
  [MTD] m25p80: add FAST_READ access support to M25Pxx
  [MTD] [NAND] bf5xx_nand: Avoid crash if bfin_mac is installed.
  [MTD] [NAND] at91_nand: control NCE signal
  [MTD] [NAND] AT91 hardware ECC compile fix for at91sam9263 / at91sam9260
  [MTD] [NAND] Hardware ECC controller on at91sam9263 / at91sam9260
  [JFFS2] Introduce dbg_readinode2 log level, use it to shut read_dnode() up
  [JFFS2] Fix jffs2_reserve_space() when all blocks are pending erasure.
  [JFFS2] Add erase_checking_list to hold blocks being marked.
  UBI: add a message
  [JFFS2] Return values of jffs2_block_check_erase error paths
  [MTD] Clean up AR7 partition map support
  [MTD] [NOR] Fix Intel CFI driver for collie flash
  [JFFS2] Finally remove redundant ref->__totlen field.
  [JFFS2] Honour TEST_TOTLEN macro in debugging code. ref->__totlen is going!
  [JFFS2] Add paranoia debugging for superblock counts
  [JFFS2] Fix free space leak with in-band cleanmarkers
  [JFFS2] Self-sufficient #includes in jffs2_fs_i.h: include <linux/mutex.h>
  [MTD] [NAND] Verify probe by retrying to checking the results match
  [MTD] [NAND] S3C2410 Allow ECC disable to be specified by the board
  ...

1 files changed, 30 insertions, 0 deletions

diff --git a/Documentation/arm/Samsung-S3C24XX/NAND.txt b/Documentation/arm/Samsung-S3C24XX/NAND.txt
new file mode 100644
index 00000000000..bc478a3409b
--- /dev/null
+++ b/Documentation/arm/Samsung-S3C24XX/NAND.txt
@@ -0,0 +1,30 @@
+			S3C24XX NAND Support
+			====================
+
+Introduction
+------------
+
+Small Page NAND
+---------------
+
+The driver uses a 512 byte (1 page) ECC code for this setup. The
+ECC code is not directly compatible with the default kernel ECC
+code, so the driver enforces its own OOB layout and ECC parameters
+
+Large Page NAND
+---------------
+
+The driver is capable of handling NAND flash with a 2KiB page
+size, with support for hardware ECC generation and correction.
+
+Unlike the 512byte page mode, the driver generates ECC data for
+each 256 byte block in an 2KiB page. This means that more than
+one error in a page can be rectified. It also means that the
+OOB layout remains the default kernel layout for these flashes.
+
+
+Document Author
+---------------
+
+Ben Dooks, Copyright 2007 Simtec Electronics
+