diff options
| author | Andy Green <andy.green@linaro.org> | 2011-11-18 16:04:19 +0800 |
|---|---|---|
| committer | Andy Green <andy.green@linaro.org> | 2011-11-19 08:55:08 +0800 |
| commit | fc6f4b3302a12948fd6261f20518fbce0fc218c9 (patch) | |
| tree | 71e4cdbd5572e7067803f52d2eb64f1b58acd33d /arch/arm | |
| parent | 1e907802567c189418e178694b72d6c61a351b10 (diff) | |
omap4 clocks allow 1MHz leeway
With smartreflex(?) pll settings no long always match exactly
this allows match on up to 1MHz lower frequency.
Signed-off-by: Andy Green <andy.green@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-omap2/clkt_dpll.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index bcffee001bf..f95c2efcb7f 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -318,10 +318,12 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) if (r == DPLL_MULT_UNDERFLOW) continue; - pr_debug("clock: %s: m = %d: n = %d: new_rate = %ld\n", - clk->name, m, n, new_rate); +// pr_err(" clock: target=%ld %s: m = %d: n = %d: new_rate = %ld\n", +// target_rate, clk->name, m, n, new_rate); - if (target_rate == new_rate) { + if (target_rate == new_rate || + ((target_rate - new_rate) > 0 && (target_rate - new_rate) < 1000000) + ) { dd->last_rounded_m = m; dd->last_rounded_n = n; dd->last_rounded_rate = target_rate; @@ -329,12 +331,6 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) } } - if (target_rate != new_rate) { - pr_debug("clock: %s: cannot round to rate %ld\n", clk->name, - target_rate); - return ~0; - } - - return target_rate; + return new_rate; } |