diff options
Diffstat (limited to 'debian.linaro/ci/rr-cache/935ec1e8d616457e92d91aa33eb16eb2c62c0fe2/preimage')
| -rw-r--r-- | debian.linaro/ci/rr-cache/935ec1e8d616457e92d91aa33eb16eb2c62c0fe2/preimage | 1006 |
1 files changed, 1006 insertions, 0 deletions
diff --git a/debian.linaro/ci/rr-cache/935ec1e8d616457e92d91aa33eb16eb2c62c0fe2/preimage b/debian.linaro/ci/rr-cache/935ec1e8d616457e92d91aa33eb16eb2c62c0fe2/preimage new file mode 100644 index 0000000..b55ff22 --- /dev/null +++ b/debian.linaro/ci/rr-cache/935ec1e8d616457e92d91aa33eb16eb2c62c0fe2/preimage @@ -0,0 +1,1006 @@ +/* + * linux/arch/arm/mach-omap2/devices.c + * + * OMAP2 platform device setup/initialization + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/io.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/slab.h> + +#include <mach/hardware.h> +#include <mach/irqs.h> +#include <asm/mach-types.h> +#include <asm/mach/map.h> +#include <asm/pmu.h> + +#include <plat/tc.h> +#include <plat/board.h> +#include <plat/mcbsp.h> +#include <mach/gpio.h> +#include <plat/mmc.h> +#include <plat/dma.h> +#include <plat/gpu.h> +#include <plat/omap_hwmod.h> +#include <plat/omap_device.h> +#include <plat/omap4-keypad.h> + +#include <sound/omap-abe-dsp.h> + +#include "mux.h" +#include "control.h" +#include "devices.h" + +#define L3_MODULES_MAX_LEN 12 +#define L3_MODULES 3 + +static int __init omap3_l3_init(void) +{ + int l; + struct omap_hwmod *oh; + struct omap_device *od; + char oh_name[L3_MODULES_MAX_LEN]; + + /* + * To avoid code running on other OMAPs in + * multi-omap builds + */ + if (!(cpu_is_omap34xx())) + return -ENODEV; + + l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main"); + + oh = omap_hwmod_lookup(oh_name); + + if (!oh) + pr_err("could not look up %s\n", oh_name); + + od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, + NULL, 0, 0); + + WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + + return IS_ERR(od) ? PTR_ERR(od) : 0; +} +postcore_initcall(omap3_l3_init); + +static int __init omap4_l3_init(void) +{ + int l, i; + struct omap_hwmod *oh[3]; + struct omap_device *od; + char oh_name[L3_MODULES_MAX_LEN]; + + /* + * To avoid code running on other OMAPs in + * multi-omap builds + */ + if (!(cpu_is_omap44xx())) + return -ENODEV; + + for (i = 0; i < L3_MODULES; i++) { + l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1); + + oh[i] = omap_hwmod_lookup(oh_name); + if (!(oh[i])) + pr_err("could not look up %s\n", oh_name); + } + + od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, + 0, NULL, 0, 0); + + WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + + return IS_ERR(od) ? PTR_ERR(od) : 0; +} +postcore_initcall(omap4_l3_init); + +#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) + +static struct resource omap2cam_resources[] = { + { + .start = OMAP24XX_CAMERA_BASE, + .end = OMAP24XX_CAMERA_BASE + 0xfff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_CAM_IRQ, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device omap2cam_device = { + .name = "omap24xxcam", + .id = -1, + .num_resources = ARRAY_SIZE(omap2cam_resources), + .resource = omap2cam_resources, +}; +#endif + +static struct resource omap3isp_resources[] = { + { + .start = OMAP3430_ISP_BASE, + .end = OMAP3430_ISP_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_CCP2_BASE, + .end = OMAP3430_ISP_CCP2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_CCDC_BASE, + .end = OMAP3430_ISP_CCDC_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_HIST_BASE, + .end = OMAP3430_ISP_HIST_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_H3A_BASE, + .end = OMAP3430_ISP_H3A_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_PREV_BASE, + .end = OMAP3430_ISP_PREV_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_RESZ_BASE, + .end = OMAP3430_ISP_RESZ_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_SBL_BASE, + .end = OMAP3430_ISP_SBL_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_CSI2A_REGS1_BASE, + .end = OMAP3430_ISP_CSI2A_REGS1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_CSIPHY2_BASE, + .end = OMAP3430_ISP_CSIPHY2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSI2A_REGS2_BASE, + .end = OMAP3630_ISP_CSI2A_REGS2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSI2C_REGS1_BASE, + .end = OMAP3630_ISP_CSI2C_REGS1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSIPHY1_BASE, + .end = OMAP3630_ISP_CSIPHY1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSI2C_REGS2_BASE, + .end = OMAP3630_ISP_CSI2C_REGS2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_34XX_CAM_IRQ, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device omap3isp_device = { + .name = "omap3isp", + .id = -1, + .num_resources = ARRAY_SIZE(omap3isp_resources), + .resource = omap3isp_resources, +}; + +int omap3_init_camera(struct isp_platform_data *pdata) +{ + omap3isp_device.dev.platform_data = pdata; + return platform_device_register(&omap3isp_device); +} + +static inline void omap_init_camera(void) +{ +#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) + if (cpu_is_omap24xx()) + platform_device_register(&omap2cam_device); +#endif +} + +#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ + defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) + +static struct omap_device_pm_latency omap_dmic_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static void omap_init_dmic(void) +{ + struct omap_hwmod *oh; + struct omap_device *od; + + oh = omap_hwmod_lookup("dmic"); + if (!oh) { + printk(KERN_ERR "Could not look up dmic hw_mod\n"); + return; + } + + od = omap_device_build("omap-dmic-dai", -1, oh, NULL, 0, + omap_dmic_latency, + ARRAY_SIZE(omap_dmic_latency), 0); + if (IS_ERR(od)) + printk(KERN_ERR "Could not build omap_device for omap-dmic-dai\n"); +} +#else +static inline void omap_init_dmic(void) {} +#endif + + +struct omap_device_pm_latency omap_keyboard_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +int __init omap4_keyboard_init(struct omap4_keypad_platform_data + *sdp4430_keypad_data, struct omap_board_data *bdata) +{ + struct omap_device *od; + struct omap_hwmod *oh; + struct omap4_keypad_platform_data *keypad_data; + unsigned int id = -1; + char *oh_name = "kbd"; + char *name = "omap4-keypad"; + + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up %s\n", oh_name); + return -ENODEV; + } + + keypad_data = sdp4430_keypad_data; + + od = omap_device_build(name, id, oh, keypad_data, + sizeof(struct omap4_keypad_platform_data), + omap_keyboard_latency, + ARRAY_SIZE(omap_keyboard_latency), 0); + + if (IS_ERR(od)) { + WARN(1, "Can't build omap_device for %s:%s.\n", + name, oh->name); + return PTR_ERR(od); + } + oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); + + return 0; +} + +#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) +static struct omap_device_pm_latency mbox_latencies[] = { + [0] = { + .activate_func = omap_device_enable_hwmods, + .deactivate_func = omap_device_idle_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static inline void omap_init_mbox(void) +{ + struct omap_hwmod *oh; + struct omap_device *od; + + oh = omap_hwmod_lookup("mailbox"); + if (!oh) { + pr_err("%s: unable to find hwmod\n", __func__); + return; + } + + od = omap_device_build("omap-mailbox", -1, oh, NULL, 0, + mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); + WARN(IS_ERR(od), "%s: could not build device, err %ld\n", + __func__, PTR_ERR(od)); +} +#else +static inline void omap_init_mbox(void) { } +#endif /* CONFIG_OMAP_MBOX_FWK */ + +static inline void omap_init_sti(void) {} + +#if defined CONFIG_ARCH_OMAP4 + +static struct platform_device codec_dmic0 = { + .name = "dmic-codec", + .id = 0, +}; + +static struct platform_device codec_dmic1 = { + .name = "dmic-codec", + .id = 1, +}; + +static struct platform_device codec_dmic2 = { + .name = "dmic-codec", + .id = 2, +}; + +static struct platform_device omap_abe_dai = { + .name = "omap-abe-dai", + .id = -1, +}; + +static inline void omap_init_abe(void) +{ + platform_device_register(&codec_dmic0); + platform_device_register(&codec_dmic1); + platform_device_register(&codec_dmic2); + platform_device_register(&omap_abe_dai); +} +#else +static inline void omap_init_abe(void) {} +#endif + +#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) + +static struct platform_device omap_pcm = { + .name = "omap-pcm-audio", + .id = -1, +}; + +static struct platform_device omap_soc_audio = { + .id = -1, +}; + +/* + * Device for the ASoC OMAP4 HDMI machine driver + */ +static struct platform_device omap_hdmi_audio = { + .name = "omap4-hdmi-audio", + .id = -1, +}; + +/* + * OMAP2420 has 2 McBSP ports + * OMAP2430 has 5 McBSP ports + * OMAP3 has 5 McBSP ports + * OMAP4 has 4 McBSP ports + */ +OMAP_MCBSP_PLATFORM_DEVICE(1); +OMAP_MCBSP_PLATFORM_DEVICE(2); +OMAP_MCBSP_PLATFORM_DEVICE(3); +OMAP_MCBSP_PLATFORM_DEVICE(4); +OMAP_MCBSP_PLATFORM_DEVICE(5); + +static struct { + int machine; + const char *name; +} soc_device_names[] = { + { MACH_TYPE_OMAP3517EVM, "am3517evm-soc-audio" }, + { MACH_TYPE_IGEP0020, "igep2-soc-audio" }, + { MACH_TYPE_NOKIA_N810, "n8x1-soc-audio" }, + { MACH_TYPE_NOKIA_N810_WIMAX, "n8x1-soc-audio" }, + { MACH_TYPE_OMAP3_BEAGLE, "omap3beagle-soc-audio" }, + { MACH_TYPE_DEVKIT8000, "omap3beagle-soc-audio" }, + { MACH_TYPE_OMAP3EVM, "omap3evm-soc-audio" }, + { MACH_TYPE_OMAP3_PANDORA, "pandora-soc-audio" }, + { MACH_TYPE_OVERO, "overo-soc-audio", }, + { MACH_TYPE_CM_T35, "overo-soc-audio", }, + { MACH_TYPE_NOKIA_RX51, "rx51-soc-audio", }, + { MACH_TYPE_OMAP_3430SDP, "sdp3430-soc-audio", }, + { MACH_TYPE_OMAP_4430SDP, "sdp4430-soc-audio", }, + { MACH_TYPE_OMAP_ZOOM2, "zoom2-soc-audio", }, +}; + +static void omap_init_audio(void) +{ +<<<<<<< + int i; + +======= + struct omap_hwmod *oh_hdmi; + struct omap_device *od_hdmi; + char *oh_hdmi_name = "dss_hdmi"; + char *dev_hdmi_name = "hdmi-audio-dai"; +#if 0 + if (cpu_is_omap44xx()) { + oh_hdmi = omap_hwmod_lookup(oh_hdmi_name); + WARN(!oh_hdmi, "%s: could not find omap_hwmod for %s\n", + __func__, oh_hdmi_name); + + od_hdmi = omap_device_build(dev_hdmi_name, -1, oh_hdmi, NULL, 0, + NULL, 0, false); + WARN(IS_ERR(od_hdmi), "%s: could not build omap_device for %s\n", + __func__, dev_hdmi_name); + + platform_device_register(&omap_hdmi_audio); + } +#endif +>>>>>>> + platform_device_register(&omap_mcbsp1); + platform_device_register(&omap_mcbsp2); + if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + platform_device_register(&omap_mcbsp3); + platform_device_register(&omap_mcbsp4); + } + if (cpu_is_omap243x() || cpu_is_omap34xx()) + platform_device_register(&omap_mcbsp5); + + platform_device_register(&omap_pcm); + + for (i = 0; i < ARRAY_SIZE(soc_device_names); i++) { + if (machine_arch_type == soc_device_names[i].machine) { + omap_soc_audio.name = soc_device_names[i].name; + platform_device_register(&omap_soc_audio); + break; + } + } +} + +#else +static inline void omap_init_audio(void) {} +#endif + +#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ + defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) + +static struct omap_device_pm_latency omap_mcpdm_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static void omap_init_mcpdm(void) +{ + struct omap_hwmod *oh; + struct omap_device *od; + + oh = omap_hwmod_lookup("mcpdm"); + if (!oh) { + printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); + return; + } + + od = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, + omap_mcpdm_latency, + ARRAY_SIZE(omap_mcpdm_latency), 0); + if (IS_ERR(od)) + printk(KERN_ERR "Could not build omap_device for omap-mcpdm-dai\n"); +} +#else +static inline void omap_init_mcpdm(void) {} +#endif + +#if defined(CONFIG_SND_OMAP_SOC_ABE_DSP) || \ + defined(CONFIG_SND_OMAP_SOC_ABE_DSP_MODULE) + +static struct omap_device_pm_latency omap_aess_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static void omap_init_aess(void) +{ + struct omap_hwmod *oh; + struct omap_device *od; + struct omap4_abe_dsp_pdata *pdata; + + oh = omap_hwmod_lookup("aess"); + if (!oh) { + printk (KERN_ERR "Could not look up aess hw_mod\n"); + return; + } + + pdata = kzalloc(sizeof(struct omap4_abe_dsp_pdata), GFP_KERNEL); + if (!pdata) { + printk(KERN_ERR "Could not allocate platform data\n"); + return; + } + + /* FIXME: Add correct context loss counter */ + //pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; + + od = omap_device_build("aess", -1, oh, pdata, + sizeof(struct omap4_abe_dsp_pdata), + omap_aess_latency, + ARRAY_SIZE(omap_aess_latency), 0); + + kfree(pdata); + + if (IS_ERR(od)) + printk(KERN_ERR "Could not build omap_device for omap-aess-audio\n"); +} +#else +static inline void omap_init_aess(void) {} +#endif + +#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) + +#include <plat/mcspi.h> + +struct omap_device_pm_latency omap_mcspi_latency[] = { + [0] = { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) +{ + struct omap_device *od; + char *name = "omap2_mcspi"; + struct omap2_mcspi_platform_config *pdata; + static int spi_num; + struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) { + pr_err("Memory allocation for McSPI device failed\n"); + return -ENOMEM; + } + + pdata->num_cs = mcspi_attrib->num_chipselect; + switch (oh->class->rev) { + case OMAP2_MCSPI_REV: + case OMAP3_MCSPI_REV: + pdata->regs_offset = 0; + break; + case OMAP4_MCSPI_REV: + pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; + break; + default: + pr_err("Invalid McSPI Revision value\n"); + return -EINVAL; + } + + spi_num++; + od = omap_device_build(name, spi_num, oh, pdata, + sizeof(*pdata), omap_mcspi_latency, + ARRAY_SIZE(omap_mcspi_latency), 0); + WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", + name, oh->name); + kfree(pdata); + return 0; +} + +static void omap_init_mcspi(void) +{ + omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); +} + +#else +static inline void omap_init_mcspi(void) {} +#endif + +static struct resource omap2_pmu_resource = { + .start = 3, + .end = 3, + .flags = IORESOURCE_IRQ, +}; + +static struct resource omap3_pmu_resource = { + .start = INT_34XX_BENCH_MPU_EMUL, + .end = INT_34XX_BENCH_MPU_EMUL, + .flags = IORESOURCE_IRQ, +}; + +static struct platform_device omap_pmu_device = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .num_resources = 1, +}; + +static void omap_init_pmu(void) +{ + if (cpu_is_omap24xx()) + omap_pmu_device.resource = &omap2_pmu_resource; + else if (cpu_is_omap34xx()) + omap_pmu_device.resource = &omap3_pmu_resource; + else + return; + + platform_device_register(&omap_pmu_device); +} + + +#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE) + +#ifdef CONFIG_ARCH_OMAP2 +static struct resource omap2_sham_resources[] = { + { + .start = OMAP24XX_SEC_SHA1MD5_BASE, + .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_SHA1MD5, + .flags = IORESOURCE_IRQ, + } +}; +static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources); +#else +#define omap2_sham_resources NULL +#define omap2_sham_resources_sz 0 +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct resource omap3_sham_resources[] = { + { + .start = OMAP34XX_SEC_SHA1MD5_BASE, + .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_34XX_SHA1MD52_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = OMAP34XX_DMA_SHA1MD5_RX, + .flags = IORESOURCE_DMA, + } +}; +static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources); +#else +#define omap3_sham_resources NULL +#define omap3_sham_resources_sz 0 +#endif + +static struct platform_device sham_device = { + .name = "omap-sham", + .id = -1, +}; + +static void omap_init_sham(void) +{ + if (cpu_is_omap24xx()) { + sham_device.resource = omap2_sham_resources; + sham_device.num_resources = omap2_sham_resources_sz; + } else if (cpu_is_omap34xx()) { + sham_device.resource = omap3_sham_resources; + sham_device.num_resources = omap3_sham_resources_sz; + } else { + pr_err("%s: platform not supported\n", __func__); + return; + } + platform_device_register(&sham_device); +} +#else +static inline void omap_init_sham(void) { } +#endif + +#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) + +#ifdef CONFIG_ARCH_OMAP2 +static struct resource omap2_aes_resources[] = { + { + .start = OMAP24XX_SEC_AES_BASE, + .end = OMAP24XX_SEC_AES_BASE + 0x4C, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP24XX_DMA_AES_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = OMAP24XX_DMA_AES_RX, + .flags = IORESOURCE_DMA, + } +}; +static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources); +#else +#define omap2_aes_resources NULL +#define omap2_aes_resources_sz 0 +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct resource omap3_aes_resources[] = { + { + .start = OMAP34XX_SEC_AES_BASE, + .end = OMAP34XX_SEC_AES_BASE + 0x4C, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP34XX_DMA_AES2_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = OMAP34XX_DMA_AES2_RX, + .flags = IORESOURCE_DMA, + } +}; +static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources); +#else +#define omap3_aes_resources NULL +#define omap3_aes_resources_sz 0 +#endif + +static struct platform_device aes_device = { + .name = "omap-aes", + .id = -1, +}; + +static void omap_init_aes(void) +{ + if (cpu_is_omap24xx()) { + aes_device.resource = omap2_aes_resources; + aes_device.num_resources = omap2_aes_resources_sz; + } else if (cpu_is_omap34xx()) { + aes_device.resource = omap3_aes_resources; + aes_device.num_resources = omap3_aes_resources_sz; + } else { + pr_err("%s: platform not supported\n", __func__); + return; + } + platform_device_register(&aes_device); +} + +#else +static inline void omap_init_aes(void) { } +#endif + +/*-------------------------------------------------------------------------*/ + +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) + +static inline void omap242x_mmc_mux(struct omap_mmc_platform_data + *mmc_controller) +{ + if ((mmc_controller->slots[0].switch_pin > 0) && \ + (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES)) + omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, + OMAP_PIN_INPUT_PULLUP); + if ((mmc_controller->slots[0].gpio_wp > 0) && \ + (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES)) + omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, + OMAP_PIN_INPUT_PULLUP); + + omap_mux_init_signal("sdmmc_cmd", 0); + omap_mux_init_signal("sdmmc_clki", 0); + omap_mux_init_signal("sdmmc_clko", 0); + omap_mux_init_signal("sdmmc_dat0", 0); + omap_mux_init_signal("sdmmc_dat_dir0", 0); + omap_mux_init_signal("sdmmc_cmd_dir", 0); + if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) { + omap_mux_init_signal("sdmmc_dat1", 0); + omap_mux_init_signal("sdmmc_dat2", 0); + omap_mux_init_signal("sdmmc_dat3", 0); + omap_mux_init_signal("sdmmc_dat_dir1", 0); + omap_mux_init_signal("sdmmc_dat_dir2", 0); + omap_mux_init_signal("sdmmc_dat_dir3", 0); + } + + /* + * Use internal loop-back in MMC/SDIO Module Input Clock + * selection + */ + if (mmc_controller->slots[0].internal_clock) { + u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + v |= (1 << 24); + omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); + } +} + +void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) +{ + char *name = "mmci-omap"; + + if (!mmc_data[0]) { + pr_err("%s fails: Incomplete platform data\n", __func__); + return; + } + + omap242x_mmc_mux(mmc_data[0]); + omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE, + INT_24XX_MMC_IRQ, mmc_data[0]); +} + +#endif + +/*-------------------------------------------------------------------------*/ + +#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) +#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) +#define OMAP_HDQ_BASE 0x480B2000 +#endif +static struct resource omap_hdq_resources[] = { + { + .start = OMAP_HDQ_BASE, + .end = OMAP_HDQ_BASE + 0x1C, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_HDQ_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device omap_hdq_dev = { + .name = "omap_hdq", + .id = 0, + .dev = { + .platform_data = NULL, + }, + .num_resources = ARRAY_SIZE(omap_hdq_resources), + .resource = omap_hdq_resources, +}; +static inline void omap_hdq_init(void) +{ + (void) platform_device_register(&omap_hdq_dev); +} +#else +static inline void omap_hdq_init(void) {} +#endif + +/*---------------------------------------------------------------------------*/ + +#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ + defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE) +#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) +static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = { +}; +#else +static struct resource omap_vout_resource[2] = { +}; +#endif + +static struct platform_device omap_vout_device = { + .name = "omap_vout", + .num_resources = ARRAY_SIZE(omap_vout_resource), + .resource = &omap_vout_resource[0], + .id = -1, +}; +static void omap_init_vout(void) +{ + if (platform_device_register(&omap_vout_device) < 0) + printk(KERN_ERR "Unable to register OMAP-VOUT device\n"); +} +#else +static inline void omap_init_vout(void) {} +#endif + +static struct omap_device_pm_latency omap_drm_latency[] = { + [0] = { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static struct platform_device omap_omaplfb_device = { + .name = "omaplfb", + .id = -1, +}; + + +static void omap_init_gpu(void) +{ + struct omap_hwmod *oh; + struct omap_device *od; + int max_omap_drm_hwmod_name_len = 16; + char oh_name[max_omap_drm_hwmod_name_len]; + int l; + struct gpu_platform_data *pdata; + char *name = "omapdrm_pvr"; + + l = snprintf(oh_name, max_omap_drm_hwmod_name_len, + "gpu"); + WARN(l >= max_omap_drm_hwmod_name_len, + "String buffer overflow in GPU device setup\n"); + + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + + pr_err("omap_init_gpu: Could not look up %s\n", oh_name); + return; + } + + pdata = kzalloc(sizeof(struct gpu_platform_data), + GFP_KERNEL); + if (!pdata) { + pr_err("omap_init_gpu: Platform data memory allocation failed\n"); + return; + } + + pdata->device_enable = omap_device_enable; + pdata->device_idle = omap_device_idle; + pdata->device_shutdown = omap_device_shutdown; + + od = omap_device_build(name, 0, oh, pdata, + sizeof(struct gpu_platform_data), + omap_drm_latency, ARRAY_SIZE(omap_drm_latency), 0); + WARN(IS_ERR(od), "Could not build omap_device for %s %s\n", + name, oh_name); + + kfree(pdata); + platform_device_register(&omap_omaplfb_device); +} + +/*-------------------------------------------------------------------------*/ + +static int __init omap2_init_devices(void) +{ + /* + * please keep these calls, and their implementations above, + * in alphabetical order so they're easier to sort through. + */ + omap_init_abe(); + omap_init_aess(); + omap_init_audio(); + omap_init_dmic(); + omap_init_mcpdm(); + omap_init_camera(); + omap_init_mbox(); + omap_init_mcspi(); + omap_init_pmu(); + omap_hdq_init(); + omap_init_sti(); + omap_init_sham(); + omap_init_aes(); + omap_init_vout(); + omap_init_gpu(); + + return 0; +} +arch_initcall(omap2_init_devices); + +#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) +static struct omap_device_pm_latency omap_wdt_latency[] = { + [0] = { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static int __init omap_init_wdt(void) +{ + int id = -1; + struct omap_device *od; + struct omap_hwmod *oh; + char *oh_name = "wd_timer2"; + char *dev_name = "omap_wdt"; + + if (!cpu_class_is_omap2()) + return 0; + + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up wd_timer%d hwmod\n", id); + return -EINVAL; + } + + od = omap_device_build(dev_name, id, oh, NULL, 0, + omap_wdt_latency, + ARRAY_SIZE(omap_wdt_latency), 0); + WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", + dev_name, oh->name); + return 0; +} +subsys_initcall(omap_init_wdt); +#endif |