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// SPDX-License-Identifier: GPL-2.0
#include "linux.h"
#include "ipa_reg_new.h"
static const u32 ipa_reg_comp_cfg_field[] = {
/* Bit 0 reserved */
[COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
[COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
[COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
[COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
[COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
[COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
[COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
[COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
[COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
[COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
[COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
[COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
[COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
[COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
[COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
[COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
[COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
/* Bits 21-31 reserved */
};
IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
static const struct ipa_reg *ipa_reg[] = {
[IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
};
const struct ipa_regs ipa_regs_v4_2 = {
.reg_count = ARRAY_SIZE(ipa_reg),
.reg = ipa_reg,
};
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