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-rw-r--r--Makefile8
-rw-r--r--ipa_reg-v3.0.c23
-rw-r--r--ipa_reg-v3.1.c23
-rw-r--r--ipa_reg-v3.5.1.c23
-rw-r--r--ipa_reg-v3.5.c23
-rw-r--r--ipa_reg-v4.0.c36
-rw-r--r--ipa_reg-v4.1.c36
-rw-r--r--ipa_reg-v4.11.c42
-rw-r--r--ipa_reg-v4.2.c36
-rw-r--r--ipa_reg-v4.5.c37
-rw-r--r--ipa_reg-v4.7.c37
-rw-r--r--ipa_reg-v4.9.c42
-rw-r--r--ipa_reg_new.h87
13 files changed, 452 insertions, 1 deletions
diff --git a/Makefile b/Makefile
index 398b4ff..3406e17 100644
--- a/Makefile
+++ b/Makefile
@@ -3,14 +3,20 @@
CC = gcc
CFLAGS = -Wall -O4
-CFILES = regs.c ipa_reg.c
+CFILES = regs.c ipa_reg.c $(IPA_REG_VER_C)
+IPA_REG_VER_C = ipa_reg-v3.0.c ipa_reg-v3.1.c ipa_reg-v3.5.c \
+ ipa_reg-v3.5.1.c ipa_reg-v4.0.c ipa_reg-v4.1.c \
+ ipa_reg-v4.2.c ipa_reg-v4.5.c ipa_reg-v4.7.c \
+ ipa_reg-v4.9.c ipa_reg-v4.11.c
OFILES = $(CFILES:.c=.o)
+IPA_REG_VER_O = $(IPA_REG_VER_C:.c=.o)
regs: $(OFILES)
regs.o: ipa_reg.h
ipa_reg.o: ipa_reg.h
+$(IPA_REG_VER_O): linux.h ipa_reg.h
ipa_reg.h: ipa_version.h gsi_ee.h
gsi_reg.h: bitfield.h
diff --git a/ipa_reg-v3.0.c b/ipa_reg-v3.0.c
new file mode 100644
index 0000000..523a85a
--- /dev/null
+++ b/ipa_reg-v3.0.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [COMP_CFG_ENABLE] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ /* Bits 5-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v3_0 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v3.1.c b/ipa_reg-v3.1.c
new file mode 100644
index 0000000..78c50f0
--- /dev/null
+++ b/ipa_reg-v3.1.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [COMP_CFG_ENABLE] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ /* Bits 5-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v3_1 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v3.5.1.c b/ipa_reg-v3.5.1.c
new file mode 100644
index 0000000..4d7f9b4
--- /dev/null
+++ b/ipa_reg-v3.5.1.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [COMP_CFG_ENABLE] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ /* Bits 5-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v3_5_1 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v3.5.c b/ipa_reg-v3.5.c
new file mode 100644
index 0000000..36c7a99
--- /dev/null
+++ b/ipa_reg-v3.5.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [COMP_CFG_ENABLE] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ /* Bits 5-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v3_5 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.0.c b/ipa_reg-v4.0.c
new file mode 100644
index 0000000..ac464e7
--- /dev/null
+++ b/ipa_reg-v4.0.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ /* Bit 0 reserved */
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
+ /* Bits 21-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_0 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.1.c b/ipa_reg-v4.1.c
new file mode 100644
index 0000000..de95496
--- /dev/null
+++ b/ipa_reg-v4.1.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ /* Bit 0 reserved */
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
+ /* Bits 21-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_1 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.11.c b/ipa_reg-v4.11.c
new file mode 100644
index 0000000..4103d32
--- /dev/null
+++ b/ipa_reg-v4.11.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ /* Bit 4 reserved */
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_FULL_FLUSH_WAIT_RS_CLOSURE_EN] = BIT(17),
+ [COMP_CFG_QMB_RAM_RD_CACHE_DISABLE] = BIT(19),
+ [COMP_CFG_GENQMB_AOOOWR] = BIT(20),
+ [COMP_CFG_IF_OUT_OF_BUF_STOP_RESET_MASK_EN] = BIT(21),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(23, 22),
+ /* Bits 24-29 reserved */
+ [COMP_CFG_GEN_QMB_1_DYNAMIC_ASIZE] = BIT(30),
+ [COMP_CFG_GEN_QMB_0_DYNAMIC_ASIZE] = BIT(31),
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_11 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.2.c b/ipa_reg-v4.2.c
new file mode 100644
index 0000000..1920a92
--- /dev/null
+++ b/ipa_reg-v4.2.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ /* Bit 0 reserved */
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ [COMP_CFG_IPA_DCMP_FAST_CLK_EN] = BIT(4),
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
+ /* Bits 21-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_2 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.5.c b/ipa_reg-v4.5.c
new file mode 100644
index 0000000..bceac70
--- /dev/null
+++ b/ipa_reg-v4.5.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ /* Bit 0 reserved */
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ /* Bit 4 reserved */
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
+ [COMP_CFG_FULL_FLUSH_WAIT_RS_CLOSURE_EN] = BIT(21),
+ /* Bits 22-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_5 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.7.c b/ipa_reg-v4.7.c
new file mode 100644
index 0000000..c945af4
--- /dev/null
+++ b/ipa_reg-v4.7.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ /* Bit 4 reserved */
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(20, 17),
+ [COMP_CFG_FULL_FLUSH_WAIT_RS_CLOSURE_EN] = BIT(21),
+ /* Bits 22-31 reserved */
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_7 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg-v4.9.c b/ipa_reg-v4.9.c
new file mode 100644
index 0000000..9615038
--- /dev/null
+++ b/ipa_reg-v4.9.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "linux.h"
+#include "ipa_reg_new.h"
+
+static const u32 ipa_reg_comp_cfg_field[] = {
+ [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0),
+ [COMP_CFG_GSI_SNOC_BYPASS_DIS] = BIT(1),
+ [COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
+ [COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
+ /* Bit 4 reserved */
+ [COMP_CFG_IPA_QMB_SELECT_CONS_EN] = BIT(5),
+ [COMP_CFG_IPA_QMB_SELECT_PROD_EN] = BIT(6),
+ [COMP_CFG_GSI_MULTI_INORDER_RD_DIS] = BIT(7),
+ [COMP_CFG_GSI_MULTI_INORDER_WR_DIS] = BIT(8),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS] = BIT(9),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS] = BIT(10),
+ [COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS] = BIT(11),
+ [COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS] = BIT(12),
+ [COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS] = BIT(13),
+ [COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE] = BIT(14),
+ [COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS] = BIT(15),
+ [COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
+ [COMP_CFG_FULL_FLUSH_WAIT_RS_CLOSURE_EN] = BIT(17),
+ [COMP_CFG_QMB_RAM_RD_CACHE_DISABLE] = BIT(19),
+ [COMP_CFG_GENQMB_AOOOWR] = BIT(20),
+ [COMP_CFG_IF_OUT_OF_BUF_STOP_RESET_MASK_EN] = BIT(21),
+ [COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS] = GENMASK(24, 22),
+ /* Bits 25-29 reserved */
+ [COMP_CFG_GEN_QMB_1_DYNAMIC_ASIZE] = BIT(30),
+ [COMP_CFG_GEN_QMB_0_DYNAMIC_ASIZE] = BIT(31),
+};
+IPA_REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
+
+static const struct ipa_reg *ipa_reg[] = {
+ [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg,
+};
+
+const struct ipa_regs ipa_regs_v4_9 = {
+ .reg_count = ARRAY_SIZE(ipa_reg),
+ .reg = ipa_reg,
+};
diff --git a/ipa_reg_new.h b/ipa_reg_new.h
new file mode 100644
index 0000000..4233604
--- /dev/null
+++ b/ipa_reg_new.h
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#ifndef _IPA_REG_NEW_H
+#define _IPA_REG_NEW_H
+
+#include "linux.h"
+
+struct ipa_reg {
+ u32 offset;
+ u32 field_count;
+ u32 stride;
+ const u32 *fmask; /* BIT(nr) or GENMASK(h, l) */
+ const char *name;
+};
+
+struct ipa_regs {
+ u32 reg_count;
+ const struct ipa_reg **reg;
+};
+
+enum ipa_reg_name {
+ IPA_REG_COMP_CFG,
+};
+
+#define IPA_REG(__NAME, __name, __offset) \
+ IPA_REG_STRIDE(__NAME, __name, __offset, 0)
+
+#define IPA_REG_STRIDE(__NAME, __name, __offset, __stride) \
+ static const struct ipa_reg ipa_reg_ ## __name = { \
+ .name = #__NAME, \
+ .offset = __offset, \
+ .stride = __stride, \
+ }
+
+#define IPA_REG_FIELDS(__NAME, __name, __offset) \
+ IPA_REG_STRIDE_FIELDS(__NAME, __name, __offset, 0)
+
+#define IPA_REG_STRIDE_FIELDS(__NAME, __name, __offset, __stride) \
+ static const struct ipa_reg ipa_reg_ ## __name = { \
+ .name = #__NAME, \
+ .offset = __offset, \
+ .stride = __stride, \
+ .field_count = ARRAY_SIZE(ipa_reg_ ## __name ## _field), \
+ .fmask = ipa_reg_ ## __name ## _field, \
+ }
+
+enum ipa_reg_comp_cfg_field_name {
+ COMP_CFG_ENABLE, /* Not IPA v4.0+ */
+ RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS, /* IPA v4.7+ */
+ COMP_CFG_GSI_SNOC_BYPASS_DIS,
+ COMP_CFG_GEN_QMB_0_SNOC_BYPASS_DIS,
+ COMP_CFG_GEN_QMB_1_SNOC_BYPASS_DIS,
+ COMP_CFG_IPA_DCMP_FAST_CLK_EN, /* Not IPA v4.5+ */
+ COMP_CFG_IPA_QMB_SELECT_CONS_EN, /* IPA v4.0+ */
+ COMP_CFG_IPA_QMB_SELECT_PROD_EN, /* IPA v4.0+ */
+ COMP_CFG_GSI_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
+ COMP_CFG_GSI_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
+ COMP_CFG_GEN_QMB_0_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
+ COMP_CFG_GEN_QMB_1_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
+ COMP_CFG_GEN_QMB_0_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
+ COMP_CFG_GEN_QMB_1_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
+ COMP_CFG_GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS, /* IPA v4.0+ */
+ COMP_CFG_GSI_SNOC_CNOC_LOOP_PROT_DISABLE, /* IPA v4.0+ */
+ COMP_CFG_GSI_MULTI_AXI_MASTERS_DIS, /* IPA v4.0+ */
+ COMP_CFG_IPA_QMB_SELECT_GLOBAL_EN, /* IPA v4.0+ */
+ COMP_CFG_QMB_RAM_RD_CACHE_DISABLE, /* IPA v4.9+ */
+ COMP_CFG_GENQMB_AOOOWR, /* IPA v4.9+ */
+ COMP_CFG_IF_OUT_OF_BUF_STOP_RESET_MASK_EN, /* IPA v4.9+ */
+ COMP_CFG_GEN_QMB_1_DYNAMIC_ASIZE, /* IPA v4.9+ */
+ COMP_CFG_GEN_QMB_0_DYNAMIC_ASIZE, /* IPA v4.9+ */
+ COMP_CFG_ATOMIC_FETCHER_ARB_LOCK_DIS, /* IPA v4.0+ */
+ COMP_CFG_FULL_FLUSH_WAIT_RS_CLOSURE_EN, /* IPA v4.5+ */
+};
+
+extern const struct ipa_regs ipa_regs_v3_0;
+extern const struct ipa_regs ipa_regs_v3_1;
+extern const struct ipa_regs ipa_regs_v3_5;
+extern const struct ipa_regs ipa_regs_v3_5_1;
+extern const struct ipa_regs ipa_regs_v4_0;
+extern const struct ipa_regs ipa_regs_v4_1;
+extern const struct ipa_regs ipa_regs_v4_2;
+extern const struct ipa_regs ipa_regs_v4_5;
+extern const struct ipa_regs ipa_regs_v4_7;
+extern const struct ipa_regs ipa_regs_v4_9;
+extern const struct ipa_regs ipa_regs_v4_11;
+
+#endif /* _IPA_REG_NEW_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-01 13:36:10 +0000