diff options
-rw-r--r-- | ipa_reg-v3.5.1.c | 9 | ||||
-rw-r--r-- | ipa_reg-v3.5.c | 9 | ||||
-rw-r--r-- | ipa_reg-v4.0.c | 13 | ||||
-rw-r--r-- | ipa_reg-v4.1.c | 13 | ||||
-rw-r--r-- | ipa_reg-v4.11.c | 15 | ||||
-rw-r--r-- | ipa_reg-v4.2.c | 16 | ||||
-rw-r--r-- | ipa_reg-v4.5.c | 14 | ||||
-rw-r--r-- | ipa_reg-v4.7.c | 15 | ||||
-rw-r--r-- | ipa_reg-v4.9.c | 15 | ||||
-rw-r--r-- | ipa_reg_new.h | 16 |
10 files changed, 135 insertions, 0 deletions
diff --git a/ipa_reg-v3.5.1.c b/ipa_reg-v3.5.1.c index 901228d..46135d5 100644 --- a/ipa_reg-v3.5.1.c +++ b/ipa_reg-v3.5.1.c @@ -131,6 +131,14 @@ static const u32 ipa_reg_counter_cfg_field[] = { }; IPA_REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0); +static const u32 ipa_reg_tx_cfg_field[] = { + [TX0_PREFETCH_DISABLE] = BIT(0), + [TX1_PREFETCH_DISABLE] = BIT(1), + [PREFETCH_ALMOST_EMPTY_SIZE] = GENMASK(4, 2), + /* Bits 5-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -145,6 +153,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, [IPA_REG_COUNTER_CFG] = &ipa_reg_counter_cfg, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v3_5_1 = { diff --git a/ipa_reg-v3.5.c b/ipa_reg-v3.5.c index bb04811..b056571 100644 --- a/ipa_reg-v3.5.c +++ b/ipa_reg-v3.5.c @@ -130,6 +130,14 @@ static const u32 ipa_reg_counter_cfg_field[] = { }; IPA_REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0); +static const u32 ipa_reg_tx_cfg_field[] = { + [TX0_PREFETCH_DISABLE] = BIT(0), + [TX1_PREFETCH_DISABLE] = BIT(1), + [PREFETCH_ALMOST_EMPTY_SIZE] = GENMASK(4, 2), + /* Bits 5-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -144,6 +152,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, [IPA_REG_COUNTER_CFG] = &ipa_reg_counter_cfg, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v3_5 = { diff --git a/ipa_reg-v4.0.c b/ipa_reg-v4.0.c index dd01cfb..0127762 100644 --- a/ipa_reg-v4.0.c +++ b/ipa_reg-v4.0.c @@ -154,6 +154,18 @@ static const u32 ipa_reg_counter_cfg_field[] = { }; IPA_REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + /* Bits 17-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -168,6 +180,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, [IPA_REG_COUNTER_CFG] = &ipa_reg_counter_cfg, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_0 = { diff --git a/ipa_reg-v4.1.c b/ipa_reg-v4.1.c index 55507b6..a32d086 100644 --- a/ipa_reg-v4.1.c +++ b/ipa_reg-v4.1.c @@ -154,6 +154,18 @@ static const u32 ipa_reg_counter_cfg_field[] = { }; IPA_REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + /* Bits 17-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -168,6 +180,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, [IPA_REG_COUNTER_CFG] = &ipa_reg_counter_cfg, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_1 = { diff --git a/ipa_reg-v4.11.c b/ipa_reg-v4.11.c index 1c05b96..deddfeb 100644 --- a/ipa_reg-v4.11.c +++ b/ipa_reg-v4.11.c @@ -139,6 +139,20 @@ IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8); /* ipa->available defines valid bits (no fields) */ IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + [DUAL_TX_ENABLE] = BIT(17), + [SSPND_PA_NO_START_STATE] = BIT(18), + /* Bits 19-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -151,6 +165,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_STATE_AGGR_ACTIVE] = &ipa_reg_state_aggr_active, [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_11 = { diff --git a/ipa_reg-v4.2.c b/ipa_reg-v4.2.c index 8d0e820..f2dfe96 100644 --- a/ipa_reg-v4.2.c +++ b/ipa_reg-v4.2.c @@ -150,6 +150,21 @@ static const u32 ipa_reg_counter_cfg_field[] = { }; IPA_REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + /* Bit 17 reserved */ + [SSPND_PA_NO_START_STATE] = BIT(18), + [SSPND_PA_NO_BQ_STATE] = BIT(19), + /* Bits 20-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -164,6 +179,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, [IPA_REG_COUNTER_CFG] = &ipa_reg_counter_cfg, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_2 = { diff --git a/ipa_reg-v4.5.c b/ipa_reg-v4.5.c index fcfafd2..2f4f655 100644 --- a/ipa_reg-v4.5.c +++ b/ipa_reg-v4.5.c @@ -134,6 +134,19 @@ IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8); /* ipa->available defines valid bits (no fields) */ IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + [DUAL_TX_ENABLE] = BIT(17), + /* Bits 18-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -146,6 +159,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_STATE_AGGR_ACTIVE] = &ipa_reg_state_aggr_active, [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_5 = { diff --git a/ipa_reg-v4.7.c b/ipa_reg-v4.7.c index 1c3a842..2b20c55 100644 --- a/ipa_reg-v4.7.c +++ b/ipa_reg-v4.7.c @@ -134,6 +134,20 @@ IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8); /* ipa->available defines valid bits (no fields) */ IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + [DUAL_TX_ENABLE] = BIT(17), + [SSPND_PA_NO_START_STATE] = BIT(18), + /* Bits 19-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -146,6 +160,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_STATE_AGGR_ACTIVE] = &ipa_reg_state_aggr_active, [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_7 = { diff --git a/ipa_reg-v4.9.c b/ipa_reg-v4.9.c index 46128b8..e11a15f 100644 --- a/ipa_reg-v4.9.c +++ b/ipa_reg-v4.9.c @@ -139,6 +139,20 @@ IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8); /* ipa->available defines valid bits (no fields) */ IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec); +static const u32 ipa_reg_tx_cfg_field[] = { + /* Bits 0-1 reserved */ + [PREFETCH_ALMOST_EMPTY_SIZE_TX0] = GENMASK(5, 2), + [DMAW_SCND_OUTSD_PRED_THRESHOLD] = GENMASK(9, 6), + [DMAW_SCND_OUTSD_PRED_EN] = BIT(10), + [DMAW_MAX_BEATS_256_DIS] = BIT(11), + [PA_MASK_EN] = BIT(12), + [PREFETCH_ALMOST_EMPTY_SIZE_TX1] = GENMASK(16, 13), + [DUAL_TX_ENABLE] = BIT(17), + [SSPND_PA_NO_START_STATE] = BIT(18), + /* Bits 19-31 reserved */ +}; +IPA_REG_FIELDS(TX_CFG, tx_cfg, 0x000001fc); + static const struct ipa_reg *ipa_reg[] = { [IPA_REG_COMP_CFG] = &ipa_reg_comp_cfg, [IPA_REG_CLKON_CFG] = &ipa_reg_clkon_cfg, @@ -151,6 +165,7 @@ static const struct ipa_reg *ipa_reg[] = { [IPA_REG_STATE_AGGR_ACTIVE] = &ipa_reg_state_aggr_active, [IPA_REG_LOCAL_PKT_PROC_CNTXT] = &ipa_reg_local_pkt_proc_cntxt, [IPA_REG_AGGR_FORCE_CLOSE] = &ipa_reg_aggr_force_close, + [IPA_REG_TX_CFG] = &ipa_reg_tx_cfg, }; const struct ipa_regs ipa_regs_v4_9 = { diff --git a/ipa_reg_new.h b/ipa_reg_new.h index ae9b0cf..ec6b103 100644 --- a/ipa_reg_new.h +++ b/ipa_reg_new.h @@ -32,6 +32,7 @@ enum ipa_reg_name { IPA_REG_LOCAL_PKT_PROC_CNTXT, IPA_REG_AGGR_FORCE_CLOSE, IPA_REG_COUNTER_CFG, /* Not IPA v4.5+ */ + IPA_REG_TX_CFG, /* IPA v3.5+ */ }; #define IPA_REG(__NAME, __name, __offset) \ @@ -174,6 +175,21 @@ enum ipa_reg_counter_cfg_field_name { AGGR_GRANULARITY, }; +enum ipa_reg_tx_cfg_field_name { + TX0_PREFETCH_DISABLE, /* Not IPA v4.0+ */ + TX1_PREFETCH_DISABLE, /* Not IPA v4.0+ */ + PREFETCH_ALMOST_EMPTY_SIZE, /* Not IPA v4.0+ */ + PREFETCH_ALMOST_EMPTY_SIZE_TX0, /* IPA v4.0+ */ + DMAW_SCND_OUTSD_PRED_THRESHOLD, /* IPA v4.0+ */ + DMAW_SCND_OUTSD_PRED_EN, /* IPA v4.0+ */ + DMAW_MAX_BEATS_256_DIS, /* IPA v4.0+ */ + PA_MASK_EN, /* IPA v4.0+ */ + PREFETCH_ALMOST_EMPTY_SIZE_TX1, /* IPA v4.0+ */ + DUAL_TX_ENABLE, /* IPA v4.5+ */ + SSPND_PA_NO_START_STATE, /* IPA v4.2+, not IPA v4.5 */ + SSPND_PA_NO_BQ_STATE, /* IPA v4.2 only */ +}; + extern const struct ipa_regs ipa_regs_v3_0; extern const struct ipa_regs ipa_regs_v3_1; extern const struct ipa_regs ipa_regs_v3_5; |