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Diffstat (limited to 'Documentation/devicetree/bindings/arm')
3 files changed, 183 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/ipc-spinlock.txt b/Documentation/devicetree/bindings/arm/msm/ipc-spinlock.txt new file mode 100644 index 000000000000..24dbb4b83d99 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/ipc-spinlock.txt @@ -0,0 +1,27 @@ +Qualcomm Interprocessor Communication Spinlock + +--Dedicated Hardware Implementation-- +Required properties: +- compatible : should be "qcom,ipc-spinlock-sfpb" +- reg : the location and size of the spinlock hardware +- qcom,num-locks : the number of locks supported + +Example: + + qcom,ipc-spinlock@fd484000 { + compatible = "qcom,ipc-spinlock-sfpb"; + reg = <0xfd484000 0x1000>; + qcom,num-locks = <32>; + }; + +--LDREX Implementation-- +Required properties: +- compatible : should be "qcom,ipc-spinlock-ldrex" +- reg : the location and size of the shared lock memory + +Example: + + qcom,ipc-spinlock@fa00000 { + compatible = "qcom,ipc-spinlock-ldrex"; + reg = <0xfa00000 0x200000>; + }; diff --git a/Documentation/devicetree/bindings/arm/msm/rpm-smd.txt b/Documentation/devicetree/bindings/arm/msm/rpm-smd.txt new file mode 100644 index 000000000000..c422477fd2a2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/rpm-smd.txt @@ -0,0 +1,34 @@ +Resource Power Manager(RPM) + +RPM is a dedicated hardware engine for managing shared SoC resources, +which includes buses, clocks, power rails, etc. The goal of RPM is +to achieve the maximum power savings while satisfying the SoC's +operational and performance requirements. RPM accepts resource +requests from multiple RPM masters. It arbitrates and aggregates the +requests, and configures the shared resources. The RPM masters are +the application processor, the modem processor, as well as hardware +accelerators. The RPM driver communicates with the hardware engine using +SMD. + +The devicetree representation of the SPM block should be: + +Required properties + +- compatible: "qcom,rpm-smd" +- rpm-channel-name: The string corresponding to the channel name of the + peripheral subsystem +- rpm-channel-type: The interal SMD edge for this subsystem found in + <soc/qcom/smd.h> + +Optional properties +- rpm-standalone: Allow RPM driver to run in standalone mode irrespective of RPM + channel presence. + +Example: + + qcom,rpm-smd { + compatible = "qcom,rpm-smd" + qcom,rpm-channel-name = "rpm_requests"; + qcom,rpm-channel-type = 15; /* SMD_APPS_RPM */ + } +} diff --git a/Documentation/devicetree/bindings/arm/msm/smem.txt b/Documentation/devicetree/bindings/arm/msm/smem.txt new file mode 100644 index 000000000000..2f92c0c2c4c4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/smem.txt @@ -0,0 +1,122 @@ +MSM Shared Memory + +[Root level node] +Required properties: +-compatible : should be "qcom,smem" +-reg : the location and size of smem (optional) + the irq register base address (required) + the location and size of auxiliary smem areas (optional) + the smem target info either from IMEM or register (optional) +-reg-names : "smem" - optional string to identify the shared memory region + "irq-reg-base" - string to identify the irq register region + "aux-mem1", "aux-mem2", "aux-mem3", ... - optional strings to + identify any auxiliary shared memory regions + "smem_targ_info_imem" - optional string to identify + the smem target info from IMEM memory + "smem_targ_info_reg" - optional string to identify + the smem target info from registers + one of the optional register names smem_targ_info_imem, + smem_targ_info_reg, or smem is required. + +Optional properties: +-qcom,mpu-enabled : boolean value indicating that Memory Protection Unit based + security is enabled on the "smem" shared memory region + +[Second level nodes] + +qcom,smd +Required properties: +-compatible : should be "qcom,smd" +-qcom,smd-edge : the smd edge +-qcom,smd-irq-offset : the offset into the irq register base memory for sending + interrupts +-qcom,smd-irq-bitmask : the sending irq bitmask +-interrupts : the receiving interrupt line +-label : the name of the remote subsystem for this edge + +Optional properties: +-qcom,irq-no-suspend: configure the incoming irq line as active during suspend +-qcom,not-loadable : indicates this processor cannot be loaded by PIL + +qcom,smsm +Required properties: +-compatible : should be "qcom,smsm" +-qcom,smsm-edge : the smsm edge +-qcom,smsm-irq-offset : the offset into the irq register base memory for sending + interrupts +-qcom,smsm-irq-bitmask : the sending irq bitmask +-interrupts : the receiving interrupt line + + +Example: + + qcom,smem@fa00000 { + compatible = "qcom,smem"; + reg = <0xfa00000 0x200000>, + <0xfa006000 0x1000>, + <0xfc428000 0x4000>; + reg-names = "smem", "irq-reg-base", "aux-mem1"; + + qcom,smd-modem { + compatible = "qcom,smd"; + qcom,smd-edge = <0>; + qcom,smd-irq-offset = <0x8>; + qcom,smd-irq-bitmask = <0x1000>; + interrupts = <0 25 1>; + label = "modem"; + }; + + qcom,smsm-modem { + compatible = "qcom,smsm"; + qcom,smsm-edge = <0>; + qcom,smsm-irq-offset = <0x8>; + qcom,smsm-irq-bitmask = <0x2000>; + interrupts = <0 26 1>; + }; + + qcom,smd-adsp { + compatible = "qcom,smd"; + qcom,smd-edge = <1>; + qcom,smd-irq-offset = <0x8>; + qcom,smd-irq-bitmask = <0x100>; + interrupts = <0 156 1>; + label = "adsp"; + }; + + qcom,smsm-adsp { + compatible = "qcom,smsm"; + qcom,smsm-edge = <1>; + qcom,smsm-irq-offset = <0x8>; + qcom,smsm-irq-bitmask = <0x200>; + interrupts = <0 157 1>; + }; + + qcom,smd-wcnss { + compatible = "qcom,smd"; + qcom,smd-edge = <6>; + qcom,smd-irq-offset = <0x8>; + qcom,smd-irq-bitmask = <0x20000>; + interrupts = <0 142 1>; + label = "wcnss"; + }; + + qcom,smsm-wcnss { + compatible = "qcom,smsm"; + qcom,smsm-edge = <6>; + qcom,smsm-irq-offset = <0x8>; + qcom,smsm-irq-bitmask = <0x80000>; + interrupts = <0 144 1>; + }; + + qcom,smd-rpm { + compatible = "qcom,smd"; + qcom,smd-edge = <15>; + qcom,smd-irq-offset = <0x8>; + qcom,smd-irq-bitmask = <0x1>; + interrupts = <0 168 1>; + label = "rpm"; + qcom,irq-no-syspend; + qcom,not-loadable; + }; + }; + |