diff options
| author | Zhangfei Gao <zhangfei.gao@linaro.org> | 2013-03-19 14:20:31 +0800 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2014-01-09 19:50:28 +0400 |
| commit | 4d68ef3c8998b5d85e3426d2295d4fdf91ced5f8 (patch) | |
| tree | ae35b7690c05c11b1f8fb97b58a05ab1c6710a4b /Documentation | |
| parent | 36ab959ca6ccf54366d019d9c4f7ab3d6791dd10 (diff) | |
mmc: add dw-mmc-k3
Add dw_mmc-k3.c for k3v2, support sd/emmc
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Zhigang Wang <brooke.wangzhigang@huawei.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt new file mode 100644 index 000000000000..54a9d8bfdfaf --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -0,0 +1,66 @@ +* Hisilicon specific extensions to the Synopsis Designware Mobile + Storage Host Controller + +Read synopsis-dw-mshc.txt for more details +The Synopsis designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsis dw mshc controller properties described +by synopsis-dw-mshc.txt and the properties used by the Hisilicon specific +extensions to the Synopsis Designware Mobile Storage Host Controller. + +Required Properties: + +* compatible: should be + - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 + specific extentions. +* vmmc-supply: should be vmmc used in dwmmc +* fifo-depth: should be provided if register can not provide correct value +* clken-reg: should be clock enable register and offset +* drv-sel-reg: should be driver delay select register and offset +* sam-sel-reg: should be sample delay select register and offset +* div-reg: should be divider register and offset + +Example: + + The MSHC controller node can be split into two portions, SoC specific and + board specific portions as listed below. + + dwmmc_0: dwmmc0@fcd03000 { + compatible = "hisilicon,hi4511-dw-mshc"; + reg = <0xfcd03000 0x1000>; + interrupts = <0 16 4>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_sd>, <&clk_ddrc_per>; + clock-names = "ciu", "biu"; + clken-reg = <0x1f8 0>; + drv-sel-reg = <0x1f8 4>; + sam-sel-reg = <0x1f8 8>; + div-reg = <0x1f8 1>; + }; + dwmmc0@fcd03000 { + num-slots = <1>; + vmmc-supply = <&ldo12>; + fifo-depth = <0x100>; + supports-highspeed; + pinctrl-names = "default"; + pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; + cd-gpio = <&gpio10 3 0>; + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + +PCTRL: + +Required Properties: +* compatible: should be + - "hisilicon,pctrl": Peripheral control + +Example: + + pctrl: pctrl@fca09000 { + compatible = "hisilicon,pctrl"; + reg = <0xfca09000 0x1000>; + }; |