summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRajendra Nayak <rnayak@codeaurora.org>2015-04-07 10:42:17 +0100
committerSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2015-04-07 15:11:53 +0100
commitc09cc3f140a04db9174a23d3152ade93486b71b7 (patch)
tree54fd39d1479bd9c1160f74a0e41097eb288c2845
parent4d19c45e515f213c50421f73555fbcc2155c8ba6 (diff)
arm64: dts: msm8916: Add thermal zones, tsens and eeprom nodes
Add thermal zones, tsens and eeprom nodes Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi66
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 0eee77387962..b1ef11e3880b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -837,6 +837,72 @@
#size-cells = <0>;
cell-index = <0>;
};
+
+ qfprom: qfprom@5c000 {
+ compatible = "qcom,qfprom";
+ reg = <0x5c000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ tsens_caldata: caldata@d0 {
+ reg = <0xd0 0x8>;
+ };
+ tsens_calsel: calsel@ec {
+ reg = <0xec 0x4>;
+ };
+ };
+
+ tsens: thermal-sensor@4a8000 {
+ compatible = "qcom,msm8916-tsens";
+ reg = <0x4a8000 0x2000>;
+ eeproms = <&tsens_caldata>, <&tsens_calsel>;
+ eeprom-names = "calib_data", "calib_sel";
+ qcom,tsens-slopes = <3200 3200 3200 3200 3200>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 4>;
+
+ trips {
+ cpu_alert0: trip@0 {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit0: trip@1 {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 3>;
+
+ trips {
+ cpu_alert2: trip@0 {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit2: trip@1 {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ };
+
};
};