diff options
| author | Amit Pundir <amit.pundir@linaro.org> | 2021-11-18 14:59:17 +0530 |
|---|---|---|
| committer | John Stultz <john.stultz@linaro.org> | 2022-01-14 00:26:03 +0000 |
| commit | fbd3fbbd53128af13d41ed94d4d47f3c782a7b28 (patch) | |
| tree | ccb254dfcb7d11a1207ae6e0269e0cc12dc8bae2 /db845c | |
| parent | 46a01ce97449e3882f61aaf7b28dc48927b6a661 (diff) | |
dragonboards: Move firmware files to external vendor overlay package
Moving all the vendor binaries (including bootloader, qdl
and firmware binaries) to an external vendor.tgz package
to be downloaded from:
https://releases.linaro.org/android/aosp-linaro-vendor-package/extract-linaro_devices-20220106.tgz
BUILD_BROKEN_ELF_PREBUILT_PRODUCT_COPY_FILES build flag is
used to copy a few vendor firmware files to ramdisk or
vendor_ramdisk to work-around the dependency of their
drivers on FW_LOADER_USER_HELPER_FALLBACK kernel config.
And for that we needed to bump up the boot and vendor_boot
partition sizes as well.
Also folded John's installer script changes into this patch.
Change-Id: I1b46ee17f4a218c735e2ac8d81759364b3bf7332
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
[Reworked to handle versioned vendor/linaro/<dev> paths]
Signed-off-by: John Stultz <john.stultz@linaro.org>
Diffstat (limited to 'db845c')
106 files changed, 4 insertions, 7244 deletions
diff --git a/db845c/BoardConfig.mk b/db845c/BoardConfig.mk index d668719..99b94f6 100644 --- a/db845c/BoardConfig.mk +++ b/db845c/BoardConfig.mk @@ -9,7 +9,7 @@ BOARD_INCLUDE_DTB_IN_BOOTIMG := true ifeq ($(TARGET_USES_BOOT_HDR_V3), true) BOARD_BOOT_HEADER_VERSION := 3 BOARD_KERNEL_PAGESIZE := 4096 - BOARD_VENDOR_BOOTIMAGE_PARTITION_SIZE := 67108864 #64M + BOARD_VENDOR_BOOTIMAGE_PARTITION_SIZE := 103079215104 #96M else BOARD_BOOT_HEADER_VERSION := 2 BOARD_KERNEL_PAGESIZE := 2048 @@ -21,7 +21,7 @@ BOARD_KERNEL_CMDLINE += init=/init androidboot.boot_devices=soc@0/1d84000.ufshc BOARD_KERNEL_CMDLINE += deferred_probe_timeout=30 # Image Configuration -BOARD_BOOTIMAGE_PARTITION_SIZE := 67108864 #64M +BOARD_BOOTIMAGE_PARTITION_SIZE := 103079215104 #96M BOARD_USERDATAIMAGE_PARTITION_SIZE := 21474836480 #20G BOARD_FLASH_BLOCK_SIZE := 512 # Super partition diff --git a/db845c/device.mk b/db845c/device.mk index 9191713..c08bbc4 100644 --- a/db845c/device.mk +++ b/db845c/device.mk @@ -17,6 +17,7 @@ # setup dalvik vm configs $(call inherit-product, frameworks/native/build/tablet-10in-xhdpi-2048-dalvik-heap.mk) +include $(LOCAL_PATH)/../vendor-package-ver.mk # Enable Virtual A/B AB_OTA_UPDATER := true AB_OTA_PARTITIONS += \ @@ -64,4 +65,4 @@ PRODUCT_VENDOR_PROPERTIES += ro.soc.model=SDM845 PRODUCT_PROPERTY_OVERRIDES += ro.sf.lcd_density=160 # Copy firmware files -$(call inherit-product-if-exists, $(LOCAL_PATH)/firmware/device.mk) +$(call inherit-product-if-exists, vendor/linaro/db845c/$(EXPECTED_LINARO_VENDOR_VERSION)/device.mk) diff --git a/db845c/firmware/Android.mk b/db845c/firmware/Android.mk deleted file mode 100644 index 48fa451..0000000 --- a/db845c/firmware/Android.mk +++ /dev/null @@ -1,126 +0,0 @@ -ifneq ($(filter db845c, $(TARGET_BOARD_PLATFORM)),) - -LOCAL_PATH := $(call my-dir) - -include device/linaro/dragonboard/utils.mk - -# Firmware files copied over from -# http://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_20190529180356-v3.zip - -# Adreno -firmware_files := \ - a630_gmu.bin \ - a630_sqe.fw \ - a630_zap.b00 \ - a630_zap.b01 \ - a630_zap.b02 \ - a630_zap.elf \ - a630_zap.mdt \ - a630_zap.mbn - -# DSP (adsp+cdsp) -sdm845_firmware_files += \ - adsp.b00 \ - adsp.b01 \ - adsp.b02 \ - adsp.b03 \ - adsp.b04 \ - adsp.b05 \ - adsp.b06 \ - adsp.b07 \ - adsp.b08 \ - adsp.b09 \ - adsp.b10 \ - adsp.b11 \ - adsp.b12 \ - adsp.b13 \ - adsp.mdt \ - adsp.mbn \ - adspr.jsn \ - adspua.jsn \ - cdsp.b00 \ - cdsp.b01 \ - cdsp.b02 \ - cdsp.b03 \ - cdsp.b04 \ - cdsp.b05 \ - cdsp.b06 \ - cdsp.b08 \ - cdsp.mdt \ - cdsp.mbn \ - cdspr.jsn \ - - -# USB -firmware_files += \ - K2026090.mem - -# Wlan -sdm845_firmware_files += \ - bdwlan.102 \ - bdwlan.104 \ - bdwlan.105 \ - bdwlan.106 \ - bdwlan.107 \ - bdwlan.108 \ - bdwlan.109 \ - bdwlan.10b \ - bdwlan.10c \ - bdwlan.b04 \ - bdwlan.b07 \ - bdwlan.b09 \ - bdwlan.b0a \ - bdwlan.b0b \ - bdwlan.b0d \ - bdwlan.b0e \ - bdwlan.b0f \ - bdwlan.b14 \ - bdwlan.b15 \ - bdwlan.b30 \ - bdwlan.b31 \ - bdwlan.b32 \ - bdwlan.b33 \ - bdwlan.b34 \ - bdwlan.b35 \ - bdwlan.b36 \ - bdwlan.b37 \ - bdwlan.b38 \ - bdwlan.b39 \ - bdwlan.b3a \ - bdwlan.b3c \ - bdwlan.b3d \ - bdwlan.b3e \ - bdwlan.b3f \ - bdwlan.b41 \ - bdwlan.b42 \ - bdwlan.b45 \ - bdwlan.b70 \ - bdwlan.bin \ - bdwlan.txt \ - wlanmdsp.mbn - -ath10k_firmware_files += \ - board-2.bin \ - firmware-5.bin \ - notice.txt_wlanmdsp - -# I2C/SPI fix -firmware_files += \ - devcfg.mbn - -# wifi/modem/mba -sdm845_firmware_files += \ - mba.mbn \ - modem.mbn \ - modemuw.jsn - -# License -firmware_files += \ - LICENSE.qcom.txt - -$(foreach f, $(firmware_files), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/)) -$(foreach f, $(sdm845_firmware_files), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/qcom/sdm845/)) -$(foreach f, $(ath10k_firmware_files), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/ath10k/WCN3990/hw1.0/)) - -include $(call all-makefiles-under,$(LOCAL_PATH)) -endif diff --git a/db845c/firmware/K2026090.mem b/db845c/firmware/K2026090.mem Binary files differdeleted file mode 100644 index 47424d4..0000000 --- a/db845c/firmware/K2026090.mem +++ /dev/null diff --git a/db845c/firmware/LICENSE.qcom.txt b/db845c/firmware/LICENSE.qcom.txt deleted file mode 100644 index c880572..0000000 --- a/db845c/firmware/LICENSE.qcom.txt +++ /dev/null @@ -1,206 +0,0 @@ -PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY. 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\ No newline at end of file diff --git a/db845c/firmware/NOTICE b/db845c/firmware/NOTICE deleted file mode 100644 index c880572..0000000 --- a/db845c/firmware/NOTICE +++ /dev/null @@ -1,206 +0,0 @@ -PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY. THIS AGREEMENT IS -A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE -ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU -REPRESENT) AND QUALCOMM TECHNOLOGIES, INC. ("QTI" "WE" "OUR" OR "US"). THIS IS -THE AGREEMENT THAT APPLIES TO YOUR USE OF THE DESIGNATED AND/OR LINKED -APPLICATIONS, THE ENCLOSED QUALCOMM TECHNOLOGIES' MATERIALS, INCLUDING RELATED -DOCUMENTATION AND ANY UPDATES OR IMPROVEMENTS THEREOF -(COLLECTIVELY, "MATERIALS"). BY USING OR COMPLETING THE INSTALLATION OF THE -MATERIALS, YOU ARE ACCEPTING THIS AGREEMENT AND YOU AGREE TO BE BOUND BY ITS -TERMS AND CONDITIONS. IF YOU DO NOT AGREE TO THESE TERMS, QTI IS UNWILLING TO -AND DOES NOT LICENSE THE MATERIALS TO YOU. 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a/db845c/firmware/bdwlan.b70 +++ /dev/null diff --git a/db845c/firmware/bdwlan.bin b/db845c/firmware/bdwlan.bin Binary files differdeleted file mode 100644 index 778234f..0000000 --- a/db845c/firmware/bdwlan.bin +++ /dev/null diff --git a/db845c/firmware/bdwlan.txt b/db845c/firmware/bdwlan.txt deleted file mode 100644 index 5c0df64..0000000 --- a/db845c/firmware/bdwlan.txt +++ /dev/null @@ -1,5223 +0,0 @@ -nvBaseId__0_0 1 -nvBaseLen__0_0 1028 -nvBaseFlag__0_0 0x0 -length__0_0 19152 -checksum__0_0 0xc7a2 -bdf_version__0_0 0x2 -template_version__0_0 0x1 -macAddr__0_0 0x0 0x0 0x0 0x0 0x0 0x0 -regDmn__0_0 0x0 0x0 -refDesignId__0_0 0x0 -customerId__0_0 0x0 -projectId__0_0 0x0 -boardDataRev__0_0 0x0 -rfSilent__0_0 0x0 -wlanLedGpio__0_0 0x0 -nvMacFlag__0_0 1 -calSmVersion__0_0 0x0 -concurrencyModeMask__0_0 0x0 -commonBoardFlags__0_0 0x0 -overwriteCdacIn__0_0 0x0 -overwriteCdacOut__0_0 0x0 -otpCdacIn__0_0 0x0 -otpCdacOut__0_0 0x0 -fineCorrectionCdacIn__0_0 0x0 -fineCorrectionCdacOut__0_0 0x0 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-paSet_txgainIdx_B1_G_7_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_7_6 0 -paSet_txgainIdx_B1_G_7_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_7_7 0 -dacGain_G_7_0 0 0 -thermCalVal_G_7_0 121 121 -voltCalVal_G_7_0 0 -calOlpc2GReserved 0 0 0 -paSet_txgainIdx_B0_G_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_0 0 -paSet_txgainIdx_B0_G_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_1 0 -paSet_txgainIdx_B0_G_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_2 0 -paSet_txgainIdx_B0_G_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_3 0 -paSet_txgainIdx_B0_G_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_4 0 -paSet_txgainIdx_B0_G_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_5 0 -paSet_txgainIdx_B0_G_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_6 0 -paSet_txgainIdx_B0_G_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_8_7 0 -paSet_txgainIdx_B1_G_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_0 0 -paSet_txgainIdx_B1_G_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_1 0 -paSet_txgainIdx_B1_G_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_2 0 -paSet_txgainIdx_B1_G_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_3 0 -paSet_txgainIdx_B1_G_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_4 0 -paSet_txgainIdx_B1_G_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_5 0 -paSet_txgainIdx_B1_G_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_6 0 -paSet_txgainIdx_B1_G_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_8_7 0 -dacGain_G_8_0 0 0 -thermCalVal_G_8_0 121 121 -voltCalVal_G_8_0 0 -calOlpc2GReserved 0 0 0 -paSet_txgainIdx_B0_G_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_0 0 -paSet_txgainIdx_B0_G_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_1 0 -paSet_txgainIdx_B0_G_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_2 0 -paSet_txgainIdx_B0_G_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_3 0 -paSet_txgainIdx_B0_G_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_4 0 -paSet_txgainIdx_B0_G_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_5 0 -paSet_txgainIdx_B0_G_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_6 0 -paSet_txgainIdx_B0_G_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_9_7 0 -paSet_txgainIdx_B1_G_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_0 0 -paSet_txgainIdx_B1_G_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_1 0 -paSet_txgainIdx_B1_G_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_2 0 -paSet_txgainIdx_B1_G_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_3 0 -paSet_txgainIdx_B1_G_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_4 0 -paSet_txgainIdx_B1_G_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_5 0 -paSet_txgainIdx_B1_G_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_6 0 -paSet_txgainIdx_B1_G_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_9_7 0 -dacGain_G_9_0 0 0 -thermCalVal_G_9_0 121 121 -voltCalVal_G_9_0 0 -calOlpc2GReserved 0 0 0 -paSet_txgainIdx_B0_G_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_0 0 -paSet_txgainIdx_B0_G_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_1 0 -paSet_txgainIdx_B0_G_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_2 0 -paSet_txgainIdx_B0_G_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_3 0 -paSet_txgainIdx_B0_G_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_4 0 -paSet_txgainIdx_B0_G_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_5 0 -paSet_txgainIdx_B0_G_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_6 0 -paSet_txgainIdx_B0_G_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_10_7 0 -paSet_txgainIdx_B1_G_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_0 0 -paSet_txgainIdx_B1_G_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_1 0 -paSet_txgainIdx_B1_G_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_2 0 -paSet_txgainIdx_B1_G_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_3 0 -paSet_txgainIdx_B1_G_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_4 0 -paSet_txgainIdx_B1_G_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_5 0 -paSet_txgainIdx_B1_G_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_6 0 -paSet_txgainIdx_B1_G_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_10_7 0 -dacGain_G_10_0 0 0 -thermCalVal_G_10_0 121 121 -voltCalVal_G_10_0 0 -calOlpc2GReserved 0 0 0 -paSet_txgainIdx_B0_G_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_0 0 -paSet_txgainIdx_B0_G_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_1 0 -paSet_txgainIdx_B0_G_11_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_2 0 -paSet_txgainIdx_B0_G_11_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_3 0 -paSet_txgainIdx_B0_G_11_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_4 0 -paSet_txgainIdx_B0_G_11_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_5 0 -paSet_txgainIdx_B0_G_11_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_6 0 -paSet_txgainIdx_B0_G_11_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_11_7 0 -paSet_txgainIdx_B1_G_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_11_0 0 -paSet_txgainIdx_B1_G_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_11_1 0 -paSet_txgainIdx_B1_G_11_2 pasetting:0x0 txgainIdx:0x0 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pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_12_6 0 -paSet_txgainIdx_B0_G_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_12_7 0 -paSet_txgainIdx_B1_G_12_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_0 0 -paSet_txgainIdx_B1_G_12_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_1 0 -paSet_txgainIdx_B1_G_12_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_2 0 -paSet_txgainIdx_B1_G_12_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_3 0 -paSet_txgainIdx_B1_G_12_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_4 0 -paSet_txgainIdx_B1_G_12_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_5 0 -paSet_txgainIdx_B1_G_12_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_6 0 -paSet_txgainIdx_B1_G_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_G_12_7 0 -dacGain_G_12_0 0 0 -thermCalVal_G_12_0 121 121 -voltCalVal_G_12_0 0 -calOlpc2GReserved 0 0 0 -paSet_txgainIdx_B0_G_13_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_13_0 0 -paSet_txgainIdx_B0_G_13_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_G_13_1 0 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-fullmeas_pwr_B0_G_11_2 0 -fullpdadc_read_B0_G_11_3 0 -fullmeas_pwr_B0_G_11_3 0 -fullpdadc_read_B0_G_11_4 0 -fullmeas_pwr_B0_G_11_4 0 -fullpdadc_read_B0_G_11_5 0 -fullmeas_pwr_B0_G_11_5 0 -fullpdadc_read_B0_G_11_6 0 -fullmeas_pwr_B0_G_11_6 0 -fullpdadc_read_B0_G_11_7 0 -fullmeas_pwr_B0_G_11_7 0 -fullpdadc_read_B0_G_11_8 0 -fullmeas_pwr_B0_G_11_8 0 -fullpdadc_read_B0_G_11_9 0 -fullmeas_pwr_B0_G_11_9 0 -fullpdadc_read_B1_G_11_0 0 -fullmeas_pwr_B1_G_11_0 0 -fullpdadc_read_B1_G_11_1 0 -fullmeas_pwr_B1_G_11_1 0 -fullpdadc_read_B1_G_11_2 0 -fullmeas_pwr_B1_G_11_2 0 -fullpdadc_read_B1_G_11_3 0 -fullmeas_pwr_B1_G_11_3 0 -fullpdadc_read_B1_G_11_4 0 -fullmeas_pwr_B1_G_11_4 0 -fullpdadc_read_B1_G_11_5 0 -fullmeas_pwr_B1_G_11_5 0 -fullpdadc_read_B1_G_11_6 0 -fullmeas_pwr_B1_G_11_6 0 -fullpdadc_read_B1_G_11_7 0 -fullmeas_pwr_B1_G_11_7 0 -fullpdadc_read_B1_G_11_8 0 -fullmeas_pwr_B1_G_11_8 0 -fullpdadc_read_B1_G_11_9 0 -fullmeas_pwr_B1_G_11_9 0 -fullpdadc_read_B0_G_12_0 0 -fullmeas_pwr_B0_G_12_0 0 -fullpdadc_read_B0_G_12_1 0 -fullmeas_pwr_B0_G_12_1 0 -fullpdadc_read_B0_G_12_2 0 -fullmeas_pwr_B0_G_12_2 0 -fullpdadc_read_B0_G_12_3 0 -fullmeas_pwr_B0_G_12_3 0 -fullpdadc_read_B0_G_12_4 0 -fullmeas_pwr_B0_G_12_4 0 -fullpdadc_read_B0_G_12_5 0 -fullmeas_pwr_B0_G_12_5 0 -fullpdadc_read_B0_G_12_6 0 -fullmeas_pwr_B0_G_12_6 0 -fullpdadc_read_B0_G_12_7 0 -fullmeas_pwr_B0_G_12_7 0 -fullpdadc_read_B0_G_12_8 0 -fullmeas_pwr_B0_G_12_8 0 -fullpdadc_read_B0_G_12_9 0 -fullmeas_pwr_B0_G_12_9 0 -fullpdadc_read_B1_G_12_0 0 -fullmeas_pwr_B1_G_12_0 0 -fullpdadc_read_B1_G_12_1 0 -fullmeas_pwr_B1_G_12_1 0 -fullpdadc_read_B1_G_12_2 0 -fullmeas_pwr_B1_G_12_2 0 -fullpdadc_read_B1_G_12_3 0 -fullmeas_pwr_B1_G_12_3 0 -fullpdadc_read_B1_G_12_4 0 -fullmeas_pwr_B1_G_12_4 0 -fullpdadc_read_B1_G_12_5 0 -fullmeas_pwr_B1_G_12_5 0 -fullpdadc_read_B1_G_12_6 0 -fullmeas_pwr_B1_G_12_6 0 -fullpdadc_read_B1_G_12_7 0 -fullmeas_pwr_B1_G_12_7 0 -fullpdadc_read_B1_G_12_8 0 -fullmeas_pwr_B1_G_12_8 0 -fullpdadc_read_B1_G_12_9 0 -fullmeas_pwr_B1_G_12_9 0 -fullpdadc_read_B0_G_13_0 0 -fullmeas_pwr_B0_G_13_0 0 -fullpdadc_read_B0_G_13_1 0 -fullmeas_pwr_B0_G_13_1 0 -fullpdadc_read_B0_G_13_2 0 -fullmeas_pwr_B0_G_13_2 0 -fullpdadc_read_B0_G_13_3 0 -fullmeas_pwr_B0_G_13_3 0 -fullpdadc_read_B0_G_13_4 0 -fullmeas_pwr_B0_G_13_4 0 -fullpdadc_read_B0_G_13_5 0 -fullmeas_pwr_B0_G_13_5 0 -fullpdadc_read_B0_G_13_6 0 -fullmeas_pwr_B0_G_13_6 0 -fullpdadc_read_B0_G_13_7 0 -fullmeas_pwr_B0_G_13_7 0 -fullpdadc_read_B0_G_13_8 0 -fullmeas_pwr_B0_G_13_8 0 -fullpdadc_read_B0_G_13_9 0 -fullmeas_pwr_B0_G_13_9 0 -fullpdadc_read_B1_G_13_0 0 -fullmeas_pwr_B1_G_13_0 0 -fullpdadc_read_B1_G_13_1 0 -fullmeas_pwr_B1_G_13_1 0 -fullpdadc_read_B1_G_13_2 0 -fullmeas_pwr_B1_G_13_2 0 -fullpdadc_read_B1_G_13_3 0 -fullmeas_pwr_B1_G_13_3 0 -fullpdadc_read_B1_G_13_4 0 -fullmeas_pwr_B1_G_13_4 0 -fullpdadc_read_B1_G_13_5 0 -fullmeas_pwr_B1_G_13_5 0 -fullpdadc_read_B1_G_13_6 0 -fullmeas_pwr_B1_G_13_6 0 -fullpdadc_read_B1_G_13_7 0 -fullmeas_pwr_B1_G_13_7 0 -fullpdadc_read_B1_G_13_8 0 -fullmeas_pwr_B1_G_13_8 0 -fullpdadc_read_B1_G_13_9 0 -fullmeas_pwr_B1_G_13_9 0 -calOffsetFreqPier2G_G_0_0 112 142 172 184 -calOffsetPierData2G_B0_G_0_0 0 0 0 0 -calOffsetPierData2G_B1_G_0_0 0 0 0 0 -offsetThreshold2G_G_0_0 0 -calData2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -calFreqPier5G_A_0_0 76 88 104 140 160 180 189 205 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -paSet_txgainIdx_B0_A_0_0 pasetting:0x3 txgainIdx:0xa -meas_pwr_B0_A_0_0 153 -paSet_txgainIdx_B0_A_0_1 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_0_1 132 -paSet_txgainIdx_B0_A_0_2 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_0_2 120 -paSet_txgainIdx_B0_A_0_3 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_0_3 99 -paSet_txgainIdx_B0_A_0_4 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_0_4 78 -paSet_txgainIdx_B0_A_0_5 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_0_5 63 -paSet_txgainIdx_B0_A_0_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_0_6 45 -paSet_txgainIdx_B0_A_0_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_0_7 45 -paSet_txgainIdx_B1_A_0_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_0_0 147 -paSet_txgainIdx_B1_A_0_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_0_1 137 -paSet_txgainIdx_B1_A_0_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_0_2 115 -paSet_txgainIdx_B1_A_0_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_0_3 104 -paSet_txgainIdx_B1_A_0_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_0_4 78 -paSet_txgainIdx_B1_A_0_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_5 60 -paSet_txgainIdx_B1_A_0_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_6 60 -paSet_txgainIdx_B1_A_0_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_7 60 -dacGain_A_0_0 -8 -8 -thermCalVal_A_0_0 123 123 -voltCalVal_A_0_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_1_0 pasetting:0x3 txgainIdx:0xa -meas_pwr_B0_A_1_0 150 -paSet_txgainIdx_B0_A_1_1 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_1_1 130 -paSet_txgainIdx_B0_A_1_2 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_1_2 119 -paSet_txgainIdx_B0_A_1_3 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_1_3 97 -paSet_txgainIdx_B0_A_1_4 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_1_4 75 -paSet_txgainIdx_B0_A_1_5 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_1_5 60 -paSet_txgainIdx_B0_A_1_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_1_6 42 -paSet_txgainIdx_B0_A_1_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_1_7 42 -paSet_txgainIdx_B1_A_1_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_1_0 145 -paSet_txgainIdx_B1_A_1_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_1_1 134 -paSet_txgainIdx_B1_A_1_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_1_2 112 -paSet_txgainIdx_B1_A_1_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_1_3 101 -paSet_txgainIdx_B1_A_1_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_1_4 74 -paSet_txgainIdx_B1_A_1_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_5 57 -paSet_txgainIdx_B1_A_1_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_6 57 -paSet_txgainIdx_B1_A_1_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_7 57 -dacGain_A_1_0 -8 -8 -thermCalVal_A_1_0 123 123 -voltCalVal_A_1_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_2_0 pasetting:0x3 txgainIdx:0x9 -meas_pwr_B0_A_2_0 144 -paSet_txgainIdx_B0_A_2_1 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_2_1 135 -paSet_txgainIdx_B0_A_2_2 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_2_2 124 -paSet_txgainIdx_B0_A_2_3 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_2_3 103 -paSet_txgainIdx_B0_A_2_4 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_2_4 81 -paSet_txgainIdx_B0_A_2_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_5 48 -paSet_txgainIdx_B0_A_2_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_6 48 -paSet_txgainIdx_B0_A_2_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_7 48 -paSet_txgainIdx_B1_A_2_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_2_0 149 -paSet_txgainIdx_B1_A_2_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_2_1 138 -paSet_txgainIdx_B1_A_2_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_2_2 116 -paSet_txgainIdx_B1_A_2_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_2_3 105 -paSet_txgainIdx_B1_A_2_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_2_4 79 -paSet_txgainIdx_B1_A_2_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_5 61 -paSet_txgainIdx_B1_A_2_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_6 61 -paSet_txgainIdx_B1_A_2_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_7 61 -dacGain_A_2_0 -8 -8 -thermCalVal_A_2_0 123 123 -voltCalVal_A_2_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_3_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_3_0 145 -paSet_txgainIdx_B0_A_3_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_3_1 134 -paSet_txgainIdx_B0_A_3_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_3_2 114 -paSet_txgainIdx_B0_A_3_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_3_3 104 -paSet_txgainIdx_B0_A_3_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_3_4 78 -paSet_txgainIdx_B0_A_3_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_5 60 -paSet_txgainIdx_B0_A_3_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_6 60 -paSet_txgainIdx_B0_A_3_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_7 60 -paSet_txgainIdx_B1_A_3_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_3_0 153 -paSet_txgainIdx_B1_A_3_1 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_3_1 129 -paSet_txgainIdx_B1_A_3_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_3_2 121 -paSet_txgainIdx_B1_A_3_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_3_3 100 -paSet_txgainIdx_B1_A_3_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_3_4 84 -paSet_txgainIdx_B1_A_3_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_5 66 -paSet_txgainIdx_B1_A_3_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_6 66 -paSet_txgainIdx_B1_A_3_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_7 66 -dacGain_A_3_0 -8 -8 -thermCalVal_A_3_0 123 123 -voltCalVal_A_3_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_4_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_4_0 149 -paSet_txgainIdx_B0_A_4_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_4_1 139 -paSet_txgainIdx_B0_A_4_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_4_2 118 -paSet_txgainIdx_B0_A_4_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_4_3 98 -paSet_txgainIdx_B0_A_4_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_4_4 83 -paSet_txgainIdx_B0_A_4_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_5 65 -paSet_txgainIdx_B0_A_4_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_6 65 -paSet_txgainIdx_B0_A_4_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_7 65 -paSet_txgainIdx_B1_A_4_0 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_4_0 150 -paSet_txgainIdx_B1_A_4_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_4_1 129 -paSet_txgainIdx_B1_A_4_2 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_4_2 120 -paSet_txgainIdx_B1_A_4_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_4_3 108 -paSet_txgainIdx_B1_A_4_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_4 76 -paSet_txgainIdx_B1_A_4_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_5 76 -paSet_txgainIdx_B1_A_4_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_6 76 -paSet_txgainIdx_B1_A_4_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_7 76 -dacGain_A_4_0 -8 -8 -thermCalVal_A_4_0 123 123 -voltCalVal_A_4_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_5_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_5_0 148 -paSet_txgainIdx_B0_A_5_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_5_1 138 -paSet_txgainIdx_B0_A_5_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_5_2 117 -paSet_txgainIdx_B0_A_5_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_5_3 107 -paSet_txgainIdx_B0_A_5_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_5_4 81 -paSet_txgainIdx_B0_A_5_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_5 62 -paSet_txgainIdx_B0_A_5_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_6 62 -paSet_txgainIdx_B0_A_5_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_7 62 -paSet_txgainIdx_B1_A_5_0 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_5_0 154 -paSet_txgainIdx_B1_A_5_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_5_1 132 -paSet_txgainIdx_B1_A_5_2 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_5_2 122 -paSet_txgainIdx_B1_A_5_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_5_3 96 -paSet_txgainIdx_B1_A_5_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_4 78 -paSet_txgainIdx_B1_A_5_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_5 78 -paSet_txgainIdx_B1_A_5_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_6 78 -paSet_txgainIdx_B1_A_5_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_7 78 -dacGain_A_5_0 -8 -8 -thermCalVal_A_5_0 123 123 -voltCalVal_A_5_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_6_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_6_0 148 -paSet_txgainIdx_B0_A_6_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_6_1 138 -paSet_txgainIdx_B0_A_6_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_6_2 116 -paSet_txgainIdx_B0_A_6_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_6_3 106 -paSet_txgainIdx_B0_A_6_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_6_4 80 -paSet_txgainIdx_B0_A_6_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_5 62 -paSet_txgainIdx_B0_A_6_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_6 62 -paSet_txgainIdx_B0_A_6_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_7 62 -paSet_txgainIdx_B1_A_6_0 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_6_0 145 -paSet_txgainIdx_B1_A_6_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_6_1 137 -paSet_txgainIdx_B1_A_6_2 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_6_2 116 -paSet_txgainIdx_B1_A_6_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_6_3 100 -paSet_txgainIdx_B1_A_6_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_4 82 -paSet_txgainIdx_B1_A_6_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_5 82 -paSet_txgainIdx_B1_A_6_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_6 82 -paSet_txgainIdx_B1_A_6_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_7 82 -dacGain_A_6_0 -8 -8 -thermCalVal_A_6_0 123 123 -voltCalVal_A_6_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_7_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_7_0 150 -paSet_txgainIdx_B0_A_7_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_7_1 139 -paSet_txgainIdx_B0_A_7_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_7_2 118 -paSet_txgainIdx_B0_A_7_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_7_3 96 -paSet_txgainIdx_B0_A_7_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_7_4 81 -paSet_txgainIdx_B0_A_7_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_5 63 -paSet_txgainIdx_B0_A_7_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_6 63 -paSet_txgainIdx_B0_A_7_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_7 63 -paSet_txgainIdx_B1_A_7_0 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_7_0 148 -paSet_txgainIdx_B1_A_7_1 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_7_1 131 -paSet_txgainIdx_B1_A_7_2 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_7_2 119 -paSet_txgainIdx_B1_A_7_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_7_3 104 -paSet_txgainIdx_B1_A_7_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_4 86 -paSet_txgainIdx_B1_A_7_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_5 86 -paSet_txgainIdx_B1_A_7_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_6 86 -paSet_txgainIdx_B1_A_7_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_7 86 -dacGain_A_7_0 -8 -8 -thermCalVal_A_7_0 123 123 -voltCalVal_A_7_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_0 0 -paSet_txgainIdx_B0_A_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_1 0 -paSet_txgainIdx_B0_A_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_2 0 -paSet_txgainIdx_B0_A_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_3 0 -paSet_txgainIdx_B0_A_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_4 0 -paSet_txgainIdx_B0_A_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_5 0 -paSet_txgainIdx_B0_A_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_6 0 -paSet_txgainIdx_B0_A_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_7 0 -paSet_txgainIdx_B1_A_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_0 0 -paSet_txgainIdx_B1_A_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_1 0 -paSet_txgainIdx_B1_A_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_2 0 -paSet_txgainIdx_B1_A_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_3 0 -paSet_txgainIdx_B1_A_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_4 0 -paSet_txgainIdx_B1_A_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_5 0 -paSet_txgainIdx_B1_A_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_6 0 -paSet_txgainIdx_B1_A_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_7 0 -dacGain_A_8_0 0 0 -thermCalVal_A_8_0 121 121 -voltCalVal_A_8_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_0 0 -paSet_txgainIdx_B0_A_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_1 0 -paSet_txgainIdx_B0_A_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_2 0 -paSet_txgainIdx_B0_A_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_3 0 -paSet_txgainIdx_B0_A_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_4 0 -paSet_txgainIdx_B0_A_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_5 0 -paSet_txgainIdx_B0_A_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_6 0 -paSet_txgainIdx_B0_A_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_7 0 -paSet_txgainIdx_B1_A_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_0 0 -paSet_txgainIdx_B1_A_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_1 0 -paSet_txgainIdx_B1_A_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_2 0 -paSet_txgainIdx_B1_A_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_3 0 -paSet_txgainIdx_B1_A_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_4 0 -paSet_txgainIdx_B1_A_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_5 0 -paSet_txgainIdx_B1_A_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_6 0 -paSet_txgainIdx_B1_A_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_7 0 -dacGain_A_9_0 0 0 -thermCalVal_A_9_0 121 121 -voltCalVal_A_9_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_0 0 -paSet_txgainIdx_B0_A_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_1 0 -paSet_txgainIdx_B0_A_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_2 0 -paSet_txgainIdx_B0_A_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_3 0 -paSet_txgainIdx_B0_A_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_4 0 -paSet_txgainIdx_B0_A_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_5 0 -paSet_txgainIdx_B0_A_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_6 0 -paSet_txgainIdx_B0_A_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_7 0 -paSet_txgainIdx_B1_A_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_0 0 -paSet_txgainIdx_B1_A_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_1 0 -paSet_txgainIdx_B1_A_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_2 0 -paSet_txgainIdx_B1_A_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_3 0 -paSet_txgainIdx_B1_A_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_4 0 -paSet_txgainIdx_B1_A_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_5 0 -paSet_txgainIdx_B1_A_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_6 0 -paSet_txgainIdx_B1_A_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_7 0 -dacGain_A_10_0 0 0 -thermCalVal_A_10_0 121 121 -voltCalVal_A_10_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_0 0 -paSet_txgainIdx_B0_A_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_1 0 -paSet_txgainIdx_B0_A_11_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_2 0 -paSet_txgainIdx_B0_A_11_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_3 0 -paSet_txgainIdx_B0_A_11_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_4 0 -paSet_txgainIdx_B0_A_11_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_5 0 -paSet_txgainIdx_B0_A_11_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_6 0 -paSet_txgainIdx_B0_A_11_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_7 0 -paSet_txgainIdx_B1_A_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_0 0 -paSet_txgainIdx_B1_A_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_1 0 -paSet_txgainIdx_B1_A_11_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_2 0 -paSet_txgainIdx_B1_A_11_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_3 0 -paSet_txgainIdx_B1_A_11_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_4 0 -paSet_txgainIdx_B1_A_11_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_5 0 -paSet_txgainIdx_B1_A_11_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_6 0 -paSet_txgainIdx_B1_A_11_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_7 0 -dacGain_A_11_0 0 0 -thermCalVal_A_11_0 121 121 -voltCalVal_A_11_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_12_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_0 0 -paSet_txgainIdx_B0_A_12_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_1 0 -paSet_txgainIdx_B0_A_12_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_2 0 -paSet_txgainIdx_B0_A_12_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_3 0 -paSet_txgainIdx_B0_A_12_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_4 0 -paSet_txgainIdx_B0_A_12_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_5 0 -paSet_txgainIdx_B0_A_12_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_6 0 -paSet_txgainIdx_B0_A_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_7 0 -paSet_txgainIdx_B1_A_12_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_0 0 -paSet_txgainIdx_B1_A_12_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_1 0 -paSet_txgainIdx_B1_A_12_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_2 0 -paSet_txgainIdx_B1_A_12_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_3 0 -paSet_txgainIdx_B1_A_12_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_4 0 -paSet_txgainIdx_B1_A_12_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_5 0 -paSet_txgainIdx_B1_A_12_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_6 0 -paSet_txgainIdx_B1_A_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_7 0 -dacGain_A_12_0 0 0 -thermCalVal_A_12_0 121 121 -voltCalVal_A_12_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_13_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_0 0 -paSet_txgainIdx_B0_A_13_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_1 0 -paSet_txgainIdx_B0_A_13_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_2 0 -paSet_txgainIdx_B0_A_13_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_3 0 -paSet_txgainIdx_B0_A_13_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_4 0 -paSet_txgainIdx_B0_A_13_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_5 0 -paSet_txgainIdx_B0_A_13_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_6 0 -paSet_txgainIdx_B0_A_13_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_7 0 -paSet_txgainIdx_B1_A_13_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_0 0 -paSet_txgainIdx_B1_A_13_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_1 0 -paSet_txgainIdx_B1_A_13_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_2 0 -paSet_txgainIdx_B1_A_13_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_3 0 -paSet_txgainIdx_B1_A_13_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_4 0 -paSet_txgainIdx_B1_A_13_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_5 0 -paSet_txgainIdx_B1_A_13_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_6 0 -paSet_txgainIdx_B1_A_13_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_7 0 -dacGain_A_13_0 0 0 -thermCalVal_A_13_0 121 121 -voltCalVal_A_13_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_14_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_0 0 -paSet_txgainIdx_B0_A_14_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_1 0 -paSet_txgainIdx_B0_A_14_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_2 0 -paSet_txgainIdx_B0_A_14_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_3 0 -paSet_txgainIdx_B0_A_14_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_4 0 -paSet_txgainIdx_B0_A_14_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_5 0 -paSet_txgainIdx_B0_A_14_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_6 0 -paSet_txgainIdx_B0_A_14_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_7 0 -paSet_txgainIdx_B1_A_14_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_0 0 -paSet_txgainIdx_B1_A_14_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_1 0 -paSet_txgainIdx_B1_A_14_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_2 0 -paSet_txgainIdx_B1_A_14_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_3 0 -paSet_txgainIdx_B1_A_14_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_4 0 -paSet_txgainIdx_B1_A_14_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_5 0 -paSet_txgainIdx_B1_A_14_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_6 0 -paSet_txgainIdx_B1_A_14_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_14_7 0 -dacGain_A_14_0 0 0 -thermCalVal_A_14_0 121 121 -voltCalVal_A_14_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_15_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_0 0 -paSet_txgainIdx_B0_A_15_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_1 0 -paSet_txgainIdx_B0_A_15_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_2 0 -paSet_txgainIdx_B0_A_15_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_3 0 -paSet_txgainIdx_B0_A_15_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_4 0 -paSet_txgainIdx_B0_A_15_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_5 0 -paSet_txgainIdx_B0_A_15_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_15_6 0 -paSet_txgainIdx_B0_A_15_7 pasetting:0x0 txgainIdx:0x0 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-paSet_txgainIdx_B1_A_20_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_20_4 0 -paSet_txgainIdx_B1_A_20_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_20_5 0 -paSet_txgainIdx_B1_A_20_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_20_6 0 -paSet_txgainIdx_B1_A_20_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_20_7 0 -dacGain_A_20_0 0 0 -thermCalVal_A_20_0 121 121 -voltCalVal_A_20_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_21_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_0 0 -paSet_txgainIdx_B0_A_21_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_1 0 -paSet_txgainIdx_B0_A_21_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_2 0 -paSet_txgainIdx_B0_A_21_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_3 0 -paSet_txgainIdx_B0_A_21_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_4 0 -paSet_txgainIdx_B0_A_21_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_5 0 -paSet_txgainIdx_B0_A_21_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_6 0 -paSet_txgainIdx_B0_A_21_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_21_7 0 -paSet_txgainIdx_B1_A_21_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_0 0 -paSet_txgainIdx_B1_A_21_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_1 0 -paSet_txgainIdx_B1_A_21_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_2 0 -paSet_txgainIdx_B1_A_21_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_3 0 -paSet_txgainIdx_B1_A_21_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_4 0 -paSet_txgainIdx_B1_A_21_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_5 0 -paSet_txgainIdx_B1_A_21_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_6 0 -paSet_txgainIdx_B1_A_21_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_21_7 0 -dacGain_A_21_0 0 0 -thermCalVal_A_21_0 121 121 -voltCalVal_A_21_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_22_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_22_0 0 -paSet_txgainIdx_B0_A_22_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_22_1 0 -paSet_txgainIdx_B0_A_22_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_22_2 0 -paSet_txgainIdx_B0_A_22_3 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-thermCalVal_A_22_0 121 121 -voltCalVal_A_22_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_23_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_0 0 -paSet_txgainIdx_B0_A_23_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_1 0 -paSet_txgainIdx_B0_A_23_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_2 0 -paSet_txgainIdx_B0_A_23_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_3 0 -paSet_txgainIdx_B0_A_23_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_4 0 -paSet_txgainIdx_B0_A_23_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_5 0 -paSet_txgainIdx_B0_A_23_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_6 0 -paSet_txgainIdx_B0_A_23_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_7 0 -paSet_txgainIdx_B1_A_23_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_0 0 -paSet_txgainIdx_B1_A_23_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_1 0 -paSet_txgainIdx_B1_A_23_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_2 0 -paSet_txgainIdx_B1_A_23_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_3 0 -paSet_txgainIdx_B1_A_23_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_4 0 -paSet_txgainIdx_B1_A_23_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_5 0 -paSet_txgainIdx_B1_A_23_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_6 0 -paSet_txgainIdx_B1_A_23_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_23_7 0 -dacGain_A_23_0 0 0 -thermCalVal_A_23_0 121 121 -voltCalVal_A_23_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_24_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_0 0 -paSet_txgainIdx_B0_A_24_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_1 0 -paSet_txgainIdx_B0_A_24_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_2 0 -paSet_txgainIdx_B0_A_24_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_3 0 -paSet_txgainIdx_B0_A_24_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_4 0 -paSet_txgainIdx_B0_A_24_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_5 0 -paSet_txgainIdx_B0_A_24_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_6 0 -paSet_txgainIdx_B0_A_24_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_24_7 0 -paSet_txgainIdx_B1_A_24_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_0 0 -paSet_txgainIdx_B1_A_24_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_1 0 -paSet_txgainIdx_B1_A_24_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_2 0 -paSet_txgainIdx_B1_A_24_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_3 0 -paSet_txgainIdx_B1_A_24_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_4 0 -paSet_txgainIdx_B1_A_24_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_5 0 -paSet_txgainIdx_B1_A_24_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_6 0 -paSet_txgainIdx_B1_A_24_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_24_7 0 -dacGain_A_24_0 0 0 -thermCalVal_A_24_0 121 121 -voltCalVal_A_24_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_25_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_0 0 -paSet_txgainIdx_B0_A_25_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_1 0 -paSet_txgainIdx_B0_A_25_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_2 0 -paSet_txgainIdx_B0_A_25_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_3 0 -paSet_txgainIdx_B0_A_25_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_4 0 -paSet_txgainIdx_B0_A_25_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_5 0 -paSet_txgainIdx_B0_A_25_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_6 0 -paSet_txgainIdx_B0_A_25_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_7 0 -paSet_txgainIdx_B1_A_25_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_0 0 -paSet_txgainIdx_B1_A_25_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_1 0 -paSet_txgainIdx_B1_A_25_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_2 0 -paSet_txgainIdx_B1_A_25_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_3 0 -paSet_txgainIdx_B1_A_25_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_4 0 -paSet_txgainIdx_B1_A_25_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_5 0 -paSet_txgainIdx_B1_A_25_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_6 0 -paSet_txgainIdx_B1_A_25_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_7 0 -dacGain_A_25_0 0 0 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-paSet_txgainIdx_B1_A_26_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_26_4 0 -paSet_txgainIdx_B1_A_26_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_26_5 0 -paSet_txgainIdx_B1_A_26_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_26_6 0 -paSet_txgainIdx_B1_A_26_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_26_7 0 -dacGain_A_26_0 0 0 -thermCalVal_A_26_0 121 121 -voltCalVal_A_26_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_27_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_0 0 -paSet_txgainIdx_B0_A_27_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_1 0 -paSet_txgainIdx_B0_A_27_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_2 0 -paSet_txgainIdx_B0_A_27_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_3 0 -paSet_txgainIdx_B0_A_27_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_4 0 -paSet_txgainIdx_B0_A_27_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_5 0 -paSet_txgainIdx_B0_A_27_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_6 0 -paSet_txgainIdx_B0_A_27_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_27_7 0 -paSet_txgainIdx_B1_A_27_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_0 0 -paSet_txgainIdx_B1_A_27_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_1 0 -paSet_txgainIdx_B1_A_27_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_2 0 -paSet_txgainIdx_B1_A_27_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_3 0 -paSet_txgainIdx_B1_A_27_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_4 0 -paSet_txgainIdx_B1_A_27_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_5 0 -paSet_txgainIdx_B1_A_27_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_6 0 -paSet_txgainIdx_B1_A_27_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_27_7 0 -dacGain_A_27_0 0 0 -thermCalVal_A_27_0 121 121 -voltCalVal_A_27_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_28_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_0 0 -paSet_txgainIdx_B0_A_28_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_1 0 -paSet_txgainIdx_B0_A_28_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_2 0 -paSet_txgainIdx_B0_A_28_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_3 0 -paSet_txgainIdx_B0_A_28_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_4 0 -paSet_txgainIdx_B0_A_28_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_5 0 -paSet_txgainIdx_B0_A_28_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_6 0 -paSet_txgainIdx_B0_A_28_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_7 0 -paSet_txgainIdx_B1_A_28_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_0 0 -paSet_txgainIdx_B1_A_28_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_1 0 -paSet_txgainIdx_B1_A_28_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_2 0 -paSet_txgainIdx_B1_A_28_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_3 0 -paSet_txgainIdx_B1_A_28_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_4 0 -paSet_txgainIdx_B1_A_28_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_5 0 -paSet_txgainIdx_B1_A_28_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_6 0 -paSet_txgainIdx_B1_A_28_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_7 0 -dacGain_A_28_0 0 0 -thermCalVal_A_28_0 121 121 -voltCalVal_A_28_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_29_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_0 0 -paSet_txgainIdx_B0_A_29_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_1 0 -paSet_txgainIdx_B0_A_29_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_2 0 -paSet_txgainIdx_B0_A_29_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_3 0 -paSet_txgainIdx_B0_A_29_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_4 0 -paSet_txgainIdx_B0_A_29_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_5 0 -paSet_txgainIdx_B0_A_29_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_6 0 -paSet_txgainIdx_B0_A_29_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_7 0 -paSet_txgainIdx_B1_A_29_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_0 0 -paSet_txgainIdx_B1_A_29_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_1 0 -paSet_txgainIdx_B1_A_29_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_2 0 -paSet_txgainIdx_B1_A_29_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_3 0 -paSet_txgainIdx_B1_A_29_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_4 0 -paSet_txgainIdx_B1_A_29_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_5 0 -paSet_txgainIdx_B1_A_29_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_6 0 -paSet_txgainIdx_B1_A_29_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_29_7 0 -dacGain_A_29_0 0 0 -thermCalVal_A_29_0 121 121 -voltCalVal_A_29_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_30_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_0 0 -paSet_txgainIdx_B0_A_30_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_1 0 -paSet_txgainIdx_B0_A_30_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_2 0 -paSet_txgainIdx_B0_A_30_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_3 0 -paSet_txgainIdx_B0_A_30_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_4 0 -paSet_txgainIdx_B0_A_30_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_5 0 -paSet_txgainIdx_B0_A_30_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_6 0 -paSet_txgainIdx_B0_A_30_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_30_7 0 -paSet_txgainIdx_B1_A_30_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_0 0 -paSet_txgainIdx_B1_A_30_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_1 0 -paSet_txgainIdx_B1_A_30_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_2 0 -paSet_txgainIdx_B1_A_30_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_3 0 -paSet_txgainIdx_B1_A_30_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_4 0 -paSet_txgainIdx_B1_A_30_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_5 0 -paSet_txgainIdx_B1_A_30_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_6 0 -paSet_txgainIdx_B1_A_30_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_30_7 0 -dacGain_A_30_0 0 0 -thermCalVal_A_30_0 121 121 -voltCalVal_A_30_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_31_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_31_0 0 -paSet_txgainIdx_B0_A_31_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_31_1 0 -paSet_txgainIdx_B0_A_31_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_31_2 0 -paSet_txgainIdx_B0_A_31_3 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20 20 20 20 20 20 20 -targetPowerR2PTable_VHT160_1_14_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_1_14_0_0 32 32 32 32 32 -targetPowerTempThresh_G_0_0 0 0 -targetPowerTempOffset_G_0_0 0 0 -targetPowerEnablePerChainLimit_G_0_0 0x0 -targetPowerPerChainLimit_G_0_0 0 0 -targetPower2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -targetPowerR2PTable_11bg_36_64_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_36_64_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_36_64_0_0 34 34 34 34 34 -targetPowerR2PTable_11bg_100_144_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_100_144_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_100_144_0_0 34 34 34 34 34 -targetPowerR2PTable_11bg_149_183_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_149_183_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_149_183_0_0 34 34 34 34 34 -targetPowerTempThresh_A_0_0 0 0 -targetPowerTempOffset_A_0_0 0 0 -targetPowerEnablePerChainLimit_A_0_0 0x0 -targetPowerPerChainLimit_A_0_0 0 0 -clpcACKPowerOffsetCckG__0_0 0 -clpcACKPowerOffsetOfdmG__0_0 0 -clpcACKPowerOffsetOfdmA__0_0 0 -futureSelfGenA__0_0 0 0 0 0 0 -targetPower5GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -nvCtlId__0_0 12 -nvCtlLen__0_0 3432 -nvCtlFlag__0_0 0x0 -ctlIndex2G_11b_mode_0_G_0_0 1 -ctlIndex2G_11b_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_11b_numChMask_0_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_0_G_0_0 0x1 -ctlIndex2G_11b_mode_1_G_0_0 1 -ctlIndex2G_11b_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_11b_numChMask_1_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_1_G_0_0 0x1 -ctlIndex2G_11b_mode_2_G_0_0 1 -ctlIndex2G_11b_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_11b_numChMask_2_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_2_G_0_0 0x1 -ctlIndex2G_11b_mode_3_G_0_0 1 -ctlIndex2G_11b_bf_reg_3_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_11b_numChMask_3_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_3_G_0_0 0x1 -ctlIndex2G_11b_mode_4_G_0_0 1 -ctlIndex2G_11b_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_11b_numChMask_4_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_4_G_0_0 0x1 -ctlIndex2G_11b_mode_5_G_0_0 1 -ctlIndex2G_11b_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_11b_numChMask_5_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_5_G_0_0 0x1 -ctlFreqbin2G_11b_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 -ctl2G11bReserved_G_0_0 0 0 -ctlData2G_11b_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlIndex2G_HT20_mode_0_G_0_0 2 -ctlIndex2G_HT20_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_0_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_0_G_0_0 0x1 -ctlIndex2G_HT20_mode_1_G_0_0 2 -ctlIndex2G_HT20_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_1_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_1_G_0_0 0x2 -ctlIndex2G_HT20_mode_2_G_0_0 2 -ctlIndex2G_HT20_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_2_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_2_G_0_0 0x1 -ctlIndex2G_HT20_mode_3_G_0_0 2 -ctlIndex2G_HT20_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_3_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_3_G_0_0 0x1 -ctlIndex2G_HT20_mode_4_G_0_0 0 -ctlIndex2G_HT20_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_4_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_4_G_0_0 0x1 -ctlIndex2G_HT20_mode_5_G_0_0 0 -ctlIndex2G_HT20_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_5_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_5_G_0_0 0x1 -ctlIndex2G_HT20_mode_6_G_0_0 0 -ctlIndex2G_HT20_bf_reg_6_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_6_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_6_G_0_0 0x1 -ctlIndex2G_HT20_mode_7_G_0_0 2 -ctlIndex2G_HT20_bf_reg_7_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_7_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_7_G_0_0 0x1 -ctlIndex2G_HT20_mode_8_G_0_0 2 -ctlIndex2G_HT20_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_8_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_8_G_0_0 0x2 -ctlIndex2G_HT20_mode_9_G_0_0 2 -ctlIndex2G_HT20_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_9_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_9_G_0_0 0x1 -ctlIndex2G_HT20_mode_10_G_0_0 2 -ctlIndex2G_HT20_bf_reg_10_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_10_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_10_G_0_0 0x1 -ctlIndex2G_HT20_mode_11_G_0_0 0 -ctlIndex2G_HT20_bf_reg_11_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_11_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_11_G_0_0 0x1 -ctlIndex2G_HT20_mode_12_G_0_0 0 -ctlIndex2G_HT20_bf_reg_12_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_12_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_12_G_0_0 0x1 -ctlIndex2G_HT20_mode_13_G_0_0 0 -ctlIndex2G_HT20_bf_reg_13_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_13_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_13_G_0_0 0x1 -ctlIndex2G_HT20_mode_14_G_0_0 2 -ctlIndex2G_HT20_bf_reg_14_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_14_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_14_G_0_0 0x1 -ctlIndex2G_HT20_mode_15_G_0_0 2 -ctlIndex2G_HT20_bf_reg_15_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_15_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_15_G_0_0 0x2 -ctlIndex2G_HT20_mode_16_G_0_0 2 -ctlIndex2G_HT20_bf_reg_16_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_16_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_16_G_0_0 0x1 -ctlIndex2G_HT20_mode_17_G_0_0 2 -ctlIndex2G_HT20_bf_reg_17_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_17_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_17_G_0_0 0x1 -ctlIndex2G_HT20_mode_18_G_0_0 0 -ctlIndex2G_HT20_bf_reg_18_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_18_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_18_G_0_0 0x1 -ctlIndex2G_HT20_mode_19_G_0_0 0 -ctlIndex2G_HT20_bf_reg_19_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_19_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_19_G_0_0 0x1 -ctlIndex2G_HT20_mode_20_G_0_0 0 -ctlIndex2G_HT20_bf_reg_20_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_20_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_20_G_0_0 0x1 -ctlFreqbin2G_HT20_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 -ctlData2G_HT20_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_12_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_13_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_14_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_15_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_16_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_17_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_18_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_19_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_20_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlPad2 0 0 -ctlIndex2G_HT40_mode_0_G_0_0 3 -ctlIndex2G_HT40_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_0_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_0_G_0_0 0x1 -ctlIndex2G_HT40_mode_1_G_0_0 3 -ctlIndex2G_HT40_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_1_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_1_G_0_0 0x2 -ctlIndex2G_HT40_mode_2_G_0_0 3 -ctlIndex2G_HT40_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_2_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_2_G_0_0 0x1 -ctlIndex2G_HT40_mode_3_G_0_0 3 -ctlIndex2G_HT40_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_3_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_3_G_0_0 0x1 -ctlIndex2G_HT40_mode_4_G_0_0 3 -ctlIndex2G_HT40_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_4_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_4_G_0_0 0x1 -ctlIndex2G_HT40_mode_5_G_0_0 3 -ctlIndex2G_HT40_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_5_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_5_G_0_0 0x2 -ctlIndex2G_HT40_mode_6_G_0_0 3 -ctlIndex2G_HT40_bf_reg_6_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_6_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_6_G_0_0 0x1 -ctlIndex2G_HT40_mode_7_G_0_0 3 -ctlIndex2G_HT40_bf_reg_7_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_7_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_7_G_0_0 0x1 -ctlIndex2G_HT40_mode_8_G_0_0 3 -ctlIndex2G_HT40_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_8_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_8_G_0_0 0x1 -ctlIndex2G_HT40_mode_9_G_0_0 3 -ctlIndex2G_HT40_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_9_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_9_G_0_0 0x2 -ctlIndex2G_HT40_mode_10_G_0_0 3 -ctlIndex2G_HT40_bf_reg_10_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_10_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_10_G_0_0 0x1 -ctlIndex2G_HT40_mode_11_G_0_0 3 -ctlIndex2G_HT40_bf_reg_11_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_11_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_11_G_0_0 0x1 -ctlFreqbin2G_HT40_G_0_0 122 127 132 137 142 147 152 157 162 -ctl2GHT40Reserved_G_0_0 0 0 0 -ctlData2G_HT40_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlSpare2G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -ctlIndex5G_11a_mode_0_A_0_0 0 -ctlIndex5G_11a_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_0_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_0_A_0_0 0x1 -ctlIndex5G_11a_mode_1_A_0_0 0 -ctlIndex5G_11a_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_1_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_1_A_0_0 0x1 -ctlIndex5G_11a_mode_2_A_0_0 0 -ctlIndex5G_11a_bf_reg_2_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_2_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_2_A_0_0 0x1 -ctlIndex5G_11a_mode_3_A_0_0 0 -ctlIndex5G_11a_bf_reg_3_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_3_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_3_A_0_0 0x1 -ctlIndex5G_11a_mode_4_A_0_0 0 -ctlIndex5G_11a_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_4_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_4_A_0_0 0x1 -ctlIndex5G_11a_mode_5_A_0_0 0 -ctlIndex5G_11a_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_5_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_5_A_0_0 0x1 -ctlIndex5G_11a_mode_6_A_0_0 0 -ctlIndex5G_11a_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_6_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_6_A_0_0 0x1 -ctlIndex5G_11a_mode_7_A_0_0 0 -ctlIndex5G_11a_bf_reg_7_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_7_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_7_A_0_0 0x1 -ctlIndex5G_11a_mode_8_A_0_0 0 -ctlIndex5G_11a_bf_reg_8_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_8_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_8_A_0_0 0x1 -ctlFreqbin5G_11a_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 -ctl5G11aReserved_A_0_0 0 -ctlData5G_11a_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlPad4 0 0 0 -ctlIndex5G_HT20_mode_0_A_0_0 2 -ctlIndex5G_HT20_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_0_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_0_A_0_0 0x1 -ctlIndex5G_HT20_mode_1_A_0_0 2 -ctlIndex5G_HT20_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_1_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_1_A_0_0 0x2 -ctlIndex5G_HT20_mode_2_A_0_0 2 -ctlIndex5G_HT20_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_2_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_2_A_0_0 0x1 -ctlIndex5G_HT20_mode_3_A_0_0 2 -ctlIndex5G_HT20_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_3_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_3_A_0_0 0x1 -ctlIndex5G_HT20_mode_4_A_0_0 2 -ctlIndex5G_HT20_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_4_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_4_A_0_0 0x1 -ctlIndex5G_HT20_mode_5_A_0_0 2 -ctlIndex5G_HT20_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_5_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_5_A_0_0 0x2 -ctlIndex5G_HT20_mode_6_A_0_0 2 -ctlIndex5G_HT20_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_6_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_6_A_0_0 0x1 -ctlIndex5G_HT20_mode_7_A_0_0 2 -ctlIndex5G_HT20_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_7_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_7_A_0_0 0x1 -ctlIndex5G_HT20_mode_8_A_0_0 2 -ctlIndex5G_HT20_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_8_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_8_A_0_0 0x1 -ctlIndex5G_HT20_mode_9_A_0_0 2 -ctlIndex5G_HT20_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_9_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_9_A_0_0 0x2 -ctlIndex5G_HT20_mode_10_A_0_0 2 -ctlIndex5G_HT20_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_10_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_10_A_0_0 0x1 -ctlIndex5G_HT20_mode_11_A_0_0 2 -ctlIndex5G_HT20_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_11_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_HT20_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 -ctl5GHT20Reserved_A_0_0 0 0 0 -ctlData5G_HT20_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlIndex5G_HT40_mode_0_A_0_0 3 -ctlIndex5G_HT40_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_0_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_0_A_0_0 0x1 -ctlIndex5G_HT40_mode_1_A_0_0 3 -ctlIndex5G_HT40_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_1_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_1_A_0_0 0x2 -ctlIndex5G_HT40_mode_2_A_0_0 3 -ctlIndex5G_HT40_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_2_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_2_A_0_0 0x1 -ctlIndex5G_HT40_mode_3_A_0_0 3 -ctlIndex5G_HT40_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_3_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_3_A_0_0 0x1 -ctlIndex5G_HT40_mode_4_A_0_0 3 -ctlIndex5G_HT40_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_4_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_4_A_0_0 0x1 -ctlIndex5G_HT40_mode_5_A_0_0 3 -ctlIndex5G_HT40_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_5_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_5_A_0_0 0x2 -ctlIndex5G_HT40_mode_6_A_0_0 3 -ctlIndex5G_HT40_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_6_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_6_A_0_0 0x1 -ctlIndex5G_HT40_mode_7_A_0_0 3 -ctlIndex5G_HT40_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_7_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_7_A_0_0 0x1 -ctlIndex5G_HT40_mode_8_A_0_0 3 -ctlIndex5G_HT40_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_8_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_8_A_0_0 0x1 -ctlIndex5G_HT40_mode_9_A_0_0 3 -ctlIndex5G_HT40_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_9_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_9_A_0_0 0x2 -ctlIndex5G_HT40_mode_10_A_0_0 3 -ctlIndex5G_HT40_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_10_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_10_A_0_0 0x1 -ctlIndex5G_HT40_mode_11_A_0_0 3 -ctlIndex5G_HT40_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_11_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_HT40_A_0_0 78 82 86 90 94 98 102 142 146 150 154 158 162 166 170 174 178 182 191 195 199 203 -ctl5GHT40Reserved_A_0_0 0 0 -ctlData5G_HT40_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80_mode_0_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_0_A_0_0 0x1 -ctlIndex5G_VHT80_mode_1_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80_mode_2_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_2_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_2_A_0_0 0x1 -ctlIndex5G_VHT80_mode_3_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_3_A_0_0 0x1 -ctlIndex5G_VHT80_mode_4_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_4_A_0_0 0x1 -ctlIndex5G_VHT80_mode_5_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_5_A_0_0 0x2 -ctlIndex5G_VHT80_mode_6_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_6_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_6_A_0_0 0x1 -ctlIndex5G_VHT80_mode_7_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_7_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_7_A_0_0 0x1 -ctlIndex5G_VHT80_mode_8_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_8_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_8_A_0_0 0x1 -ctlIndex5G_VHT80_mode_9_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_9_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_9_A_0_0 0x2 -ctlIndex5G_VHT80_mode_10_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_10_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_10_A_0_0 0x1 -ctlIndex5G_VHT80_mode_11_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_11_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_VHT80_A_0_0 82 86 90 94 98 146 150 154 158 162 166 170 174 178 195 199 -ctlData5G_VHT80_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_0_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_1_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_2_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_3_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_4_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_5_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_5_A_0_0 0x2 -ctlModeExt5G_PrimaryLowerFreq_A_0_0 8 8 8 8 8 8 -ctlFreqbin5G_VHT80p80_PrimaryLowerFreq_A_0_0 90 154 158 162 166 170 -ctlData5G_VHT80p80_PrimaryLowerFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_0_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_1_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_2_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_3_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_4_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_5_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_5_A_0_0 0x2 -ctlModeExt5G_VHT80p80_PrimaryHigherFreq_A_0_0 9 9 9 9 9 9 -ctlFreqbin5G_VHT80p80_PrimaryHigherFreq_A_0_0 90 154 158 162 166 170 -ctlData5G_VHT80p80_PrimaryHigherFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT160_mode_0_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT160_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT160_mode_1_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT160_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT160_mode_2_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT160_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT160_mode_3_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT160_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT160_mode_4_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT160_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT160_mode_5_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT160_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_5_A_0_0 0x2 -ctlFreqbin5G_VHT160_A_0_0 90 154 158 162 166 170 -ctl5GVHT160Reserved_A_0_0 0 0 -ctlData5G_VHT160_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlSpare5G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -nvSARId__0_0 13 -nvSARLen__0_0 44 -nvSARFlag__0_0 0x0 -CCK2gLimit_B0_0_0 0x3c -Ofdm2gLimit_B0_0_0 0x3c -Ofdm5gLimit_B0_0_0 0x3c -pad_B0_0_0 0 -CCK2gLimit_B1_0_0 0x3c -Ofdm2gLimit_B1_0_0 0x3c -Ofdm5gLimit_B1_0_0 0x3c -pad_B1_0_0 0 -CCK2gLimit_B0_1_0 0x3c -Ofdm2gLimit_B0_1_0 0x3c -Ofdm5gLimit_B0_1_0 0x3c -pad_B0_1_0 0 -CCK2gLimit_B1_1_0 0x3c -Ofdm2gLimit_B1_1_0 0x3c -Ofdm5gLimit_B1_1_0 0x3c -pad_B1_1_0 0 -CCK2gLimit_B0_2_0 0x3c -Ofdm2gLimit_B0_2_0 0x3c -Ofdm5gLimit_B0_2_0 0x3c -pad_B0_2_0 0 -CCK2gLimit_B1_2_0 0x3c -Ofdm2gLimit_B1_2_0 0x3c -Ofdm5gLimit_B1_2_0 0x3c -pad_B1_2_0 0 -CCK2gLimit_B0_3_0 0x3c -Ofdm2gLimit_B0_3_0 0x3c -Ofdm5gLimit_B0_3_0 0x3c -pad_B0_3_0 0 -CCK2gLimit_B1_3_0 0x3c -Ofdm2gLimit_B1_3_0 0x3c -Ofdm5gLimit_B1_3_0 0x3c -pad_B1_3_0 0 -CCK2gLimit_B0_4_0 0x3c -Ofdm2gLimit_B0_4_0 0x3c -Ofdm5gLimit_B0_4_0 0x3c -pad_B0_4_0 0 -CCK2gLimit_B1_4_0 0x3c -Ofdm2gLimit_B1_4_0 0x3c -Ofdm5gLimit_B1_4_0 0x3c -pad_B1_4_0 0 -nvRxGainId__0_0 14 -nvRxGainLen__0_0 260 -nvRxGainFlag__0_0 0x0 -bandMask_G_0_0_0 0x0 -refISS_G_0_0_0 0 -rate_G_0_0_0 0 -bandWidth_G_0_0_0 0 -numChan_G_0_0_0 0 -numChain_G_0_0_0 0 -numPkts_G_0_0_0 0 -chans_G_0_0_0 0 0 0 0 -chainMasks_G_0_0_0 0x0 0x0 -rxNFCalPowerDBr_G_0_0_0 0 0 -rxNFCalPowerDBm_G_0_0_0 0 0 -rxTempMeas_G_0_0_0 0 0 -rxNFThermCalSlope_G_0_0_0 0 0 -minCcaThreshold_G_0_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_0_0 0 0 -rxNFCalPowerDBr_G_0_1_0 0 0 -rxNFCalPowerDBm_G_0_1_0 0 0 -rxTempMeas_G_0_1_0 0 0 -rxNFThermCalSlope_G_0_1_0 0 0 -minCcaThreshold_G_0_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_1_0 0 0 -rxNFCalPowerDBr_G_0_2_0 0 0 -rxNFCalPowerDBm_G_0_2_0 0 0 -rxTempMeas_G_0_2_0 0 0 -rxNFThermCalSlope_G_0_2_0 0 0 -minCcaThreshold_G_0_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_2_0 0 0 -rxNFCalPowerDBr_G_0_3_0 0 0 -rxNFCalPowerDBm_G_0_3_0 0 0 -rxTempMeas_G_0_3_0 0 0 -rxNFThermCalSlope_G_0_3_0 0 0 -minCcaThreshold_G_0_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_3_0 0 0 -bandMask_A_0_0_0 0x0 -refISS_A_0_0_0 0 -rate_A_0_0_0 0 -bandWidth_A_0_0_0 0 -numChan_A_0_0_0 0 -numChain_A_0_0_0 0 -numPkts_A_0_0_0 0 -chans_A_0_0_0 0 0 0 0 -chainMasks_A_0_0_0 0x0 0x0 -rxNFCalPowerDBr_A_0_0_0 0 0 -rxNFCalPowerDBm_A_0_0_0 0 0 -rxTempMeas_A_0_0_0 0 0 -rxNFThermCalSlope_A_0_0_0 0 0 -minCcaThreshold_A_0_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_0_0 0 0 -rxNFCalPowerDBr_A_0_1_0 0 0 -rxNFCalPowerDBm_A_0_1_0 0 0 -rxTempMeas_A_0_1_0 0 0 -rxNFThermCalSlope_A_0_1_0 0 0 -minCcaThreshold_A_0_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_1_0 0 0 -rxNFCalPowerDBr_A_0_2_0 0 0 -rxNFCalPowerDBm_A_0_2_0 0 0 -rxTempMeas_A_0_2_0 0 0 -rxNFThermCalSlope_A_0_2_0 0 0 -minCcaThreshold_A_0_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_2_0 0 0 -rxNFCalPowerDBr_A_0_3_0 0 0 -rxNFCalPowerDBm_A_0_3_0 0 0 -rxTempMeas_A_0_3_0 0 0 -rxNFThermCalSlope_A_0_3_0 0 0 -minCcaThreshold_A_0_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_3_0 0 0 -bandMask_A_1_0_0 0x0 -refISS_A_1_0_0 0 -rate_A_1_0_0 0 -bandWidth_A_1_0_0 0 -numChan_A_1_0_0 0 -numChain_A_1_0_0 0 -numPkts_A_1_0_0 0 -chans_A_1_0_0 0 0 0 0 -chainMasks_A_1_0_0 0x0 0x0 -rxNFCalPowerDBr_A_1_0_0 0 0 -rxNFCalPowerDBm_A_1_0_0 0 0 -rxTempMeas_A_1_0_0 0 0 -rxNFThermCalSlope_A_1_0_0 0 0 -minCcaThreshold_A_1_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_0_0 0 0 -rxNFCalPowerDBr_A_1_1_0 0 0 -rxNFCalPowerDBm_A_1_1_0 0 0 -rxTempMeas_A_1_1_0 0 0 -rxNFThermCalSlope_A_1_1_0 0 0 -minCcaThreshold_A_1_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_1_0 0 0 -rxNFCalPowerDBr_A_1_2_0 0 0 -rxNFCalPowerDBm_A_1_2_0 0 0 -rxTempMeas_A_1_2_0 0 0 -rxNFThermCalSlope_A_1_2_0 0 0 -minCcaThreshold_A_1_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_2_0 0 0 -rxNFCalPowerDBr_A_1_3_0 0 0 -rxNFCalPowerDBm_A_1_3_0 0 0 -rxTempMeas_A_1_3_0 0 0 -rxNFThermCalSlope_A_1_3_0 0 0 -minCcaThreshold_A_1_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_3_0 0 0 -bandMask_A_2_0_0 0x0 -refISS_A_2_0_0 0 -rate_A_2_0_0 0 -bandWidth_A_2_0_0 0 -numChan_A_2_0_0 0 -numChain_A_2_0_0 0 -numPkts_A_2_0_0 0 -chans_A_2_0_0 0 0 0 0 -chainMasks_A_2_0_0 0x0 0x0 -rxNFCalPowerDBr_A_2_0_0 0 0 -rxNFCalPowerDBm_A_2_0_0 0 0 -rxTempMeas_A_2_0_0 0 0 -rxNFThermCalSlope_A_2_0_0 0 0 -minCcaThreshold_A_2_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_0_0 0 0 -rxNFCalPowerDBr_A_2_1_0 0 0 -rxNFCalPowerDBm_A_2_1_0 0 0 -rxTempMeas_A_2_1_0 0 0 -rxNFThermCalSlope_A_2_1_0 0 0 -minCcaThreshold_A_2_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_1_0 0 0 -rxNFCalPowerDBr_A_2_2_0 0 0 -rxNFCalPowerDBm_A_2_2_0 0 0 -rxTempMeas_A_2_2_0 0 0 -rxNFThermCalSlope_A_2_2_0 0 0 -minCcaThreshold_A_2_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_2_0 0 0 -rxNFCalPowerDBr_A_2_3_0 0 0 -rxNFCalPowerDBm_A_2_3_0 0 0 -rxTempMeas_A_2_3_0 0 0 -rxNFThermCalSlope_A_2_3_0 0 0 -minCcaThreshold_A_2_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_3_0 0 0 -nvRttTableId__0_0 15 -nvRttTableLen__0_0 1016 -nvRttTableFlag__0_0 0x0 -rttTxBaseDelayLowBand_Legacy_20_160_T0_0_0 5450 0 3680 0 -rttTxBaseDelayLowBand_Ht20_20_160_T0_0_0 5350 0 3570 0 -rttTxBaseDelayLowBand_Vht20_20_160_T0_0_0 0 0 -64 0 -rttTxBaseDelayLowBand_Dup40_40_160_T0_0_0 3950 5054 0 -rttTxBaseDelayLowBand_Ht40_40_160_T0_0_0 6150 4570 0 -rttTxBaseDelayLowBand_Vht40_40_160_T0_0_0 6450 4880 0 -rttTxBaseDelayLowBand_Dup80_80_160_T0_0_0 4222 0 -rttTxBaseDelayLowBand_Vht80_80_160_T0_0_0 4110 0 -rttTxBaseDelayLowBand_Dup160_160_160_T0_0_0 0 -rttTxBaseDelayLowBand_Vht160_160_160_T0_0_0 0 -rttTxBaseDelayLowBand_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttRxBaseDelayLowBand_Legacy_20_160_T0_0_0 3949 0 3669 0 -rttRxBaseDelayLowBand_Ht20_20_160_T0_0_0 3880 0 3558 0 -rttRxBaseDelayLowBand_Vht20_20_160_T0_0_0 0 0 -76 0 -rttRxBaseDelayLowBand_Dup40_40_160_T0_0_0 0 2880 0 -rttRxBaseDelayLowBand_Ht40_40_160_T0_0_0 0 2137 0 -rttRxBaseDelayLowBand_Vht40_40_160_T0_0_0 0 2447 0 -rttRxBaseDelayLowBand_Dup80_80_160_T0_0_0 2913 0 -rttRxBaseDelayLowBand_Vht80_80_160_T0_0_0 1804 0 -rttRxBaseDelayLowBand_Dup160_160_160_T0_0_0 143 -rttRxBaseDelayLowBand_Vht160_160_160_T0_0_0 -2180 -rttRxBaseDelayLowBand_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttTxBaseDelayHighBand_Legacy_20_160_T0_0_0 0 0 3680 0 -rttTxBaseDelayHighBand_Ht20_20_160_T0_0_0 0 0 3570 0 -rttTxBaseDelayHighBand_Vht20_20_160_T0_0_0 0 0 -64 0 -rttTxBaseDelayHighBand_Dup40_40_160_T0_0_0 0 5054 0 -rttTxBaseDelayHighBand_Ht40_40_160_T0_0_0 0 4570 0 -rttTxBaseDelayHighBand_Vht40_40_160_T0_0_0 0 4880 0 -rttTxBaseDelayHighBand_Dup80_80_160_T0_0_0 4222 0 -rttTxBaseDelayHighBand_Vht80_80_160_T0_0_0 4110 0 -rttTxBaseDelayHighBand_Dup160_160_160_T0_0_0 0 -rttTxBaseDelayHighBand_Vht160_160_160_T0_0_0 0 -rttTxBaseDelayHighBand_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttRxBaseDelayHighBand_Legacy_20_160_T0_0_0 0 0 3669 0 -rttRxBaseDelayHighBand_Ht20_20_160_T0_0_0 0 0 3558 0 -rttRxBaseDelayHighBand_Vht20_20_160_T0_0_0 0 0 -76 0 -rttRxBaseDelayHighBand_Dup40_40_160_T0_0_0 0 2880 0 -rttRxBaseDelayHighBand_Ht40_40_160_T0_0_0 0 2137 0 -rttRxBaseDelayHighBand_Vht40_40_160_T0_0_0 0 2447 0 -rttRxBaseDelayHighBand_Dup80_80_160_T0_0_0 2913 0 -rttRxBaseDelayHighBand_Vht80_80_160_T0_0_0 1804 0 -rttRxBaseDelayHighBand_Dup160_160_160_T0_0_0 143 -rttRxBaseDelayHighBand_Vht160_160_160_T0_0_0 -2180 -rttRxBaseDelayHighBand_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttTxDeltaOtherChains2G_Legacy_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains2G_Ht20_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains2G_Vht20_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains2G_Dup40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains2G_Ht40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains2G_Vht40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains2G_Dup80_80_80_T0_0_0 0 -rttTxDeltaOtherChains2G_Vht80_80_80_T0_0_0 0 -rttTxDeltaOtherChains2G_rttDelay_20_80Reserved_T0_0_0 0x0 0x0 -rttTxDeltaOtherChains5G_Legacy_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains5G_Ht20_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains5G_Vht20_20_80_T0_0_0 0 0 0 -rttTxDeltaOtherChains5G_Dup40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains5G_Ht40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains5G_Vht40_40_80_T0_0_0 0 0 -rttTxDeltaOtherChains5G_Dup80_80_80_T0_0_0 0 -rttTxDeltaOtherChains5G_Vht80_80_80_T0_0_0 0 -rttTxDeltaOtherChains5G_rttDelay_20_80Reserved_T0_0_0 0x0 0x0 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-rttTxDeltaDpdOn_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttTxDeltaPefOn_Legacy_20_160_T0_0_0 208 0 104 0 -rttTxDeltaPefOn_Ht20_20_160_T0_0_0 208 0 104 0 -rttTxDeltaPefOn_Vht20_20_160_T0_0_0 208 0 104 0 -rttTxDeltaPefOn_Dup40_40_160_T0_0_0 208 104 0 -rttTxDeltaPefOn_Ht40_40_160_T0_0_0 208 104 0 -rttTxDeltaPefOn_Vht40_40_160_T0_0_0 208 104 0 -rttTxDeltaPefOn_Dup80_80_160_T0_0_0 104 0 -rttTxDeltaPefOn_Vht80_80_160_T0_0_0 104 0 -rttTxDeltaPefOn_Dup160_160_160_T0_0_0 104 -rttTxDeltaPefOn_Vht160_160_160_T0_0_0 104 -rttTxDeltaPefOn_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 -rttTxDeltaTxiqOn_Legacy_20_160_T0_0_0 250 0 125 0 -rttTxDeltaTxiqOn_Ht20_20_160_T0_0_0 250 0 125 0 -rttTxDeltaTxiqOn_Vht20_20_160_T0_0_0 250 0 125 0 -rttTxDeltaTxiqOn_Dup40_40_160_T0_0_0 250 125 0 -rttTxDeltaTxiqOn_Ht40_40_160_T0_0_0 250 125 0 -rttTxDeltaTxiqOn_Vht40_40_160_T0_0_0 250 125 0 -rttTxDeltaTxiqOn_Dup80_80_160_T0_0_0 125 0 -rttTxDeltaTxiqOn_Vht80_80_160_T0_0_0 125 0 -rttTxDeltaTxiqOn_Dup160_160_160_T0_0_0 125 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0 0 0 0 0 0 0 0 0 diff --git a/db845c/firmware/board-2.bin b/db845c/firmware/board-2.bin Binary files differdeleted file mode 100644 index ecbb1d6..0000000 --- a/db845c/firmware/board-2.bin +++ /dev/null diff --git a/db845c/firmware/cdsp.b00 b/db845c/firmware/cdsp.b00 Binary files differdeleted file mode 100644 index a58b080..0000000 --- a/db845c/firmware/cdsp.b00 +++ /dev/null diff --git a/db845c/firmware/cdsp.b01 b/db845c/firmware/cdsp.b01 Binary files differdeleted file mode 100644 index 6d6d277..0000000 --- a/db845c/firmware/cdsp.b01 +++ /dev/null diff --git a/db845c/firmware/cdsp.b02 b/db845c/firmware/cdsp.b02 Binary files differdeleted file mode 100644 index 69319a4..0000000 --- a/db845c/firmware/cdsp.b02 +++ /dev/null diff --git a/db845c/firmware/cdsp.b03 b/db845c/firmware/cdsp.b03 Binary files differdeleted file mode 100644 index 54c48df..0000000 --- a/db845c/firmware/cdsp.b03 +++ /dev/null diff --git a/db845c/firmware/cdsp.b04 b/db845c/firmware/cdsp.b04 Binary files differdeleted file mode 100644 index e8d3bc5..0000000 --- a/db845c/firmware/cdsp.b04 +++ /dev/null diff --git a/db845c/firmware/cdsp.b05 b/db845c/firmware/cdsp.b05 Binary files differdeleted file mode 100644 index 706ea99..0000000 --- a/db845c/firmware/cdsp.b05 +++ /dev/null diff --git a/db845c/firmware/cdsp.b06 b/db845c/firmware/cdsp.b06 Binary files differdeleted file mode 100644 index ea6cb88..0000000 --- a/db845c/firmware/cdsp.b06 +++ /dev/null diff --git a/db845c/firmware/cdsp.b08 b/db845c/firmware/cdsp.b08 Binary files differdeleted file mode 100644 index d20b791..0000000 --- a/db845c/firmware/cdsp.b08 +++ /dev/null diff --git a/db845c/firmware/cdsp.mbn b/db845c/firmware/cdsp.mbn Binary files differdeleted file mode 100644 index a115cc8..0000000 --- a/db845c/firmware/cdsp.mbn +++ /dev/null diff --git a/db845c/firmware/cdsp.mdt b/db845c/firmware/cdsp.mdt Binary files differdeleted file mode 100644 index 9915c6e..0000000 --- a/db845c/firmware/cdsp.mdt +++ /dev/null diff --git a/db845c/firmware/cdspr.jsn b/db845c/firmware/cdspr.jsn deleted file mode 100644 index 5d976a6..0000000 --- a/db845c/firmware/cdspr.jsn +++ /dev/null @@ -1,21 +0,0 @@ -{ - "sr_version": { - "major": 1, - "minor": 1, - "patch": 1 - }, - "sr_domain": { - "soc": "msm", - "domain": "cdsp", - "subdomain": "root_pd", - "qmi_instance_id": 76 - }, - "sr_service": [ - { - "provider": "tms", - "service": "servreg", - "service_data_valid": 0, - "service_data": 0 - } - ] -}
\ No newline at end of file diff --git a/db845c/firmware/devcfg.mbn b/db845c/firmware/devcfg.mbn Binary files differdeleted file mode 100644 index f7080e7..0000000 --- a/db845c/firmware/devcfg.mbn +++ /dev/null diff --git a/db845c/firmware/device.mk b/db845c/firmware/device.mk deleted file mode 100644 index e99a32f..0000000 --- a/db845c/firmware/device.mk +++ /dev/null @@ -1,143 +0,0 @@ -# Install firmware files copied over from -# http://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_20190529180356-v3.zip - -# Adreno -PRODUCT_PACKAGES := \ - a630_gmu.bin \ - a630_sqe.fw \ - a630_zap.b00 \ - a630_zap.b01 \ - a630_zap.b02 \ - a630_zap.elf \ - a630_zap.mdt \ - a630_zap.mbn - -# DSP (adsp+cdsp) -PRODUCT_PACKAGES += \ - adsp.b00 \ - adsp.b01 \ - adsp.b02 \ - adsp.b03 \ - adsp.b04 \ - adsp.b05 \ - adsp.b06 \ - adsp.b07 \ - adsp.b08 \ - adsp.b09 \ - adsp.b10 \ - adsp.b11 \ - adsp.b12 \ - adsp.b13 \ - adsp.mdt \ - adsp.mbn \ - adspr.jsn \ - adspua.jsn \ - cdsp.b00 \ - cdsp.b01 \ - cdsp.b02 \ - cdsp.b03 \ - cdsp.b04 \ - cdsp.b05 \ - cdsp.b06 \ - cdsp.b08 \ - cdsp.mdt \ - cdsp.mbn \ - cdspr.jsn - -# USB (USB Host to PCIE) -# For Ethernet and one of the USB-A host port to work -PRODUCT_PACKAGES += \ - K2026090.mem - -# I2C/SPI fix -PRODUCT_PACKAGES += \ - devcfg.mbn - - -PRODUCT_PACKAGES += \ - mba.mbn \ - modem.mbn \ - modemuw.jsn - -# Venus -# Video encoder/decoder accelerator -PRODUCT_PACKAGES += \ - venus.b00 \ - venus.b01 \ - venus.b02 \ - venus.b03 \ - venus.b04 \ - venus.mdt \ - venus.mbn - -# Wlan -PRODUCT_PACKAGES += \ - bdwlan.102 \ - bdwlan.104 \ - bdwlan.105 \ - bdwlan.106 \ - bdwlan.107 \ - bdwlan.108 \ - bdwlan.109 \ - bdwlan.10b \ - bdwlan.10c \ - bdwlan.b04 \ - bdwlan.b07 \ - bdwlan.b09 \ - bdwlan.b0a \ - bdwlan.b0b \ - bdwlan.b0d \ - bdwlan.b0e \ - bdwlan.b0f \ - bdwlan.b14 \ - bdwlan.b15 \ - bdwlan.b30 \ - bdwlan.b31 \ - bdwlan.b32 \ - bdwlan.b33 \ - bdwlan.b34 \ - bdwlan.b35 \ - bdwlan.b36 \ - bdwlan.b37 \ - bdwlan.b38 \ - bdwlan.b39 \ - bdwlan.b3a \ - bdwlan.b3c \ - bdwlan.b3d \ - bdwlan.b3e \ - bdwlan.b3f \ - bdwlan.b41 \ - bdwlan.b42 \ - bdwlan.b45 \ - bdwlan.b70 \ - bdwlan.bin \ - bdwlan.txt \ - wlanmdsp.mbn - -#ath10k -PRODUCT_PACKAGES += \ - board-2.bin \ - firmware-5.bin \ - notice.txt_wlanmdsp - -# License -# Necessary to bundle license with firmware files -PRODUCT_PACKAGES += \ - LICENSE.qcom.txt - -# Bluetooth -# Firmware files (qca/cr*) copied from -# https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/qca -PRODUCT_PACKAGES += \ - crbtfw21.tlv \ - crnv21.bin - -#Have to duplicate the zap as path changed between kernels -PRODUCT_COPY_FILES += \ - device/linaro/dragonboard/db845c/firmware/a630_gmu.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_gmu.bin \ - device/linaro/dragonboard/db845c/firmware/a630_sqe.fw:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_sqe.fw \ - device/linaro/dragonboard/db845c/firmware/a630_zap.b00:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_zap.b00 \ - device/linaro/dragonboard/db845c/firmware/a630_zap.b01:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_zap.b01 \ - device/linaro/dragonboard/db845c/firmware/a630_zap.b02:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_zap.b02 \ - device/linaro/dragonboard/db845c/firmware/a630_zap.elf:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_zap.elf \ - device/linaro/dragonboard/db845c/firmware/a630_zap.mdt:$(TARGET_COPY_OUT_VENDOR)/firmware/qcom/sdm845/a630_zap.mbn diff --git a/db845c/firmware/firmware-5.bin b/db845c/firmware/firmware-5.bin Binary files differdeleted file mode 100644 index 69b4cae..0000000 --- a/db845c/firmware/firmware-5.bin +++ /dev/null diff --git a/db845c/firmware/mba.mbn b/db845c/firmware/mba.mbn Binary files differdeleted file mode 100644 index 18e5883..0000000 --- a/db845c/firmware/mba.mbn +++ /dev/null diff --git a/db845c/firmware/modem.mbn b/db845c/firmware/modem.mbn Binary files differdeleted file mode 100644 index e172a46..0000000 --- a/db845c/firmware/modem.mbn +++ /dev/null diff --git a/db845c/firmware/modemuw.jsn b/db845c/firmware/modemuw.jsn deleted file mode 100644 index 88a400e..0000000 --- a/db845c/firmware/modemuw.jsn +++ /dev/null @@ -1,33 +0,0 @@ -{ - "sr_version": { - "major": 1, - "minor": 1, - "patch": 1 - }, - "sr_domain": { - "soc": "msm", - "domain": "modem", - "subdomain": "wlan_pd", - "qmi_instance_id": 180 - }, - "sr_service": [ - { - "provider": "kernel", - "service": "elf_loader", - "service_data_valid": 0, - "service_data": 0 - }, - { - "provider": "tms", - "service": "servreg", - "service_data_valid": 0, - "service_data": 0 - }, - { - "provider": "wlan", - "service": "fw", - "service_data_valid": 0, - "service_data": 0 - } - ] -}
\ No newline at end of file diff --git a/db845c/firmware/notice.txt_wlanmdsp b/db845c/firmware/notice.txt_wlanmdsp deleted file mode 100644 index b85005c..0000000 --- a/db845c/firmware/notice.txt_wlanmdsp +++ /dev/null @@ -1,571 +0,0 @@ -============================================================================= -============================================================================= -This Notice.txt file contains certain notices of software components included with the software that -Qualcomm Atheros, Inc. (“Qualcomm Atheros”) is required to provide you. -Except where prohibited by the open source license, the content of this notices file is -only provided to satisfy Qualcomm Atheros's attribution and notice requirement; -your use of these software components together with the Qualcomm Atheros software -(Qualcomm Atheros software hereinafter referred to as “Software”) is subject to the -terms of your agreement from Qualcomm Atheros. Compliance with all copyright laws and -software license agreements included in the notice section of this file are -the responsibility of the user. Except as may be granted by separate express written agreement, -this file provides no license to any patents, -trademarks, copyrights, or other intellectual property of Qualcomm Incorporated or any of its subsidiaries. -Copyright (c) 2015 Qualcomm Atheros, Inc. All rights reserved. -Qualcomm is a trademark of Qualcomm Incorporated, registered in the United States and other countries. -All Qualcomm Incorporated trademarks are used with permission. -Atheros is a trademark of Qualcomm Atheros, Inc., registered in the United States and other countries. -Other products and brand names may be trademarks or registered trademarks of their respective owners. - -============================================================================= - -NOTICES: - -============================================================================= - -============================================================================================================================== - - -/* - * Copyright (c) 2012 Qualcomm Atheros, Inc. - * All Rights Reserved. - * Qualcomm Atheros Confidential and Proprietary. - */ -//- -// Copyright (c) 2002-2004 Sam Leffler, Errno Consulting -// All rights reserved. -// $ATH_LICENSE_NULL$ -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// 1. Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer, -// without modification. -// 2. Redistributions in binary form must reproduce at minimum a disclaimer -// similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any -// redistribution must be conditioned upon including a substantially -// similar Disclaimer requirement for further binary redistribution. -// 3. Neither the names of the above-listed copyright holders nor the names -// of any contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// Alternatively, this software may be distributed under the terms of the -// GNU General Public License ("GPL") version 2 as published by the Free -// Software Foundation. -// -// NO WARRANTY -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY -// AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -// THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, -// OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER -// IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -// THE POSSIBILITY OF SUCH DAMAGES. -// -// $Id: //depot/sw/qca_main/components/wlan/qca-wifi-fw/1.0/drivers/target/src/wlan/proto/include/if_llc.h#2 $ -// $NetBSD: if_llc.h,v 1.12 1999/11/19 20:41:19 thorpej Exp $ -// $Id: //depot/sw/qca_main/components/wlan/qca-wifi-fw/1.0/drivers/target/src/wlan/proto/include/if_llc.h#2 $ -// - -/* - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)if_llc.h 8.1 (Berkeley) 6/10/93 - * $FreeBSD: src/sys/net/if_llc.h,v 1.9 2002/09/23 06:25:08 alfred Exp $ - */ - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - -wlan/protocol/src/include/if_llc.h#1 - -======================================================================================================================================== -/* - * Copyright (c) 2012 Qualcomm Atheros, Inc. - * All Rights Reserved. - * Qualcomm Atheros Confidential and Proprietary. - */ -//- -// Copyright (c) 2002-2004 Sam Leffler, Errno Consulting -// All rights reserved. -// $ATH_LICENSE_NULL$ -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// 1. Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer, -// without modification. -// 2. Redistributions in binary form must reproduce at minimum a disclaimer -// similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any -// redistribution must be conditioned upon including a substantially -// similar Disclaimer requirement for further binary redistribution. -// 3. Neither the names of the above-listed copyright holders nor the names -// of any contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// Alternatively, this software may be distributed under the terms of the -// GNU General Public License ("GPL") version 2 as published by the Free -// Software Foundation. -// -// NO WARRANTY -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY -// AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -// THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, -// OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER -// IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -// THE POSSIBILITY OF SUCH DAMAGES. -// -// - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - -wlan/protocol/include/if_ethersubr.h#1 - - -======================================================================================================================================== - -// Copyright (c) 2003-2006 Marcus Geelnard -// -// This software is provided 'as-is', without any express or implied -// warranty. In no event will the authors be held liable for any damages -// arising from the use of this software. -// -// Permission is granted to anyone to use this software for any purpose, -// including commercial applications, and to alter it and redistribute it -// freely, subject to the following restrictions: -// -// 1. The origin of this software must not be misrepresented; you must not -// claim that you wrote the original software. If you use this software -// in a product, an acknowledgment in the product documentation would -// be appreciated but is not required. -// -// 2. Altered source versions must be plainly marked as such, and must not -// be misrepresented as being the original software. -// -// 3. This notice may not be removed or altered from any source -// distribution. -// -// Marcus Geelnard -// marcus.geelnard at home.se -// - - -wlan/protocol/support/lz77/lz.h#1 -wlan/protocol/support/lz77/lz.c#1 - - -======================================================================================================================================== - - -/* - * Copyright (c) 2011 Qualcomm Atheros, Inc. - * All Rights Reserved. - * Qualcomm Atheros Confidential and Proprietary. - * $ATH_LICENSE_NULL$ - */ - -// Copyright (c) 2003-2006 Marcus Geelnard -// Copyright (c) 2006-2007 Atheros Communications Inc. -// $ATH_LICENSE_NULL$ -// This software is provided 'as-is', without any express or implied -// warranty. In no event will the authors be held liable for any damages -// arising from the use of this software. -// -// Permission is granted to anyone to use this software for any purpose, -// including commercial applications, and to alter it and redistribute it -// freely, subject to the following restrictions: -// -// 1. The origin of this software must not be misrepresented; you must not -// claim that you wrote the original software. If you use this software -// in a product, an acknowledgment in the product documentation would -// be appreciated but is not required. -// -// 2. Altered source versions must be plainly marked as such, and must not -// be misrepresented as being the original software. -// -// 3. This notice may not be removed or altered from any source -// distribution. -// -// Marcus Geelnard -// marcus.geelnard at home.se -// - -wlan/mac_core/tests/serflash/flashprog/uncompr.c#1 - - -======================================================================================================================================== - -// -// Copyright (c) 1991, 1993 -// The Regents of the University of California. All rights reserved. -// $ATH_LICENSE_NULL$ -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// 1. Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// 2. Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the distribution. -// 3. All advertising materials mentioning features or use of this software -// must display the following acknowledgement: -// This product includes software developed by the University of -// California, Berkeley and its contributors. -// 4. Neither the name of the University nor the names of its contributors -// may be used to endorse or promote products derived from this software -// without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND -// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -// ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE -// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -// OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -// OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -// SUCH DAMAGE. -// -// @(#)queue.h 8.5 (Berkeley) 8/20/94 -// $FreeBSD: src/sys/sys/queue.h,v 1.58 2004/04/07 04:19:49 imp Exp $ -// - -wlan/include/queue.h#1 - -======================================================================================================================================== -/* - * SHA1 hash implementation and interface functions - * Copyright (c) 2003-2005, Jouni Malinen <jkmaline@cc.hut.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Alternatively, this software may be distributed under the terms of BSD - * license. - * - * See README and COPYING for more details. - */ - -wlan/mac_core/include/sha1.h -wlan/mac_core/romexport/AR900B/hw.1/include/sha1.h -wlan/mac_core/romexport/AR900B/hw.2/include/sha1.h - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - -======================================================================================================================================== - -/* - * FILE: sha2.h - * AUTHOR: Aaron D. Gifford - http://www.aarongifford.com/ - * - * Copyright (c) 2000-2001, Aaron D. Gifford - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTOR(S) ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTOR(S) BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id: //depot/sw/branches/qca_rome_main/perf_pwr_offload/drivers/target/include/sha2.h#1 $ - */ - -wlan/mac_core/romexport/AR900B/hw.1/include/sha2.h -wlan/mac_core/romexport/AR900B/hw.2/include/sha2.h - -======================================================================================================================================== - -/* - * AES-based functions - * - * - * - AES Key Wrap Algorithm (128-bit KEK) (RFC3394) - * - One-Key CBC MAC (OMAC1) hash with AES-128 - * - AES-128 CTR mode encryption - * - AES-128 EAX mode encryption/decryption - * - AES-128 CBC - * - * Copyright (c) 2003-2005, Jouni Malinen <jkmaline@cc.hut.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Alternatively, this software may be distributed under the terms of BSD - * license. - * - * See README and COPYING for more details. - */ - -wlan/mac_core/include/aes_wrap.h -wlan/mac_core/romexport/AR900B/hw.1/include/aes_wrap.h -wlan/mac_core/romexport/AR900B/hw.2/include/aes_wrap.h - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - -======================================================================================================================================== - -/* - * MD5 hash implementation and interface functions - * Copyright (c) 2003-2005, Jouni Malinen <jkmaline@cc.hut.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Alternatively, this software may be distributed under the terms of BSD - * license. - * - * See README and COPYING for more details. - */ - -wlan/mac_core/romexport/AR900B/hw.1/include/md5.h -wlan/mac_core/romexport/AR900B/hw.2/include/md5.h - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - - -======================================================================================================================================== - -/* - * Common helper macros, etc. - * Copyright (c) 2002-2005, Jouni Malinen <jkmaline@cc.hut.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Alternatively, this software may be distributed under the terms of BSD - * license. - * - */ - -wlan/mac_core/romexport/AR900B/hw.1/include/seccommon.h -wlan/mac_core/romexport/AR900B/hw.2/include/seccommon.h - -For all files with the above-mentioned dual-license, QCA chooses to receive subject to the BSD license. - -======================================================================================================================================== - - -/* - * Copyright (c) 1998 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Lennart Augustsson (lennart@augustsson.net) at - * Carlstedt Research & Technology. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* Modified by Synopsys, Inc, 12/12/2007 */ - -wlan/mac_core/include/usb.h -wlan/mac_core/romexport/AR900B/hw.1/include/usb.h -wlan/mac_core/romexport/AR900B/hw.2/include/usb.h - -======================================================================================================================================== - -/* ========================================================================== - * - * Synopsys SS USB3 Linux Software Driver and documentation (hereinafter, - * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless - * otherwise expressly agreed to in writing between Synopsys and you. - * - * The Software IS NOT an item of Licensed Software or Licensed Product under - * any End User Software License Agreement or Agreement for Licensed Product - * with Synopsys or any supplement thereto. You are permitted to use and - * redistribute this Software in source and binary forms, with or without - * modification, provided that redistributions of source code must retain this - * notice. You may not view, use, disclose, copy or distribute this file or - * any information contained herein except pursuant to this license grant from - * Synopsys. If you do not agree with this notice, including the disclaimer - * below, then you are not authorized to use the Software. - * - * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * ========================================================================== */ - -wlan/mac_core/include/cil.h -wlan/mac_core/romexport/AR900B/hw.1/include/cil.h -wlan/mac_core/romexport/AR900B/hw.2/include/cil.h -wlan/mac_core/include/dev.h -wlan/mac_core/romexport/AR900B/hw.1/include/dev.h -wlan/mac_core/romexport/AR900B/hw.2/include/dev.h -wlan/mac_core/include/os_dev.h -wlan/mac_core/romexport/AR900B/hw.1/include/os_dev.h -wlan/mac_core/romexport/AR900B/hw.2/include/os_dev.h -wlan/mac_core/include/usb3_hw.h -wlan/mac_core/romexport/AR900B/hw.1/include/usb3_hw.h -wlan/mac_core/romexport/AR900B/hw.2/include/usb3_hw.h -wlan/mac_core/include/pcd.h -wlan/mac_core/romexport/AR900B/hw.1/include/pcd.h -wlan/mac_core/romexport/AR900B/hw.2/include/pcd.h - -======================================================================================================================================== - -/* - * $Header: //source/qcom/qct/core/api/kernel/main/latest/libstd/stringl/stringl.h#13 $ - * $DateTime: 2013/07/24 11:35:54 $ - */ - -/* $OpenBSD: string.h,v 1.17 2006/01/06 18:53:04 millert Exp $ */ -/* $NetBSD: string.h,v 1.6 1994/10/26 00:56:30 cgd Exp $ */ - -/*- - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)string.h 5.10 (Berkeley) 3/9/91 - */ - -wlan/protocol/support/bin2srec/include/stringl/stringl.h - -======================================================================================================================================== - -/* - * $Header: //source/qcom/qct/core/kernel/libstd/main/latest/src/strlcpy.c#1 $ - * $DateTime: 2011/01/07 17:50:19 $ - */ - -/* $OpenBSD: strlcpy.c,v 1.11 2006/05/05 15:27:38 millert Exp $ */ - -/* - * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com> - * - * Permission to use, copy, modify, and distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -wlan/protocol/support/bin2srec/strlcpy.c - -====================================================================================================================================== diff --git a/db845c/firmware/qca/Android.mk b/db845c/firmware/qca/Android.mk deleted file mode 100644 index 3fb65bf..0000000 --- a/db845c/firmware/qca/Android.mk +++ /dev/null @@ -1,11 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include device/linaro/dragonboard/utils.mk - -# QCA firmware files copied from -# https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/qca -firmware_files_bt := \ - crbtfw21.tlv \ - crnv21.bin - -$(foreach f, $(firmware_files_bt), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/qca/)) diff --git a/db845c/firmware/qca/NOTICE b/db845c/firmware/qca/NOTICE deleted file mode 100644 index 9313020..0000000 --- a/db845c/firmware/qca/NOTICE +++ /dev/null @@ -1,426 +0,0 @@ - -This Notice.txt file contains certain notices of software components included -with the software that Qualcomm Atheros, Inc. ("Qualcomm Atheros") is required -to provide you. Except where prohibited by the open source license, the content -of this notices file is only provided to satisfy Qualcomm Atheros's attribution -and notice requirement; your use of these software components together with the -Qualcomm Atheros software (Qualcomm Atheros software hereinafter referred to -as "Software") is subject to the terms of your agreement from Qualcomm Atheros. -Compliance with all copyright laws and software license agreements included in -the notice section of this file are the responsibility of the user. Except as -may be granted by separate express written agreement, this file provides no -license to any patents, trademarks, copyrights, or other intellectual property -of Qualcomm Incorporated or any of its subsidiaries. - -Qualcomm is a trademark of Qualcomm Incorporated, registered in the United States -and other countries. All Qualcomm Incorporated trademarks are used with permission. -Other products and brand names may be trademarks or registered trademarks of their -respective owners. - -NOTICES: - -=============================================================================== - - 1. - -/* - * FILE: sha2.c - * AUTHOR: Aaron D. Gifford <me@aarongifford.com> - * - * Copyright (c) 2000-2001, Aaron D. Gifford - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTOR(S) ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTOR(S) BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id: sha2.c,v 1.1 2001/11/08 00:01:51 adg Exp adg $ - */ -File: LLM_sp_sha2.c - - -/* - * FILE: sha2.h - * AUTHOR: Aaron D. Gifford <me@aarongifford.com> - * - * Copyright (c) 2000-2001, Aaron D. Gifford - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTOR(S) ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTOR(S) BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id: sha2.h,v 1.1 2001/11/08 00:02:01 adg Exp adg $ - */ -File: LLM_sp_sha2.h - -=============================================================================== - - 2. - -/* utility to create the register check tables -* this includes inlined list.h safe for userspace. -* -* Copyright 2009 Jerome Glisse -* Copyright 2009 Red Hat Inc. -* -* Authors: -* Jerome Glisse -* Dave Airlie -*/ -/*All rights reserved. -Redistribution and use in source and binary forms, with or without modification -are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the <ORGANIZATION> nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -File: comm_lib.h - -=============================================================================== - - 3. - -/* crypto/aes/aes.h -*- mode:C; c-file-style: "eay" -*- */ -/* ==================================================================== - * Copyright (c) 1998-2002 The OpenSSL Project. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * 3. All advertising materials mentioning features or use of this - * software must display the following acknowledgment: - * "This product includes software developed by the OpenSSL Project - * for use in the OpenSSL Toolkit. (http://www.openssl.org/)" - * - * 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to - * endorse or promote products derived from this software without - * prior written permission. For written permission, please contact - * openssl-core@openssl.org. - * - * 5. Products derived from this software may not be called "OpenSSL" - * nor may "OpenSSL" appear in their names without prior written - * permission of the OpenSSL Project. - * - * 6. Redistributions of any form whatsoever must retain the following - * acknowledgment: - * "This product includes software developed by the OpenSSL Project - * for use in the OpenSSL Toolkit (http://www.openssl.org/)" - * - * THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY - * EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR - * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * ==================================================================== - * - */ -File Name list: aes.h, aes_locl.h - -=============================================================================== - - 4. - -/* crypto/aes/aes_core.c -*- mode:C; c-file-style: "eay" -*- */ -/** - * rijndael-alg-fst.c - * - * @version 3.0 (December 2000) - * - * Optimised ANSI C code for the Rijndael cipher (now AES) - * - * @author Vincent Rijmen <vincent.rijmen@esat.kuleuven.ac.be> - * @author Antoon Bosselaers <antoon.bosselaers@esat.kuleuven.ac.be> - * @author Paulo Barreto <paulo.barreto@terra.com.br> - * - * This code is hereby placed in the public domain. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ''AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -File: aes_core.c - -=============================================================================== - - 5. - -/*=========================================================================== - - EDIT HISTORY FOR FILE - - $Header: //depot/asic/msmshared/sec/sec/MSM_SEC.03.03.08.xx/aes.h#1 $ - $DateTime: 2006/12/11 00:43:21 $ $Author: davidf $ - -when who what, where, why --------- --- ---------------------------------------------------------- -11/12/04 rv changes to correct LINT errors -02/02/04 rwh Small mods to open source. - -===========================================================================*/ - - /* - I retain copyright in this code but I encourage its free use provided - that I don't carry any responsibility for the results. I am especially - happy to see it used in free and open source software. If you do use - it I would appreciate an acknowledgement of its origin in the code or - the product that results and I would also appreciate knowing a liitle - about the use to which it is being put. - - Dr B. R. Gladman <brg@gladman.uk.net> 1st June 2001. - -*/ -File: aes.h - -/*=========================================================================== - - EDIT HISTORY FOR FILE - - $Header: //depot/asic/msmshared/sec/sec/MSM_SEC.03.03.08.xx/aes_tab.h#1 $ - $DateTime: 2006/12/11 00:43:21 $ $Author: davidf $ - -when who what, where, why --------- --- ---------------------------------------------------------- -11/12/04 rv changes to correct LINT errors -02/02/04 rwh Small mods to open source. - -===========================================================================*/ -/*lint -e146 -e303 */ -/* 146: Assuming a binary constant */ -/* 303: String too long (try +macros) */ - - - /* - I retain copyright in this code but I encourage its free use provided - that I don't carry any responsibility for the results. I am especially - happy to see it used in free and open source software. If you do use - it I would appreciate an acknowledgement of its origin in the code or - the product that results and I would also appreciate knowing a liitle - about the use to which it is being put. - - Dr B. R. Gladman <brg@gladman.uk.net> 1st June 2001. - */ -File: aes_tab.h - -=============================================================================== -6. -=============================================================================== -#FILE:Conftest.py -# Copyright (c) 2003 Stichting NLnet Labs -# Copyright (c) 2001, 2002, 2003 Steven Knight -# -# Permission is hereby granted, free of charge, to any person obtaining -# a copy of this software and associated documentation files (the -# "Software"), to deal in the Software without restriction, including -# without limitation the rights to use, copy, modify, merge, publish, -# distribute, sublicense, and/or sell copies of the Software, and to -# permit persons to whom the Software is furnished to do so, subject to -# the following conditions: -# -# The above copyright notice and this permission notice shall be included -# in all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY -# KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE -# WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE -# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -# -# -# -=============================================================================== -File: Conftest.py - -=============================================================================== -7. -=============================================================================== -/ *** - * - * Fowler/Noll/Vo- hash - * - * The basis of this hash algorithm was taken from an idea sent - * as reviewer comments to the IEEE POSIX P1003.2 committee by: - * - * Phong Vo (http://www.research.att.com/info/kpv/) - * Glenn Fowler (http://www.research.att.com/~gsf/) - * - * In a subsequent ballot round: - * - * Landon Curt Noll (http://www.isthe.com/chongo/) - * - * improved on their algorithm. Some people tried this hash - * and found that it worked rather well. In an EMail message - * to Landon, they named it the ``Fowler/Noll/Vo'' or FNV hash. - * - * FNV hashes are designed to be fast while maintaining a low - * collision rate. The FNV speed allows one to quickly hash lots - * of data while maintaining a reasonable collision rate. See: - * - * http://www.isthe.com/chongo/tech/comp/fnv/index.html - * - * for more details as well as other forms of the FNV hash. - * - * - * Please do not copyright this code. This code is in the public domain. - * - * LANDON CURT NOLL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO - * EVENT SHALL LANDON CURT NOLL BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * By: - * chongo <Landon Curt Noll> /\oo/\ - * http://www.isthe.com/chongo/ - * - * Share and Enjoy! :-) - */ -File: fm_fnv_hash.h, fm_fnv_hash.c - -=============================================================================== -8. -=============================================================================== - -/* - * $Header: //source/qcom/qct/core/api/kernel/main/latest/libstd/stringl/stringl.h#13 $ - * $DateTime: 2013/07/24 11:35:54 $ - */ - -/* $OpenBSD: string.h,v 1.17 2006/01/06 18:53:04 millert Exp $ */ -/* $NetBSD: string.h,v 1.6 1994/10/26 00:56:30 cgd Exp $ */ - -/*- - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)string.h 5.10 (Berkeley) 3/9/91 - */ -File: stringl.h - -=============================================================================== -9. -=============================================================================== -/* - * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com> - * - * Permission to use, copy, modify, and distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -File: wcslcpy.c, wcslcat.c, wstrlcpy.c, strlcat.c, strlcpy.c, wstrlcat.c diff --git a/db845c/firmware/qca/crbtfw21.tlv b/db845c/firmware/qca/crbtfw21.tlv Binary files differdeleted file mode 100644 index 2d5ef8d..0000000 --- a/db845c/firmware/qca/crbtfw21.tlv +++ /dev/null diff --git a/db845c/firmware/qca/crnv21.bin b/db845c/firmware/qca/crnv21.bin Binary files differdeleted file mode 100644 index 7f48ef1..0000000 --- a/db845c/firmware/qca/crnv21.bin +++ /dev/null diff --git a/db845c/firmware/qcom/Android.mk b/db845c/firmware/qcom/Android.mk deleted file mode 100644 index 6f725c0..0000000 --- a/db845c/firmware/qcom/Android.mk +++ /dev/null @@ -1,6 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -# If some modules are built directly from this directory (not subdirectories), -# their rules should be written here. - -include $(call all-makefiles-under,$(LOCAL_PATH)) diff --git a/db845c/firmware/qcom/venus-5.2/Android.mk b/db845c/firmware/qcom/venus-5.2/Android.mk deleted file mode 100644 index 00146a5..0000000 --- a/db845c/firmware/qcom/venus-5.2/Android.mk +++ /dev/null @@ -1,14 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include device/linaro/dragonboard/utils.mk - -firmware_files_venus := \ - venus.b00 \ - venus.b01 \ - venus.b02 \ - venus.b03 \ - venus.b04 \ - venus.mdt \ - venus.mbn - -$(foreach f, $(firmware_files_venus), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/qcom/venus-5.2/)) diff --git a/db845c/firmware/qcom/venus-5.2/NOTICE b/db845c/firmware/qcom/venus-5.2/NOTICE deleted file mode 100644 index c880572..0000000 --- a/db845c/firmware/qcom/venus-5.2/NOTICE +++ /dev/null @@ -1,206 +0,0 @@ -PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY. THIS AGREEMENT IS -A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE -ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU -REPRESENT) AND QUALCOMM TECHNOLOGIES, INC. ("QTI" "WE" "OUR" OR "US"). THIS IS -THE AGREEMENT THAT APPLIES TO YOUR USE OF THE DESIGNATED AND/OR LINKED -APPLICATIONS, THE ENCLOSED QUALCOMM TECHNOLOGIES' MATERIALS, INCLUDING RELATED -DOCUMENTATION AND ANY UPDATES OR IMPROVEMENTS THEREOF -(COLLECTIVELY, "MATERIALS"). BY USING OR COMPLETING THE INSTALLATION OF THE -MATERIALS, YOU ARE ACCEPTING THIS AGREEMENT AND YOU AGREE TO BE BOUND BY ITS -TERMS AND CONDITIONS. IF YOU DO NOT AGREE TO THESE TERMS, QTI IS UNWILLING TO -AND DOES NOT LICENSE THE MATERIALS TO YOU. IF YOU DO NOT AGREE TO THESE TERMS -YOU MUST DISCONTINUE THE INSTALLATION PROCESS AND YOU MAY NOT USE THE MATERIALS -OR RETAIN ANY COPIES OF THE MATERIALS. ANY USE OR POSSESSION OF THE MATERIALS -BY YOU IS SUBJECT TO THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT. - -1. RIGHT TO USE DELIVERABLES; RESTRICTIONS. - - 1.1 License. Subject to the terms and conditions of this Agreement, - including, without limitation, the restrictions, conditions, limitations and - exclusions set forth in this Agreement, QTI hereby grants to you a - nonexclusive, limited license under QTI's copyrights to: (i) install and use - the Materials; and (ii) to reproduce and redistribute the binary code portions - of the Materials (the "Redistributable Binary Code"). You may make and use a - reasonable number of copies of any documentation. - - 1.2 Redistribution Restrictions. Distribution of the Redistributable Binary - Code is subject to the following restrictions: (i) Redistributable Binary Code - may only be distributed in binary format and may not be distributed in source - code format:; (ii) the Redistributable Binary Code may only operate in - conjunction with platforms incorporating Qualcomm Technologies, Inc. chipsets; - (iii) redistribution of the Redistributable Binary Code must include the .txt - file setting forth the terms and condition of this Agreement; (iv) you may not - use Qualcomm Technologies' or its affiliates or subsidiaries name, logo or - trademarks; and (v) copyright, trademark, patent and any other notices that - appear on the Materials may not be removed or obscured. - - 1.3 Additional Restrictions. Except as expressly permitted by this Agreement, - you shall have no right to sublicense, transfer or otherwise disclose the - Materials to any third party. You shall not reverse engineer, reverse - assemble, reverse translate, decompile or reduce to source code form any - portion of the Materials provided in object code form or executable form. - Except for the purposes expressly permitted in this Agreement, You shall not - use the Materials for any other purpose. QTI (or its licensors) shall retain - title and all ownership rights in and to the Materials and any alterations, - modifications (including all derivative works), translations or adaptations - made of the Materials, and all copies thereof, and nothing herein shall be - deemed to grant any right to You under any of QTI's or its affiliates' - patents. You shall not subject the Materials to any third party license - terms (e.g., open source license terms). You shall not use the Materials for - the purpose of identifying or providing evidence to support any potential - patent infringement claim against QTI, its affiliates, or any of QTI's or - QTI's affiliates' suppliers and/or direct or indirect customers. QTI hereby - reserves all rights not expressly granted herein. - - 1.4 Third Party Software and Materials. The Software may contain or link to - certain software and/or materials that are written or owned by third parties. - Such third party code and materials may be licensed under separate or - different terms and conditions and are not licensed to you under the terms of - this Agreement. You agree to comply with all terms and conditions imposed on - you in the applicable third party licenses. Such terms and conditions may - impose certain obligations on you as a condition to the permitted use of such - third party code and materials. QTI does not represent or warrant that such - third party licensors have or will continue to license or make available their - code and materials to you. - - 1.5 Feedback. QTI may from time to time receive suggestions, feedback or - other information from You regarding the Materials. Any suggestions, feedback - or other disclosures received from You are and shall be entirely voluntary on - the part of You. Notwithstanding any other term in this Agreement, QTI shall - be free to use suggestions, feedback or other information received from You, - without obligation of any kind to You. The Parties agree that all inventions, - product improvements, and modifications conceived of or made by QTI that are - based, either in whole or in part, on ideas, feedback, suggestions, or - recommended improvements received from You are the exclusive property of QTI, - and all right, title and interest in and to any such inventions, product - improvements, and modifications will vest solely in QTI. - - 1.6 No Technical Support. QTI is under no obligation to provide any form of - technical support for the Materials, and if QTI, in its sole discretion, - chooses to provide any form of support or information relating to the - Materials, such support and information shall be deemed confidential and - proprietary to QTI. - -2. WARRANTY DISCLAIMER. YOU EXPRESSLY ACKNOWLEDGE AND AGREE THAT THE USE OF -THE MATERIALS IS AT YOUR SOLE RISK. THE MATERIALS AND TECHNICAL SUPPORT, IF -ANY, ARE PROVIDED "AS IS" AND WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS OR -IMPLIED. QTI ITS LICENSORS AND AFFILIATES MAKE NO WARRANTIES, EXPRESS OR -IMPLIED, WITH RESPECT TO THE MATERIALS OR ANY OTHER INFORMATION OR DOCUMENTATION -PROVIDED UNDER THIS AGREEMENT, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF -MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR AGAINST INFRINGEMENT, OR -ANY EXPRESS OR IMPLIED WARRANTY ARISING OUT OF TRADE USAGE OR OUT OF A COURSE OF -DEALING OR COURSE OF PERFORMANCE. NOTHING CONTAINED IN THIS AGREEMENT SHALL BE -CONSTRUED AS (I) A WARRANTY OR REPRESENTATION BY QTI, ITS LICENSORS OR -AFFILIATES AS TO THE VALIDITY OR SCOPE OF ANY PATENT, COPYRIGHT OR OTHER -INTELLECTUAL PROPERTY RIGHT OR (II) A WARRANTY OR REPRESENTATION BY QTI THAT ANY -MANUFACTURE OR USE WILL BE FREE FROM INFRINGEMENT OF PATENTS, COPYRIGHTS OR -OTHER INTELLECTUAL PROPERTY RIGHTS OF OTHERS, AND IT SHALL BE THE SOLE -RESPONSIBILITY OF YOU TO MAKE SUCH DETERMINATION AS IS NECESSARY WITH RESPECT TO -THE ACQUISITION OF LICENSES UNDER PATENTS AND OTHER INTELLECTUAL PROPERTY OF -THIRD PARTIES. - -3. NO OTHER LICENSES OR INTELLECTUAL PROPERTY RIGHTS. Neither this Agreement, -nor any act by QTI or any of its affiliates pursuant to this Agreement or -relating to the Materials (including, without limitation, the provision by QTI -or its affiliates of the Materials), shall provide to You any license or any -other rights whatsoever under any patents, trademarks, trade secrets, copyrights -or any other intellectual property of QTI or any of its affiliates, except for -the copyright rights expressly licensed under this Agreement. You understand and -agree that: - - (i) Neither this Agreement, nor delivery of the Materials, grants any right to - practice, or any other right at all with respect to, any patent of QTI or any - of its affiliates; and - - (ii) A separate license agreement from QUALCOMM Incorporated is needed to use - or practice any patent of QUALCOMM Incorporated. You agree not to contend in - any context that, as a result of the provision or use of the Materials, either - QTI or any of its affiliates has any obligation to extend, or You or any other - party has obtained any right to, any license, whether express or implied, with - respect to any patent of QTI or any of its affiliates for any purpose. - -4. TERMINATION. This Agreement shall be effective upon acceptance, or access or -use of the Materials (whichever occurs first) by You and shall continue until -terminated. You may terminate the Agreement at any time by deleting and -destroying all copies of the Materials and all related information in Your -possession or control. This Agreement terminates immediately and automatically, -with or without notice, if You fail to comply with any provision hereof. -Additionally, QTI may at any time terminate this Agreement, without cause, upon -notice to You. Upon termination You must, to the extent possible, delete or -destroy all copies of the Materials in Your possession and the license granted -to You in this Agreement shall terminate. Sections 1.2 through 10 shall survive -the termination of this Agreement. In the event that any restrictions, -conditions, limitations are found to be either invalid or unenforceable, the -rights granted to You in Section 1 (License) shall be null, void and ineffective -from the Effective Date, and QTI shall also have the right to terminate this -Agreement immediately, and with retroactive effect to the effective date. - -5. LIMITATION OF LIABILITY. IN NO EVENT SHALL QTI, QTI's AFFILIATES OR ITS -LICENSORS BE LIABLE TO YOU FOR ANY INCIDENTAL, CONSEQUENTIAL OR SPECIAL DAMAGES, -INCLUDING BUT NOT LIMITED TO ANY LOST PROFITS, LOST SAVINGS, OR OTHER INCIDENTAL -DAMAGES, ARISING OUT OF THE USE OR INABILITY TO USE, OR THE DELIVERY OR FAILURE -TO DELIVER, ANY OF THE DELIVERABLES, OR ANY BREACH OF ANY OBLIGATION UNDER THIS -AGREEMENT, EVEN IF QTI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -THE FOREGOING LIMITATION OF LIABILITY SHALL REMAIN IN FULL FORCE AND EFFECT -REGARDLESS OF WHETHER YOUR REMEDIES HEREUNDER ARE DETERMINED TO HAVE FAILED OF -THEIR ESSENTIAL PURPOSE. THE ENTIRE LIABILITY OF QTI, QTI's AFFILIATES AND ITS -LICENSORS, AND THE SOLE AND EXCLUSIVE REMEDY OF YOU, FOR ANY CLAIM OR CAUSE OF -ACTION ARISING HEREUNDER (WHETHER IN CONTRACT, TORT, OR OTHERWISE) SHALL NOT -EXCEED US$50. - -6. INDEMNIFICATION. You agree to indemnify and hold harmless QTI and its -officers, directors, employees and successors and assigns against any and all -third party claims, demands, causes of action, losses, liabilities, damages, -costs and expenses, incurred by QTI (including but not limited to costs of -defense, investigation and reasonable attorney's fees) arising out of, resulting -from or related to: (i) any breach of this Agreement by You; and (ii) your acts, -omissions, products and services. If requested by QTI, You agree to defend QTI -in connection with any third party claims, demands, or causes of action -resulting from, arising out of or in connection with any of the foregoing. - -7. ASSIGNMENT. You shall not assign this Agreement or any right or interest -under this Agreement, nor delegate any obligation to be performed under this -Agreement, without QTI's prior written consent. For purposes of this Section 7, -an "assignment" by You under this Section shall be deemed to include, without -limitation, any merger, consolidation, sale of all or substantially all of its -assets, or any substantial change in the management or control of You. -Any attempted assignment in contravention of this Section 9 shall be void. -QTI may freely assign this Agreement or delegate any or all of its rights and -obligations hereunder to any third party. - -8. COMPLIANCE WITH LAWS; APPLICABLE LAW. You agree to comply with all -applicable local, international and national laws and regulations and with U.S. -Export Administration Regulations, as they apply to the subject matter of this -Agreement. This Agreement is governed by the laws of the State of California, -excluding California's choice of law rules. - -9. CONTRACTING PARTIES. If the Materials are downloaded on any computer owned -by a corporation or other legal entity, then this Agreement is formed by and -between QTI and such entity. The individual accepting the terms of this -Agreement represents and warrants to QTI that they have the authority to bind -such entity to the terms and conditions of this Agreement. - -10. MISCELLANEOUS PROVISIONS. This Agreement, together with all exhibits -attached hereto, which are incorporated herein by this reference, constitutes -the entire agreement between QTI and You and supersedes all prior negotiations, -representations and agreements between the parties with respect to the subject -matter hereof. No addition or modification of this Agreement shall be effective -unless made in writing and signed by the respective representatives of QTI and -You. The restrictions, limitations, exclusions and conditions set forth in this -Agreement shall apply even if QTI or any of its affiliates becomes aware of or -fails to act in a manner to address any violation or failure to comply -therewith. You hereby acknowledge and agree that the restrictions, limitations, -conditions and exclusions imposed in this Agreement on the rights granted in -this Agreement are not a derogation of the benefits of such rights. You further -acknowledges that, in the absence of such restrictions, limitations, conditions -and exclusions, QTI would not have entered into this Agreement with You. Each -party shall be responsible for and shall bear its own expenses in connection -with this Agreement. If any of the provisions of this Agreement are determined -to be invalid, illegal, or otherwise unenforceable, the remaining provisions -shall remain in full force and effect. This Agreement is entered into solely -in the English language, and if for any reason any other language version is -prepared by any party, it shall be solely for convenience and the English -version shall govern and control all aspects. If You are located in the -province of Quebec, Canada, the following applies: The Parties hereby confirm -they have requested this Agreement and all related documents be prepared -in English..
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