From ab8707e6875a9fe447ff04fad9053d7d719f89e6 Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Thu, 8 Jan 2015 18:02:44 +0000 Subject: Remove coherent memory from the BL memory maps This patch extends the build option `USE_COHERENT_MEMORY` to conditionally remove coherent memory from the memory maps of all boot loader stages. The patch also adds necessary documentation for coherent memory removal in firmware-design, porting and user guides. Fixes ARM-Software/tf-issues#106 Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773 --- bl2/aarch64/bl2_entrypoint.S | 2 ++ bl2/bl2.ld.S | 5 +++++ 2 files changed, 7 insertions(+) (limited to 'bl2') diff --git a/bl2/aarch64/bl2_entrypoint.S b/bl2/aarch64/bl2_entrypoint.S index 2f058da9..499dc373 100644 --- a/bl2/aarch64/bl2_entrypoint.S +++ b/bl2/aarch64/bl2_entrypoint.S @@ -91,9 +91,11 @@ func bl2_entrypoint ldr x1, =__BSS_SIZE__ bl zeromem16 +#if USE_COHERENT_MEM ldr x0, =__COHERENT_RAM_START__ ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ bl zeromem16 +#endif /* -------------------------------------------- * Allocate a stack whose memory will be marked diff --git a/bl2/bl2.ld.S b/bl2/bl2.ld.S index 65304de7..99333391 100644 --- a/bl2/bl2.ld.S +++ b/bl2/bl2.ld.S @@ -93,6 +93,7 @@ SECTIONS *(xlat_table) } >RAM +#if USE_COHERENT_MEM /* * The base address of the coherent memory section must be page-aligned (4K) * to guarantee that the coherent data are stored on their own pages and @@ -111,12 +112,16 @@ SECTIONS . = NEXT(4096); __COHERENT_RAM_END__ = .; } >RAM +#endif __BL2_END__ = .; __BSS_SIZE__ = SIZEOF(.bss); + +#if USE_COHERENT_MEM __COHERENT_RAM_UNALIGNED_SIZE__ = __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; +#endif ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.") } -- cgit v1.2.3