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Conflicting files:
kernel/futex.c
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Some boards set the coherent_dma_mask as 64 bits (while working
with LPAE). So we need to update coherent_dma_mask only if
it is not already set.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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HPD support is not working properly on Arndale board. Till the issue
is fixed, HPD support is disabled.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[tushar.behera@linaro.org: CID uses V4L2_CID_PRIVATE_BASE]
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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This patch adds polling mode support for i2c-s3c2410 driver.
The I2C_SATAPHY controller in exynos5250 lacks an interrupt
line and the i2c-s3c2410 driver is only interrupt driven, thus
a polling mode support is required in the driver for supporting
this controller. This patch adds this support to the driver.
The SATAPHY bus is an internal bus with I2C controller as master
and SATA PHY controller as the slave.
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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This patchset integrate the SATA patches submitted by Vasanth Ananthan.
In addition to that SATA and SATA PHY driver will use common clock
framework API.
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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The probe function of SATA phy driver is being accessed later in SATA
probe. But it gets poisoned memory during that time. Suspecting
__init attribute to be the culprit.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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This patch adds a platform driver and I2C client driver for SATA PHY controller
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
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This patch adds a platform driver for SATA controller.
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
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This patch adds SATA PHY utility framework APIs. The framework acts as an
interface between the SATA device and the PHY device. The SATA PHY device
registers itself with the framework through the APIs provided and the SATA
device finds and requests for an appropriate PHY device.
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
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The serial driver never releases the interrupt on shutdown, but it does
repeatedly acquire it on startup.
$ cat /proc/interrupts
85: 69 0 GIC exynos4210-uart.2, exynos4210-uart.2, exynos4210-uart.2
Signed-off-by: Michael O'Reilly <m@dgmo.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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The Exynos 5250 includes an architected timer which is on core and
very cheap to read.
Enabling the architected timer can lead to a significant performance
improvement for timer sensitive workloads such as TCP/IP.
It turns out that both arch_sys_counter and mct-frc have a rating of
400. On bootup, arch_sys_counter is initialized first then the
clocksource changes to mct-frc when that initialises later on.
If the rating of mct-frc is reduced below 400, then arch_sys_counter
becomes the default.
Suggested-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Inherited from arch/mips/rb532/devices.c
Example: bootargs="mac=00:40:5c:26:0a:5b"
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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While resuming from suspend, the system hangs due to some spurious
uart interrupts. This patch temporarily masks uart interrupts during
reset_port to solve this problem.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Because of the mismatch between frequencies set by u-boot and
the kernel, the soft reboot used to hang. With reboot notifier,
before rebooting, this patch switches to same frequency set by
the uboot at boot time.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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This patch enables 'scaling_available_frequencies' attribute
showing list of available frequencies.
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: KyungMin Park <kyungmin.park@samsung.com>
Signed-off-by: Dave Jones <davej@redhat.com>
[inderpal.singh@linaro.org: Updated as per common cpufreq driver]
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
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Keep time calculation in 64-bit throughout. If we have long times
between idle calculations this can result in deltas > 32 bits
which causes incorrect load percentage calculations and selecting
the wrong frequencies if we truncate here.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
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When declaring char name[9] = "cluster";
name[7] is equal to the string termination character '\0'.
But later on doing:
name[7] = cluster_id + '0';
clobbers the termination character, leaving non terminated
strings in the system and potentially causing undertermined
behavior.
By initialising name[9] to "clusterX" the 8th character is
set to '\0' and affecting the 7th character with the cluster
number doesn't overwite anything.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
[ np: The C standard says that the reminder of an initialized array of
a known size should be initialized to zero and therefore this patch is
unneeded, however this patch makes the intent more explicit to others
reading the code. ]
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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on/off
When a cpu goes down, exit would be called for it. Similarly for every cpu up
init would be called. This would result in same freq table and clk structure to
get freed/allocated again. There is no way for freq table/clk structures to
change between these calls.
Also, when we disable switcher, firstly cpufreq unregister would be called and
hence exit for all cpus and then register would be called, i.e. init would be
called.
For saving time/energy for both cases, lets not free table/clk until module exit
is not done.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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notifiers
Cpufreq driver must be unregistered/registered on switcher on/off to get correct
freq tables for all cpus. This patch does it.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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This patch adds IKS (In Kernel Switcher) support to cpufreq driver. This creates
separate freq table for A7-A15 cpu pair. A7 frequency is virtualized and is
halved, so that it touches boundaries with A7 frequencies.
Based on Earlier Work from Sudeep.
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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cpufreq_stat has registered notifiers with both cpufreq and cpu core. It adds
cpu/cpu0/cpufreq/stats/ directory with a notifier of cpufreq CPUFREQ_NOTIFY and
removes this directory with a notifier to cpu core.
On bL_switcher enable/disable, cpufreq drivers notifiers gets called and they
call cpufreq_unregister(), followed by cpufreq_register(). For unregister stats
directories per cpu aren't removed, because cpu never went to dead state and cpu
notifier isn't called.
When cpufreq_register() is called, we try to add these directories again and
that simply fails, as directories were already present.
Fix these issues by registering cpufreq_stats too with bL_switcher notifiers, so
that they get unregistered and registered on switcher enable/disable.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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The regular gic_raise_softirq() takes as input a CPU mask which is not
adequate when we need to send an IPI to a CPU which is not represented
in the kernel to GIC mapping. That is the case with the b.L switcher
when GIC migration to the inbound CPU has not yet occurred.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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In order to have early assembly code signal other CPUs in the system,
we need to get the physical address for the SGIR register used to
send IPIs. Because the register will be used with a precomputed CPU
interface ID number, there is no need for any locking in the assembly
code where this register is written to.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L
configuration. Let's allow for GIC IDs to be discovered upon switcher
initialization to support other b.L configurations such as the x1 one.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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This is required by the big.LITTLE switcher code.
The gic_migrate_target() changes the CPU interface mapping for the
current CPU to redirect SGIs to the specified interface, and it also
updates the target CPU for each interrupts to that CPU interface
if they were targeting the current interface. Finally, pending
SGIs for the current CPU are forwarded to the new interface.
Because Linux does not use it, the SGI source information for the
forwarded SGIs is not preserved. Neither is the source information
for the SGIs sent by the current CPU to other CPUs adjusted to match
the new CPU interface mapping. The required registers are banked so
only the target CPU could do it.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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Conflicts:
arch/arm/mach-vexpress/Makefile
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Conflicts:
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
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merge-linux-linaro-core-tracking
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merge-linux-linaro-core-tracking
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merge-linux-linaro-core-tracking
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commit f51e1eb63d9c28cec188337ee656a13be6980cfd upstream.
Toralf Förster reported that the cpufreq ondemand governor behaves erratically
(doesn't scale well) after a suspend/resume cycle. The problem was that the
cpufreq subsystem's idea of the cpu frequencies differed from the actual
frequencies set in the hardware after a suspend/resume cycle. Toralf bisected
the problem to commit a66b2e5 (cpufreq: Preserve sysfs files across
suspend/resume).
Among other (harmless) things, that commit skipped the call to
cpufreq_update_policy() in the resume path. But cpufreq_update_policy() plays
an important role during resume, because it is responsible for checking if
the BIOS changed the cpu frequencies behind our back and resynchronize the
cpufreq subsystem's knowledge of the cpu frequencies, and update them
accordingly.
So, restore the call to cpufreq_update_policy() in the resume path to fix
the cpufreq regression.
Reported-and-tested-by: Toralf Förster <toralf.foerster@gmx.de>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 2ee3e26c673e75c05ef8b914f54fadee3d7b9c88 upstream.
Commit 39c60a0948cc '[SCSI] sd: fix array cache flushing bug causing
performance problems' added temp as a pointer to "temporary " and used
sizeof(temp) - 1 as its length. But sizeof(temp) is the size of the
pointer, not the size of the string constant. Change temp to a static
array so that sizeof() does what was intended.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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PCI 9835 Multi-I/O Controller"
commit 828c6a102b1f2b8583fadc0e779c46b31d448f0b upstream.
This reverts commit 8d2f8cd424ca0b99001f3ff4f5db87c4e525f366.
As reported by Stefan, this device already works with the parport_serial
driver, so the 8250_pci driver should not also try to grab it as well.
Reported-by: Stefan Seyfried <stefan.seyfried@googlemail.com>
Cc: Wang YanQing <udknight@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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