blob: 1f7173d8c72cd90de61973d504b70e2e0ed94a50 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
|
/*
* include/asm-x86/cache.h
*/
#ifndef __ARCH_X86_CACHE_H
#define __ARCH_X86_CACHE_H
/* L1 cache line size */
#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define __read_mostly __section(".data.read_mostly")
#endif
|