From fe3a0b15ef9c17b8788fb5cda3fd6d98d5f6e448 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 17 Jul 2019 15:41:20 +0200 Subject: x86emul: support VPCLMULQDQ insns As to the feature dependency adjustment, while strictly speaking AVX is a sufficient prereq (to have YMM registers), 256-bit vectors of integers have got fully introduced with AVX2 only. Sadly gcc can't be used as a reference here: They don't provide any AVX512-independent built-in at all. Along the lines of PCLMULQDQ, since the insns here and in particular their memory access patterns follow the usual scheme, I didn't think it was necessary to add a contrived test specifically for them, beyond the Disp8 scaling one. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/include/asm-x86/cpufeature.h | 1 + 1 file changed, 1 insertion(+) (limited to 'xen/include/asm-x86/cpufeature.h') diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index aa2d7e7e05..eab9ecaf76 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -111,6 +111,7 @@ /* CPUID level 0x00000007:0.ecx */ #define cpu_has_avx512_vbmi boot_cpu_has(X86_FEATURE_AVX512_VBMI) #define cpu_has_avx512_vbmi2 boot_cpu_has(X86_FEATURE_AVX512_VBMI2) +#define cpu_has_vpclmulqdq boot_cpu_has(X86_FEATURE_VPCLMULQDQ) #define cpu_has_avx512_vnni boot_cpu_has(X86_FEATURE_AVX512_VNNI) #define cpu_has_avx512_bitalg boot_cpu_has(X86_FEATURE_AVX512_BITALG) #define cpu_has_avx512_vpopcntdq boot_cpu_has(X86_FEATURE_AVX512_VPOPCNTDQ) -- cgit v1.2.3