From b8fec3e3f513dccbe5e25acf325673e50614d863 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Thu, 27 Jan 2022 21:07:40 +0000 Subject: x86/cpuid: Infrastructure for cpuid word 7:2.edx While in principle it would be nice to keep leaf 7 in order, that would involve having an extra 5 words of zeros in a featureset. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit f3709b15fc86c6c6a0959cec8d97f21d0e9f9629) --- tools/misc/xen-cpuid.c | 5 +++++ xen/arch/x86/cpu/common.c | 4 ++++ xen/include/public/arch-x86/cpufeatureset.h | 2 ++ xen/include/xen/lib/x86/cpuid.h | 13 ++++++++++++- 4 files changed, 23 insertions(+), 1 deletion(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index fae84b4c69..a36aa2fae0 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -197,6 +197,10 @@ static const char *const str_7b1[32] = { }; +static const char *const str_7d2[32] = +{ +}; + static const struct { const char *name; const char *abbr; @@ -216,6 +220,7 @@ static const struct { { "0x00000007:1.eax", "7a1", str_7a1 }, { "0x80000021.eax", "e21a", str_e21a }, { "0x00000007:1.ebx", "7b1", str_7b1 }, + { "0x00000007:2.edx", "7d2", str_7d2 }, }; #define COL_ALIGN "18" diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index d4f5028fa2..c4f07f2d1d 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -447,6 +447,10 @@ static void generic_identify(struct cpuinfo_x86 *c) &c->x86_capability[FEATURESET_7a1], &c->x86_capability[FEATURESET_7b1], &tmp, &tmp); + if (max_subleaf >= 2) + cpuid_count(7, 2, + &tmp, &tmp, &tmp, + &c->x86_capability[FEATURESET_7d2]); } if (c->cpuid_level >= 0xd) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index a4b900d753..1d01b42b61 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -299,6 +299,8 @@ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ +/* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h index e87036b303..50be07c0eb 100644 --- a/xen/include/xen/lib/x86/cpuid.h +++ b/xen/include/xen/lib/x86/cpuid.h @@ -17,6 +17,7 @@ #define FEATURESET_7a1 10 /* 0x00000007:1.eax */ #define FEATURESET_e21a 11 /* 0x80000021.eax */ #define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x80000007:2.edx */ struct cpuid_leaf { @@ -82,7 +83,7 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); #define CPUID_GUEST_NR_BASIC (0xdu + 1) #define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (1u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) #define CPUID_GUEST_NR_TOPO (1u + 1) #define CPUID_GUEST_NR_XSTATE (62u + 1) #define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) @@ -193,6 +194,14 @@ struct cpuid_policy uint32_t _7b1; struct { DECL_BITFIELD(7b1); }; }; + uint32_t /* c */:32, /* d */:32; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; }; } feat; @@ -333,6 +342,7 @@ static inline void cpuid_policy_to_featureset( fs[FEATURESET_7a1] = p->feat._7a1; fs[FEATURESET_e21a] = p->extd.e21a; fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; } /* Fill in a CPUID policy from a featureset bitmap. */ @@ -352,6 +362,7 @@ static inline void cpuid_featureset_to_policy( p->feat._7a1 = fs[FEATURESET_7a1]; p->extd.e21a = fs[FEATURESET_e21a]; p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; } static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -- cgit v1.2.3