diff options
| author | Andrew Cooper <andrew.cooper3@citrix.com> | 2022-01-27 21:28:48 +0000 |
|---|---|---|
| committer | Andrew Cooper <andrew.cooper3@citrix.com> | 2022-02-04 15:45:25 +0000 |
| commit | df2e2952b8c8087988f240a08a9417aa503cbd1c (patch) | |
| tree | e2b8e898a1e9e92a80a43a1b385d51610c2e88dd /xen/include | |
| parent | 5f27e51cce99c422a7e506f9a0eeda195b767464 (diff) | |
x86/cpuid: Advertise SSB_NO to guests by default
This is a statement of hardware behaviour, and not related to controls for the
guest kernel to use. Pass it straight through from hardware.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 15b7611efd497c4b65f350483857082cb70fc348)
Diffstat (limited to 'xen/include')
| -rw-r--r-- | xen/include/public/arch-x86/cpufeatureset.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index f62c775b9d..3d45b05af2 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -264,7 +264,7 @@ XEN_CPUFEATURE(NO_LMSL, 8*32+20) /*S EFER.LMSLE no longer supported. */ XEN_CPUFEATURE(AMD_PPIN, 8*32+23) /* Protected Processor Inventory Number */ XEN_CPUFEATURE(AMD_SSBD, 8*32+24) /* MSR_SPEC_CTRL.SSBD available */ XEN_CPUFEATURE(VIRT_SSBD, 8*32+25) /* MSR_VIRT_SPEC_CTRL.SSBD */ -XEN_CPUFEATURE(SSB_NO, 8*32+26) /* Hardware not vulnerable to SSB */ +XEN_CPUFEATURE(SSB_NO, 8*32+26) /*A Hardware not vulnerable to SSB */ XEN_CPUFEATURE(PSFD, 8*32+28) /* MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:0.edx, word 9 */ |