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authorAndrew Cooper <andrew.cooper3@citrix.com>2022-01-19 19:55:02 +0000
committerAndrew Cooper <andrew.cooper3@citrix.com>2022-02-04 15:45:24 +0000
commit5f27e51cce99c422a7e506f9a0eeda195b767464 (patch)
tree91932e988b2a1d339d0cad4e2da0a6cd373cf367 /xen/include
parent47dbbe3878a002bb9bfa7ab24c0e7dc57b894ac7 (diff)
x86/msr: Fix migration compatibility issue with MSR_SPEC_CTRL
This bug existed in early in 2018 between MSR_SPEC_CTRL arriving in microcode, and SSBD arriving a few months later. It went unnoticed presumably because everyone was busy rebooting everything. The same bug will reappear when adding PSFD support. Clamp the guest MSR_SPEC_CTRL value to that permitted by CPUID on migrate. The guest is already playing with reserved bits at this point, and clamping the value will prevent a migration to a less capable host from failing. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> (cherry picked from commit 969a57f73f6b011b2ebf4c0ab1715efc65837335)
Diffstat (limited to 'xen/include')
-rw-r--r--xen/include/asm-x86/msr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index 10039c2d22..657a329561 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -277,6 +277,8 @@ static inline void wrmsr_tsc_aux(uint32_t val)
}
}
+uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp);
+
extern struct msr_policy raw_msr_policy,
host_msr_policy,
pv_max_msr_policy,