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authorAndrew Cooper <andrew.cooper3@citrix.com>2016-05-24 15:46:01 +0100
committerAndrew Cooper <andrew.cooper3@citrix.com>2017-03-27 11:49:25 +0100
commit16f2ad1fe96373c8e656365738bdae1598c40006 (patch)
tree051457c8835a94c9fd98f822da235d9d3131deb0 /xen/include/asm-x86/cpufeature.h
parentc68a88583e588f6fb987f5dcb730817512277a6a (diff)
x86/pagewalk: Helpers for reserved bit handling
Some bits are unconditionally reserved in pagetable entries, or reserved because of alignment restrictions. Other bits are reserved because of control register configuration. Introduce helpers which take an individual vcpu and guest pagetable entry, and calculates whether any reserved bits are set. While here, add a couple of newlines to aid readability. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Tim Deegan <tim@xen.org>
Diffstat (limited to 'xen/include/asm-x86/cpufeature.h')
-rw-r--r--xen/include/asm-x86/cpufeature.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h
index 5978783902..84cc51d2bd 100644
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -38,6 +38,7 @@
#define cpu_has_mtrr 1
#define cpu_has_pge 1
#define cpu_has_pat 1
+#define cpu_has_pse36 boot_cpu_has(X86_FEATURE_PSE36)
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
#define cpu_has_mmx 1
#define cpu_has_htt boot_cpu_has(X86_FEATURE_HTT)