diff options
| author | Jan Beulich <jbeulich@suse.com> | 2019-07-17 15:43:06 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-07-17 15:43:06 +0200 |
| commit | 15a3314bd68319eecd42e9fb76c555031d400525 (patch) | |
| tree | ba719f648e5312c7f1f8d5db9377cbb610bb8555 /xen/include/asm-x86/cpufeature.h | |
| parent | 86ab55603e49002d33ccba69ce74146342c67844 (diff) | |
x86emul: support GFNI insns
As to the feature dependency adjustment, while strictly speaking SSE is
a sufficient prereq (to have XMM registers), vectors of bytes and qwords
have got introduced only with SSE2. gcc, for example, uses a similar
connection in its respective intrinsics header.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Diffstat (limited to 'xen/include/asm-x86/cpufeature.h')
| -rw-r--r-- | xen/include/asm-x86/cpufeature.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 85f8382eb0..906dd59c4b 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -111,6 +111,7 @@ /* CPUID level 0x00000007:0.ecx */ #define cpu_has_avx512_vbmi boot_cpu_has(X86_FEATURE_AVX512_VBMI) #define cpu_has_avx512_vbmi2 boot_cpu_has(X86_FEATURE_AVX512_VBMI2) +#define cpu_has_gfni boot_cpu_has(X86_FEATURE_GFNI) #define cpu_has_vaes boot_cpu_has(X86_FEATURE_VAES) #define cpu_has_vpclmulqdq boot_cpu_has(X86_FEATURE_VPCLMULQDQ) #define cpu_has_avx512_vnni boot_cpu_has(X86_FEATURE_AVX512_VNNI) |