diff options
| author | Jan Beulich <jbeulich@suse.com> | 2021-03-12 12:03:06 +0100 |
|---|---|---|
| committer | Ian Jackson <iwj@xenproject.org> | 2021-03-12 17:00:30 +0000 |
| commit | 14b95b3b8546db201e7efd0636ae0e215fae98f3 (patch) | |
| tree | d17332e40405ca56aef9f61ca859ff0376468bca /xen/arch/x86/msr.c | |
| parent | 6eef0a99262cc903495879448cc4ffefe305ef2a (diff) | |
x86/AMD: expose HWCR.TscFreqSel to guests
Linux has been warning ("firmware bug") about this bit being clear for a
long time. While writable in older hardware it has been readonly on more
than just most recent hardware. For simplicitly report it always set (if
anything we may want to log the issue ourselves if it turns out to be
clear on older hardware) on CPU families 10h and up (in family 0fh the
bit is part of a larger field of different purpose).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Ian Jackson <iwj@xenproject.org>
Diffstat (limited to 'xen/arch/x86/msr.c')
| -rw-r--r-- | xen/arch/x86/msr.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 8ed0b4e982..0ebcb04259 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -315,6 +315,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) *val = msrs->tsc_aux; break; + case MSR_K8_HWCR: + if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + goto gp_fault; + *val = get_cpu_family(cp->basic.raw_fms, NULL, NULL) >= 0x10 + ? K8_HWCR_TSC_FREQ_SEL : 0; + break; + case MSR_AMD64_DE_CFG: if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; |