abel.vesa/linux.git - Abel's kernel tree

Age	Commit message (Expand)	Author
2022-12-06	cxl/pci: Remove endian confusion	Dan Williams
2022-12-06	cxl/pci: Add some type-safety to the AER trace points	Dan Williams
2022-12-05	Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl	Dan Williams
2022-12-05	cxl/port: Add RCD endpoint port enumeration	Dan Williams
2022-12-03	cxl/pci: Add callback to log AER correctable error	Dave Jiang
2022-12-03	cxl/pci: Add (hopeful) error handling support	Dan Williams
2022-12-03	cxl/pci: add tracepoint events for CXL RAS	Dave Jiang
2022-12-03	cxl/pci: Find and map the RAS Capability Structure	Dan Williams
2022-12-03	cxl/core/regs: Make cxl_map_{component, device}_regs() device generic	Dan Williams
2022-12-03	cxl/pci: Kill cxl_map_regs()	Dan Williams
2022-12-02	cxl/pmem: Refactor nvdimm device registration, delete the workqueue	Dan Williams
2022-11-14	cxl/doe: Request exclusive DOE access	Ira Weiny
2022-07-19	cxl/pci: Create PCI DOE mailbox's for memory devices	Ira Weiny
2022-07-09	cxl/mem: Convert partition-info to resources	Dan Williams
2022-05-19	cxl/mem: Consolidate CXL DVSEC Range enumeration in the core	Dan Williams
2022-05-19	cxl/pci: Move cxl_await_media_ready() to the core	Dan Williams
2022-05-19	cxl/pci: Drop wait_for_valid() from cxl_await_media_ready()	Dan Williams
2022-05-19	cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()	Dan Williams
2022-04-12	cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pci	Dan Williams
2022-04-12	cxl/pci: Add debug for DVSEC range init failures	Dan Williams
2022-04-12	cxl/mbox: Use new return_code handling	Davidlohr Bueso
2022-04-12	cxl/mbox: Improve handling of mbox_cmd hw return codes	Davidlohr Bueso
2022-04-12	cxl/pci: Use CXL_MBOX_SUCCESS to check against mbox_cmd return code	Davidlohr Bueso
2022-04-08	cxl/pci: Drop shadowed variable	Dan Williams
2022-02-08	cxl/pci: Emit device serial number	Dan Williams
2022-02-08	cxl/pci: Implement wait for media active	Ben Widawsky
2022-02-08	cxl/pci: Retrieve CXL DVSEC memory info	Ben Widawsky
2022-02-08	cxl/pci: Cache device DVSEC offset	Ben Widawsky
2022-02-08	cxl/pci: Store component register base in cxlds	Ben Widawsky
2022-02-08	cxl/pci: Rename pci.h to cxlpci.h	Dan Williams
2022-02-08	cxl/acpi: Map component registers for Root Ports	Ben Widawsky
2022-02-08	cxl: Flesh out register names	Ben Widawsky
2022-02-08	cxl/pci: Defer mailbox status checks to command timeouts	Dan Williams
2022-02-08	cxl/pci: Implement Interface Ready Timeout	Ben Widawsky
2021-11-15	cxl/memdev: Change cxl_mem to a more descriptive name	Ira Weiny
2021-10-29	cxl/pci: Use pci core's DVSEC functionality	Ben Widawsky
2021-10-29	cxl/pci: Split cxl_pci_setup_regs()	Ben Widawsky
2021-10-29	cxl/pci: Add @base to cxl_register_map	Dan Williams
2021-10-29	cxl/pci: Make more use of cxl_register_map	Ben Widawsky
2021-10-29	cxl/pci: Remove pci request/release regions	Ben Widawsky
2021-10-29	cxl/pci: Fix NULL vs ERR_PTR confusion	Dan Williams
2021-10-29	cxl/pci: Remove dev_dbg for unknown register blocks	Ben Widawsky
2021-09-21	cxl/pci: Disambiguate cxl_pci further from cxl_mem	Ben Widawsky
2021-09-21	cxl/pci: Use module_pci_driver	Dan Williams
2021-09-21	cxl/mbox: Move mailbox and other non-PCI specific infrastructure to the core	Dan Williams
2021-09-21	cxl/pci: Drop idr.h	Dan Williams
2021-09-21	cxl/mbox: Introduce the mbox_send operation	Dan Williams
2021-09-21	cxl/pci: Clean up cxl_mem_get_partition_info()	Dan Williams
2021-09-21	cxl/pci: Make 'struct cxl_mem' device type generic	Dan Williams
2021-09-07	cxl/pci: Fix debug message in cxl_probe_regs()	Li Qiang (Johnny Li)