summaryrefslogtreecommitdiff
path: root/include/drivers/mvic.h
blob: 313b484ec9b60998c26ba36b18bb4786b1f60fe3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
/*
 * Copyright (c) 2015 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef MVIC_H
#define MVIC_H

#include <arch/cpu.h>

/* Register defines. A lot of similarities to APIC, but not quite the same */
#define MVIC_TPR	0xFEE00080	/* Task priority register */
#define MVIC_PPR	0xFEE000A0	/* Process priority register */
#define MVIC_EOI	0xFEE000B0	/* End-of-interrupt register */
#define MVIC_SIVR	0xFEE000F0	/* Spurious interrupt vector register */
#define MVIC_ISR	0xFEE00110	/* In-service register */
#define MVIC_IRR	0xFEE00210	/* Interrupt request register */
#define MVIC_LVTTIMER	0xFEE00320	/* Local vector table timer register */
#define MVIC_ICR	0xFEE00380	/* Timer initial count register */
#define MVIC_CCR	0xFEE00390	/* Timer current count register */
#define MVIC_IOREGSEL	0xFEC00000	/* Register select (index) */
#define MVIC_IOWIN	0xFEC00010	/* Register windows (data) */

/* MVIC_LVTTIMER bits */
#define MVIC_LVTTIMER_MASK	BIT(16)
#define MVIC_LVTTIMER_PERIODIC	BIT(17)

/* MVIC_IOWIN bits */
#define MVIC_IOWIN_TRIGGER_LEVEL	BIT(15)
#define MVIC_IOWIN_TRIGGER_EDGE		0
#define MVIC_IOWIN_MASK			BIT(16)
#define MVIC_IOWIN_SUPPORTED_BITS_MASK	(MVIC_IOWIN_MASK | \
					 MVIC_IOWIN_TRIGGER_LEVEL)

/* MVIC IOREGSEL register usage defines */
#define MVIC_LOW_NIBBLE_MASK	0x07
#define MVIC_HIGH_NIBBLE_MASK	0x18

#define MVIC_NUM_RTES		32

#define _IRQ_TRIGGER_EDGE	MVIC_IOWIN_TRIGGER_EDGE
#define _IRQ_TRIGGER_LEVEL	MVIC_IOWIN_TRIGGER_LEVEL

/* MVIC does not support IRQ_POLARITY_HIGH or IRQ_POLARITY_LOW,
 * leave undefined
 */

#ifndef _ASMLANGUAGE
#include <stdint.h>

/* Implementation of irq_controller.h interface */

#define __IRQ_CONTROLLER_VECTOR_MAPPING(irq)	((irq) + 32)

void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
				 uint32_t flags);

int __irq_controller_isr_vector_get(void);

static inline void __irq_controller_eoi(void)
{
	*(volatile int *)(MVIC_EOI) = 0;
}

#else /* _ASMLANGUAGE */

.macro __irq_controller_eoi_macro
	xorl %eax, %eax			/* zeroes eax */
	movl %eax, MVIC_EOI		/* tell MVIC the IRQ is handled */
.endm

#endif

#endif /* MVIC_H */