summaryrefslogtreecommitdiff
path: root/drivers/pwm/Kconfig
blob: 5d90d4f9a46ade4a1df893a25b8c8d6b6c6e6405 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
# Kconfig - PWM configuration options

#
# Copyright (c) 2015 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#

menuconfig PWM
	bool "PWM (Pulse Width Modulation) Drivers"
	default n
	help
	  Enable config options for PWM drivers.

################################################
# PCA9685
################################################

config PWM_PCA9685
	bool "PCA9685 I2C-based PWM chip"
	depends on PWM && I2C
	default n
	help
	  Enable driver for PCA9685 I2C-based PWM chip.

config PWM_PCA9685_INIT_PRIORITY
	int
	depends on PWM_PCA9685
	default 70
	prompt "Init priority"
	help
	  Device driver initialization priority.

config PWM_PCA9685_0
	bool "PCA9685 PWM chip #0"
	depends on PWM_PCA9685
	default n
	help
	  Enable config options for the PCA9685 I2C-based PWM chip #0.

config PWM_PCA9685_0_DEV_NAME
	string "PCA9685 PWM chip #0 Device Name"
	depends on PWM_PCA9685_0
	default "PWM_P0"
	help
	  Specify the device name for the PCA9685 I2C-based PWM chip #0.

config PWM_PCA9685_0_I2C_ADDR
	hex "PCA9685 PWM chip #0 I2C slave address"
	depends on PWM_PCA9685_0
	default 0x0
	help
	  Specify the I2C slave address for the PCA9685 I2C-based PWM chip #0.

config PWM_PCA9685_0_I2C_MASTER_DEV_NAME
	string "I2C Master where PCA9685 PWM chip #0 is connected"
	depends on PWM_PCA9685_0
	default ""
	help
	  Specify the device name of the I2C master device to which this
	  PCA9685 chip #0 is binded.

config PWM_QMSI
	bool "QMSI PWM Driver"
	depends on QMSI_DRIVERS && PWM
	default n
	help
	  Enable QMSI PWM driver. This driver will use the QMSI library to
	  access the SOC underlying timer IP block. This driver uses the
	  DesignWare IP block that can be also handled by the PWM_DW driver

config PWM_QMSI_DEV_NAME
	string "QMSI PWM Device Name"
	depends on PWM_QMSI
	default "PWM"
	help
	  Specify the device name for the PWM driver.

config PWM_QMSI_NUM_PORTS
	int "Number of PWM ports for PWM"
	depends on PWM_QMSI
	default 1
	help
	  Specify how many PWM ports on the IP block.

config PWM_DW
	bool "DesignWare PWM"
	depends on PWM
	default n
	help
	  Enable driver to utilize PWM on the DesignWare Timer IP block.
	  Care must be taken if one is also to use the timer feature, as
	  they both use the same set of registers.

config PWM_DW_DEV_NAME
	string "DesignWare PWM Device Name"
	depends on PWM_DW
	default "PWM_DW"
	help
	  Specify the device name for the DesignWare PWM driver.

config PWM_DW_BASE_ADDR
	hex "DesignWare PWM Base Address"
	depends on PWM_DW
	help
	  Specify the base address for registers for DesignWare PWM.

config PWM_DW_NUM_PORTS
	int "Number of PWM ports for DesignWare PWM"
	depends on PWM_DW
	default 1
	help
	  Specify how many PWM ports on the IP block.

	  Default is 1.

################################################
# K64 Flex Timer Module (FTM)
################################################

config PWM_K64_FTM
	bool "PWM with Freescale K64 Flex Timer Module (FTM)"
	depends on PWM
	default n
	help
	Enable Pulse Width Modulation driver for Freescale
	K64 Flex Timer Module (FTM).

config PWM_K64_FTM_DEBUG
	bool "Enable Debugging for pwm_ftm driver"
	depends on PWM_K64_FTM
	default n
	help
	Enable debugging for pwm_ftm driver.

#### FTM0 #####

config PWM_K64_FTM_0
	bool "K64 FTM PWM Module 0"
	depends on PWM_K64_FTM
	default n
	help
	Enable config PWM options for FTM0 source module.

config PWM_K64_FTM_0_DEV_NAME
	string "K64 FTM PWM Module 0 Device Name"
	depends on PWM_K64_FTM_0
	default "PWM_K64_FTM0"
	help
	Specify the device name for the FTM0 source module.

config PWM_K64_FTM_0_REG_BASE
	hex "K64 FTM0 Register Base Address"
	depends on PWM_K64_FTM_0
	default 0x40038000
	help
	Specify the memory mapped base address of FTM0.  This is the address
	of FTM0_SC which is the first register of the module

config PWM_K64_FTM_0_PRESCALE
	int "K64 FTM0 prescale value"
	default 1
	depends on PWM_K64_FTM_0
	help
	Specify the FTM timer prescale value.  The valid values are
	1, 2, 4, 8, 16, 32, 64, or 128.

config PWM_K64_FTM_0_PERIOD
	int "K64 FTM0 period value"
	default 65535
	depends on PWM_K64_FTM_0
	help
	Specify the FTM0 PWM period in ticks

menu "K64 FTM0 Clock Source"
depends on PWM_K64_FTM_0

choice PWM_K64_FTM_0_CLOCK_SOURCE_CHOICE
	prompt "Choose the K64 FTM0 clock source"
	default PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM

config  PWM_K64_FTM_0_CLOCK_SOURCE_NONE
	bool "No clock selected (FTM counter disable)"

config  PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM
	bool "System clock"

config  PWM_K64_FTM_0_CLOCK_SOURCE_FIXED
	bool "Fixed Frequency Clock"

config  PWM_K64_FTM_0_CLOCK_SOURCE_EXTERNAL
	bool "External Clock"

config  PWM_K64_FTM_0_CLOCK_SOURCE_QUAD
	bool "Quadrature Decoder"

endchoice

endmenu

config PWM_K64_FTM_0_CLOCK_SOURCE
	int
	# Omit prompt to signify "hidden" option
	depends on PWM_K64_FTM_0
	default 0 if PWM_K64_FTM_0_CLOCK_SOURCE_NONE
	default 1 if PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM
	default 2 if PWM_K64_FTM_0_CLOCK_SOURCE_FIXED
	default 3 if PWM_K64_FTM_0_CLOCK_SOURCE_EXTERNAL
	default 4 if PWM_K64_FTM_0_CLOCK_SOURCE_QUAD
	help
	Specify K64 FTM0 clock source

config PWM_K64_FTM_0_PHASE_ENABLE_0
	bool "FTM0 Enable Phase for channel 0"
	depends on PWM_K64_FTM_0
	default n
	help
	Allow a phase offset on FTM0 channel 0.  This configures
	channels 0 and 1 to be in combine mode therefore
	channel 1 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_0_PHASE_ENABLE_2
	bool "FTM0 Enable Phase for channel 2"
	depends on PWM_K64_FTM_0
	default n
	help
	Allow a phase offset on FTM0 channel 2.  This configures
	channels 2 and 3 to be in combine mode therefore
	channel 3 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_0_PHASE_ENABLE_4
	bool "FTM0 Enable Phase for channel 4"
	depends on PWM_K64_FTM_0
	default n
	help
	Allow a phase offset on FTM0 channel 4.  This configures
	channels 4 and 5 to be in combine mode therefore
	channel 5 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_0_PHASE_ENABLE_6
	bool "FTM0 Enable Phase for channel 6"
	depends on PWM_K64_FTM_0
	default n
	help
	Allow a phase offset on FTM0 channel 6.  This configures
	channels 6 and 7 to be in combine mode therefore
	channel 7 is not valid as an output signal.
	Note: phase is an unsupported feature.

#### FTM1 #####

config PWM_K64_FTM_1
	bool "K64 FTM PWM Module 1"
	depends on PWM_K64_FTM
	default n
	help
	Enable config PWM options for FTM1 source module.

config PWM_K64_FTM_1_DEV_NAME
	string "K64 FTM PWM Module 1 Device Name"
	depends on PWM_K64_FTM_1
	default "PWM_K64_FTM1"
	help
	Specify the device name for the FTM1 source module.

config PWM_K64_FTM_1_REG_BASE
	hex "K64 FTM1 Register Base Address"
	depends on PWM_K64_FTM_1
	default 0x40039000
	help
	Specify the memory mapped base address of FTM1.  This is the address
	of FTM1_SC which is the first register of the module

config PWM_K64_FTM_1_PRESCALE
	int "FTM1 prescale value"
	default 1
	depends on PWM_K64_FTM_1
	help
	Specify the FTM1 timer prescale value.  The valid values are
	1, 2, 4, 8, 16, 32, 64, or 128

config PWM_K64_FTM_1_PERIOD
	int "FTM1 period value"
	default 65535
	depends on PWM_K64_FTM_1
	help
	Specify the FTM1 PWM period in ticks

menu "K64 FTM1 Clock Source"
depends on PWM_K64_FTM_1

choice PWM_K64_FTM_1_CLOCK_SOURCE_CHOICE
	prompt "Choose the FTM1 clock source"
	default PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM

config  PWM_K64_FTM_1_CLOCK_SOURCE_NONE
	bool "No clock selected (FTM counter disable)"

config  PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM
	bool "System clock"

config  PWM_K64_FTM_1_CLOCK_SOURCE_FIXED
	bool "Fixed Frequency Clock"

config  PWM_K64_FTM_1_CLOCK_SOURCE_EXTERNAL
	bool "External Clock"

config  PWM_K64_FTM_1_CLOCK_SOURCE_QUAD
	bool "Quadrature Decoder"

endchoice

endmenu

config PWM_K64_FTM_1_CLOCK_SOURCE
	int
	# Omit prompt to signify "hidden" option
	depends on PWM_K64_FTM_1
	default 0 if PWM_K64_FTM_1_CLOCK_SOURCE_NONE
	default 1 if PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM
	default 2 if PWM_K64_FTM_1_CLOCK_SOURCE_FIXED
	default 3 if PWM_K64_FTM_1_CLOCK_SOURCE_EXTERNAL
	default 4 if PWM_K64_FTM_1_CLOCK_SOURCE_QUAD
	help
	Specify K64 FTM1 clock source

config PWM_K64_FTM_1_PHASE_ENABLE_0
	bool "FTM1 Enable Phase for channel 0"
	depends on PWM_K64_FTM_1
	default n
	help
	Allow a phase offset on FTM1 channel 0.  This configures
	channels 0 and 1 to be in combine mode therefore
	channel 1 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_FTM_1_PHASE_ENABLE_2
	bool "FTM1 Enable Phase for channel 2"
	depends on PWM_K64_FTM_1
	default n
	help
	Allow a phase offset on FTM1 channel 2.  This configures
	channels 2 and 3 to be in combine mode therefore
	channel 3 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_FTM_1_PHASE_ENABLE_4
	bool "FTM1 Enable Phase for channel 4"
	depends on PWM_K64_FTM_1
	default n
	help
	Allow a phase offset on FTM1 channel 4.  This configures
	channels 4 and 5 to be in combine mode therefore
	channel 5 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_FTM_1_PHASE_ENABLE_6
	bool "FTM1 Enable Phase for channel 6"
	depends on PWM_K64_FTM_1
	default n
	help
	Allow a phase offset on FTM1 channel 6.  This configures
	channels 6 and 7 to be in combine mode therefore
	channel 7 is not valid as an output signal.
	Note: phase is an unsupported feature.

#### FTM2 #####

config PWM_K64_FTM_2
	bool "K64 FTM PWM Module 2"
	depends on PWM_K64_FTM
	default n
	help
	Enable config PWM options for FTM2 source module.

config PWM_K64_FTM_2_DEV_NAME
	string "K64 FTM PWM Module 2 Device Name"
	depends on PWM_K64_FTM_2
	default "PWM_K64_FTM2"
	help
	Specify the device name for the FTM2 source module.

config PWM_K64_FTM_2_REG_BASE
	hex "K64 FTM2 Register Base Address"
	depends on PWM_K64_FTM_2
	default 0x4003A000
	help
	Specify the memory mapped base address of FTM2.  This is the address
	of FTM2_SC which is the first register of the module

config PWM_K64_FTM_2_PRESCALE
	int "FTM2 prescale value"
	default 1
	depends on PWM_K64_FTM_2
	help
	Specify the FTM2 timer prescale value.  The valid values are
	1, 2, 4, 8, 16, 32, 64, or 128

config PWM_K64_FTM_2_PERIOD
	int "FTM2 period value"
	default 65535
	depends on PWM_K64_FTM_2
	help
	Specify the FTM2 PWM period in ticks

menu "K64 FTM2 Clock Source"
depends on PWM_K64_FTM_2

choice PWM_K64_FTM_2_CLOCK_SOURCE_CHOICE
	prompt "Choose the FTM2 clock source"
	default PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM

config  PWM_K64_FTM_2_CLOCK_SOURCE_NONE
	bool "No clock selected (FTM counter disable)"

config  PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM
	bool "System clock"

config  PWM_K64_FTM_2_CLOCK_SOURCE_FIXED
	bool "Fixed Frequency Clock"

config  PWM_K64_FTM_2_CLOCK_SOURCE_EXTERNAL
	bool "External Clock"

config  PWM_K64_FTM_2_CLOCK_SOURCE_QUAD
	bool "Quadrature Decoder"

endchoice

endmenu

config PWM_K64_FTM_2_CLOCK_SOURCE
	int
	# Omit prompt to signify "hidden" option
	depends on PWM_K64_FTM_2
	default 0 if PWM_K64_FTM_2_CLOCK_SOURCE_NONE
	default 1 if PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM
	default 2 if PWM_K64_FTM_2_CLOCK_SOURCE_FIXED
	default 3 if PWM_K64_FTM_2_CLOCK_SOURCE_EXTERNAL
	default 4 if PWM_K64_FTM_2_CLOCK_SOURCE_QUAD
	help
	Specify K64 FTM2 clock source

config PWM_K64_FTM_2_PHASE_ENABLE_0
	bool "FTM2 Enable Phase for channel 0"
	depends on PWM_K64_FTM_2
	default n
	help
	Allow a phase offset on FTM2 channel 0.  This configures
	channels 0 and 1 to be in combine mode therefore
	channel 1 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_2_PHASE_ENABLE_2
	bool "FTM2 Enable Phase for channel 2"
	depends on PWM_K64_FTM_2
	default n
	help
	Allow a phase offset on FTM2 channel 2.  This configures
	channels 2 and 3 to be in combine mode therefore
	channel 3 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_2_PHASE_ENABLE_4
	bool "FTM2 Enable Phase for channel 4"
	depends on PWM_K64_FTM_2
	default n
	help
	Allow a phase offset on FTM2 channel 4.  This configures
	channels 4 and 5 to be in combine mode therefore
	channel 5 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_2_PHASE_ENABLE_6
	bool "FTM2 Enable Phase for channel 6"
	depends on PWM_K64_FTM_2
	default n
	help
	Allow a phase offset on FTM2 channel 6.  This configures
	channels 6 and 7 to be in combine mode therefore
	channel 7 is not valid as an output signal.
	Note: phase is an unsupported feature.

#### FTM3 #####

config PWM_K64_FTM_3
	bool "K64 FTM PWM Module 3"
	depends on PWM_K64_FTM
	default n
	help
	Enable config PWM options for K64 FTM3 source module.

config PWM_K64_FTM_3_DEV_NAME
	string "K64 FTM PWM Module 3 Device Name"
	depends on PWM_K64_FTM_3
	default "PWM_K64_FTM3"
	help
	Specify the device name for the FTM3 source module.

config PWM_K64_FTM_3_REG_BASE
	hex "K64 FTM3 Register Base Address"
	depends on PWM_K64_FTM_3
	default 0x400B9000
	help
	Specify the memory mapped base address of FTM3.  This is the address
	of FTM3_SC which is the first register of the module

config PWM_K64_FTM_3_PRESCALE
	int "FTM3 prescale value"
	default 3
	depends on PWM_K64_FTM_3
	help
	Specify the FTM timer prescale value.  The valid values are
	1, 2, 4, 8, 16, 32, 64, or 128

config PWM_K64_FTM_3_PERIOD
	int "FTM3 period value"
	default 65535
	depends on PWM_K64_FTM_3
	help
	Specify the FTM3 PWM period in ticks

menu "K64 FTM3 Clock Source"
depends on PWM_K64_FTM_3

choice PWM_K64_FTM_3_CLOCK_SOURCE_CHOICE
	prompt "Choose the FTM3 clock source"
	default PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM

config  PWM_K64_FTM_3_CLOCK_SOURCE_NONE
	bool "No clock selected (FTM counter disable)"

config  PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM
	bool "System clock"

config  PWM_K64_FTM_3_CLOCK_SOURCE_FIXED
	bool "Fixed Frequency Clock"

config  PWM_K64_FTM_3_CLOCK_SOURCE_EXTERNAL
	bool "External Clock"

config  PWM_K64_FTM_3_CLOCK_SOURCE_QUAD
	bool "Quadrature Decoder"

endchoice

endmenu

config PWM_K64_FTM_3_CLOCK_SOURCE
	int
	# Omit prompt to signify "hidden" option
	depends on PWM_K64_FTM_3
	default 0 if PWM_K64_FTM_3_CLOCK_SOURCE_NONE
	default 1 if PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM
	default 2 if PWM_K64_FTM_3_CLOCK_SOURCE_FIXED
	default 3 if PWM_K64_FTM_3_CLOCK_SOURCE_EXTERNAL
	default 4 if PWM_K64_FTM_3_CLOCK_SOURCE_QUAD
	help
	Specify K64 FTM3 clock source

config PWM_K64_FTM_3_PHASE_ENABLE_0
	bool "FTM3 Enable Phase for channel 0"
	depends on PWM_K64_FTM_3
	default n
	help
	Allow a phase offset on FTM3 channel 0.  This configures
	channels 0 and 1 to be in combine mode therefore
	channel 1 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_3_PHASE_ENABLE_2
	bool "FTM3 Enable Phase for channel 2"
	depends on PWM_K64_FTM_3
	default n
	help
	Allow a phase offset on FTM3 channel 2.  This configures
	channels 2 and 3 to be in combine mode therefore
	channel 3 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_3_PHASE_ENABLE_4
	bool "FTM3 Enable Phase for channel 4"
	depends on PWM_K64_FTM_3
	default n
	help
	Allow a phase offset on FTM3 channel 4.  This configures
	channels 4 and 5 to be in combine mode therefore
	channel 5 is not valid as an output signal.
	Note: phase is an unsupported feature.

config PWM_K64_FTM_3_PHASE_ENABLE_6
	bool "FTM3 Enable Phase for channel 6"
	depends on PWM_K64_FTM_3
	default n
	help
	Allow a phase offset on FTM3 channel 6.  This configures
	channels 6 and 7 to be in combine mode therefore
	channel 7 is not valid as an output signal.
	Note: phase is an unsupported feature.