spi/k64: remove SoC specific SPI constants from kconfig

The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.

Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>

3 files changed, 41 insertions, 108 deletions

diff --git a/arch/arm/soc/fsl_frdm_k64f/soc.h b/arch/arm/soc/fsl_frdm_k64f/soc.h
index 36f7b1022..bcc002dd8 100644
--- a/arch/arm/soc/fsl_frdm_k64f/soc.h
+++ b/arch/arm/soc/fsl_frdm_k64f/soc.h
@@ -213,6 +213,32 @@ extern "C" {
 #define PORT_K64_D_BASE_ADDR	0x4004C000
 #define PORT_K64_E_BASE_ADDR	0x4004D000
 
+/*
+ * SPI configuration settings
+ */
+#if defined(CONFIG_SPI_K64)
+
+#define SPI_K64_0_BASE_ADDR		0x4002C000
+#define SPI_K64_0_IRQ			IRQ_SPI0
+#define SPI_K64_0_PCS_NUM		6
+#define SPI_K64_0_CLK_GATE_REG_ADDR	0x4004803C
+#define SPI_K64_0_CLK_GATE_REG_BIT	12
+
+#define SPI_K64_1_BASE_ADDR		0x4002D000
+#define SPI_K64_1_IRQ			IRQ_SPI1
+#define SPI_K64_1_PCS_NUM		4
+#define SPI_K64_1_CLK_GATE_REG_ADDR	0x4004803C
+#define SPI_K64_1_CLK_GATE_REG_BIT	13
+
+#define SPI_K64_2_BASE_ADDR		0x400AC000
+#define SPI_K64_2_IRQ			IRQ_SPI2
+#define SPI_K64_2_PCS_NUM		2
+#define SPI_K64_2_CLK_GATE_REG_ADDR	0x40048030
+#define SPI_K64_2_CLK_GATE_REG_BIT	12
+
+#endif /* CONFIG_SPI_K64 */
+
+
 #endif /* !_ASMLANGUAGE */
 
 #ifdef __cplusplus
diff --git a/drivers/spi/Kconfig.k64 b/drivers/spi/Kconfig.k64
index 98d0a5a91..00c052ddb 100644
--- a/drivers/spi/Kconfig.k64
+++ b/drivers/spi/Kconfig.k64
@@ -41,37 +41,6 @@ config SPI_K64_0_DEV_NAME
 	help
 	  Specify the device name.
 
-config SPI_K64_0_BASE_ADDR
-	hex "Freescale K64-based SPI Module 0 base address"
-	depends on SPI_K64_0
-	default 0x4002C000
-
-config SPI_K64_0_PCS_NUM
-	int "Freescale K64-based SPI Module 0 peripheral chip selects"
-	depends on SPI_K64_0
-	default 6
-	help
-	  Number of peripheral chip selects for K64 SPI Module 0
-
-config SPI_K64_0_CLK_GATE_REG_ADDR
-	hex "Freescale K64-based SPI Module 0 clock gate register address"
-	depends on SPI_K64_0
-	default 0x4004803C
-
-config SPI_K64_0_CLK_GATE_REG_BIT
-	int "Freescale K64-based SPI Module 0 clock gate register bit"
-	depends on SPI_K64_0
-	default 12
-	help
-	  Bit position enable bit in the clock gate register for K64 SPI Module 0
-
-config SPI_K64_0_IRQ
-	int "Freescale K64-based SPI Module 0 interrupt number"
-	depends on SPI_K64_0
-	default 26
-	help
-	  K64 SPI Module 0 IRQ number for the interrupt controller
-
 config SPI_K64_0_PRI
 	int "Freescale K64-based SPI Module 0 interrupt priority"
 	depends on SPI_K64_0
@@ -93,37 +62,6 @@ config SPI_K64_1_DEV_NAME
 	help
 	  Specify the device name.
 
-config SPI_K64_1_BASE_ADDR
-	hex "Freescale K64-based SPI Module 1 base address"
-	depends on SPI_K64_1
-	default 0x4002D000
-
-config SPI_K64_1_PCS_NUM
-	int "Freescale K64-based SPI Module 1 peripheral chip selects"
-	depends on SPI_K64_1
-	default 4
-	help
-	  Number of peripheral chip selects for K64 SPI Module 1
-
-config SPI_K64_1_CLK_GATE_REG_ADDR
-	hex "Freescale K64-based SPI Module 1 clock gate register address"
-	depends on SPI_K64_1
-	default 0x4004803C
-
-config SPI_K64_1_CLK_GATE_REG_BIT
-	int "Freescale K64-based SPI Module 0 clock gate register bit"
-	depends on SPI_K64_1
-	default 13
-	help
-	  Bit position enable bit in the clock gate register for K64 SPI Module 1
-
-config SPI_K64_1_IRQ
-	int "Freescale K64-based SPI Module 1 interrupt number"
-	depends on SPI_K64_1
-	default 27
-	help
-	  K64 SPI Module 1 IRQ number for the interrupt controller
-
 config SPI_K64_1_PRI
 	int "Freescale K64-based SPI Module 1 interrupt priority"
 	depends on SPI_K64_1
@@ -145,37 +83,6 @@ config SPI_K64_2_DEV_NAME
 	help
 	  Specify the device name.
 
-config SPI_K64_2_BASE_ADDR
-	hex "Freescale K64-based SPI Module 2 base address"
-	depends on SPI_K64_2
-	default 0x400AC000
-
-config SPI_K64_2_PCS_NUM
-	int "Freescale K64-based SPI Module 2 peripheral chip selects"
-	depends on SPI_K64_2
-	default 2
-	help
-	  Number of peripheral chip selects for K64 SPI Module 2
-
-config SPI_K64_2_CLK_GATE_REG_ADDR
-	hex "Freescale K64-based SPI Module 2 clock gate register address"
-	depends on SPI_K64_2
-	default 0x40048030
-
-config SPI_K64_2_CLK_GATE_REG_BIT
-	int "Freescale K64-based SPI Module 2 clock gate register bit"
-	depends on SPI_K64_2
-	default 12
-	help
-	  Bit position enable bit in the clock gate register for K64 SPI Module 2
-
-config SPI_K64_2_IRQ
-	int "Freescale K64-based SPI Module 2 interrupt number"
-	depends on SPI_K64_2
-	default 65
-	help
-	  K64 SPI Module 2 IRQ number for the interrupt controller
-
 config SPI_K64_2_PRI
 	int "Freescale K64-based SPI Module 2 interrupt priority"
 	depends on SPI_K64_2
diff --git a/drivers/spi/spi_k64.c b/drivers/spi/spi_k64.c
index a1dcc0b36..6d1837c91 100644
--- a/drivers/spi/spi_k64.c
+++ b/drivers/spi/spi_k64.c
@@ -1040,10 +1040,10 @@ void spi_config_0_irq(void);
 struct spi_k64_data spi_k64_data_port_0;
 
 struct spi_k64_config spi_k64_config_0 = {
-	.regs = CONFIG_SPI_K64_0_BASE_ADDR,
-	.clk_gate_reg = CONFIG_SPI_K64_0_CLK_GATE_REG_ADDR,
-	.clk_gate_bit = CONFIG_SPI_K64_0_CLK_GATE_REG_BIT,
-	.irq = CONFIG_SPI_K64_0_IRQ,
+	.regs = SPI_K64_0_BASE_ADDR,
+	.clk_gate_reg = SPI_K64_0_CLK_GATE_REG_ADDR,
+	.clk_gate_bit = SPI_K64_0_CLK_GATE_REG_BIT,
+	.irq = SPI_K64_0_IRQ,
 	.config_func = spi_config_0_irq
 };
 
@@ -1054,7 +1054,7 @@ DEVICE_INIT(spi_k64_port_0, CONFIG_SPI_K64_0_DEV_NAME, spi_k64_init,
 
 void spi_config_0_irq(void)
 {
-	IRQ_CONNECT(CONFIG_SPI_K64_0_IRQ, CONFIG_SPI_K64_0_PRI,
+	IRQ_CONNECT(SPI_K64_0_IRQ, CONFIG_SPI_K64_0_PRI,
 		    spi_k64_isr, DEVICE_GET(spi_k64_port_0), 0);
 }
 
@@ -1068,10 +1068,10 @@ void spi_config_1_irq(void);
 struct spi_k64_data spi_k64_data_port_1;
 
 struct spi_k64_config spi_k64_config_1 = {
-	.regs = CONFIG_SPI_K64_1_BASE_ADDR,
-	.clk_gate_reg = CONFIG_SPI_K64_1_CLK_GATE_REG_ADDR,
-	.clk_gate_bit = CONFIG_SPI_K64_1_CLK_GATE_REG_BIT,
-	.irq = CONFIG_SPI_K64_1_IRQ,
+	.regs = SPI_K64_1_BASE_ADDR,
+	.clk_gate_reg = SPI_K64_1_CLK_GATE_REG_ADDR,
+	.clk_gate_bit = SPI_K64_1_CLK_GATE_REG_BIT,
+	.irq = SPI_K64_1_IRQ,
 	.config_func = spi_config_1_irq
 };
 
@@ -1082,7 +1082,7 @@ DEVICE_INIT(spi_k64_port_1, CONFIG_SPI_K64_1_DEV_NAME, spi_k64_init,
 
 void spi_config_1_irq(void)
 {
-	IRQ_CONNECT(CONFIG_SPI_K64_1_IRQ, CONFIG_SPI_K64_1_PRI,
+	IRQ_CONNECT(SPI_K64_1_IRQ, CONFIG_SPI_K64_1_PRI,
 		    spi_k64_isr, DEVICE_GET(spi_k64_port_1), 0);
 }
 
@@ -1096,10 +1096,10 @@ void spi_config_2_irq(void);
 struct spi_k64_data spi_k64_data_port_2;
 
 struct spi_k64_config spi_k64_config_2 = {
-	.regs = CONFIG_SPI_K64_2_BASE_ADDR,
-	.clk_gate_reg = CONFIG_SPI_K64_2_CLK_GATE_REG_ADDR,
-	.clk_gate_bit = CONFIG_SPI_K64_2_CLK_GATE_REG_BIT,
-	.irq = CONFIG_SPI_K64_2_IRQ,
+	.regs = SPI_K64_2_BASE_ADDR,
+	.clk_gate_reg = SPI_K64_2_CLK_GATE_REG_ADDR,
+	.clk_gate_bit = SPI_K64_2_CLK_GATE_REG_BIT,
+	.irq = SPI_K64_2_IRQ,
 	.config_func = spi_config_2_irq
 };
 
@@ -1110,7 +1110,7 @@ DEVICE_INIT(spi_k64_port_2, CONFIG_SPI_K64_2_DEV_NAME, spi_k64_init,
 
 void spi_config_2_irq(void)
 {
-	IRQ_CONNECT(CONFIG_SPI_K64_2_IRQ, CONFIG_SPI_K64_2_PRI,
+	IRQ_CONNECT(SPI_K64_2_IRQ, CONFIG_SPI_K64_2_PRI,
 		    spi_k64_isr, DEVICE_GET(spi_k64_port_2), 0);
 }