diff options
| author | Benjamin Walsh <benjamin.walsh@windriver.com> | 2016-11-24 11:52:21 -0500 |
|---|---|---|
| committer | Anas Nashif <anas.nashif@intel.com> | 2016-11-28 16:00:04 -0500 |
| commit | 3d37868d09f901615d4f3314db8fd675e1651258 (patch) | |
| tree | 20421570c4688357d7cdc54599118e7d72b874de | |
| parent | 98a001e1f8335fb4098279de271ca9882fb18504 (diff) | |
arm: fix bug when Zero Latency Interrupts are enabled
An IRQ would always register as a ZIL interrupt.
Change-Id: If82a85f472a60512745652aacc7e8b7dfacaa268
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
| -rw-r--r-- | arch/arm/core/irq_manage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/core/irq_manage.c b/arch/arm/core/irq_manage.c index 39dd41464..58c0b62a5 100644 --- a/arch/arm/core/irq_manage.c +++ b/arch/arm/core/irq_manage.c @@ -100,7 +100,7 @@ void _irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) * Our policy is to express priority levels with special properties * via flags */ - if (flags | IRQ_ZERO_LATENCY) { + if (flags & IRQ_ZERO_LATENCY) { prio = 2; } else { prio += IRQ_PRIORITY_OFFSET; |