py/asmthumb: Make ARMv7-M instruction use dynamically selectable.

This commit adjusts the asm_thumb_xxx functions so they can be dynamically
configured to use ARMv7-M instructions or not.  This is available when
MICROPY_DYNAMIC_COMPILER is enabled, and then controlled by the value of
mp_dynamic_compiler.native_arch.

If MICROPY_DYNAMIC_COMPILER is disabled the previous behaviour is retained:
the functions emit ARMv7-M instructions only if MICROPY_EMIT_THUMB_ARMV7M
is enabled.

Signed-off-by: Damien George <damien@micropython.org>

1 files changed, 88 insertions, 111 deletions

diff --git a/py/asmthumb.c b/py/asmthumb.c
index 5257884b5..8d47575e9 100644
--- a/py/asmthumb.c
+++ b/py/asmthumb.c
@@ -34,7 +34,6 @@
 #if MICROPY_EMIT_THUMB || MICROPY_EMIT_INLINE_THUMB
 
 #include "py/mpstate.h"
-#include "py/persistentcode.h"
 #include "py/asmthumb.h"
 
 #define UNSIGNED_FIT5(x) ((uint32_t)(x) < 32)
@@ -46,7 +45,6 @@
 #define SIGNED_FIT12(x) (((x) & 0xfffff800) == 0) || (((x) & 0xfffff800) == 0xfffff800)
 #define SIGNED_FIT23(x) (((x) & 0xffc00000) == 0) || (((x) & 0xffc00000) == 0xffc00000)
 
-#if MICROPY_EMIT_THUMB_ARMV7M
 // Note: these actually take an imm12 but the high-bit is not encoded here
 #define OP_ADD_W_RRI_HI(reg_src) (0xf200 | (reg_src))
 #define OP_ADD_W_RRI_LO(reg_dest, imm11) ((imm11 << 4 & 0x7000) | reg_dest << 8 | (imm11 & 0xff))
@@ -58,7 +56,6 @@
 
 #define OP_LDRH_W_HI(reg_base) (0xf8b0 | (reg_base))
 #define OP_LDRH_W_LO(reg_dest, imm12) ((reg_dest) << 12 | (imm12))
-#endif
 
 static inline byte *asm_thumb_get_cur_to_write_bytes(asm_thumb_t *as, int n) {
     return mp_asm_base_get_cur_to_write_bytes(&as->base, n);
@@ -161,21 +158,21 @@ void asm_thumb_entry(asm_thumb_t *as, int num_locals) {
     }
     asm_thumb_op16(as, OP_PUSH_RLIST_LR(reglist));
     if (stack_adjust > 0) {
-        #if MICROPY_EMIT_THUMB_ARMV7M
-        if (UNSIGNED_FIT7(stack_adjust)) {
-            asm_thumb_op16(as, OP_SUB_SP(stack_adjust));
+        if (asm_thumb_allow_armv7m(as)) {
+            if (UNSIGNED_FIT7(stack_adjust)) {
+                asm_thumb_op16(as, OP_SUB_SP(stack_adjust));
+            } else {
+                asm_thumb_op32(as, OP_SUB_W_RRI_HI(ASM_THUMB_REG_SP), OP_SUB_W_RRI_LO(ASM_THUMB_REG_SP, stack_adjust * 4));
+            }
         } else {
-            asm_thumb_op32(as, OP_SUB_W_RRI_HI(ASM_THUMB_REG_SP), OP_SUB_W_RRI_LO(ASM_THUMB_REG_SP, stack_adjust * 4));
-        }
-        #else
-        int adj = stack_adjust;
-        // we don't expect the stack_adjust to be massive
-        while (!UNSIGNED_FIT7(adj)) {
-            asm_thumb_op16(as, OP_SUB_SP(127));
-            adj -= 127;
+            int adj = stack_adjust;
+            // we don't expect the stack_adjust to be massive
+            while (!UNSIGNED_FIT7(adj)) {
+                asm_thumb_op16(as, OP_SUB_SP(127));
+                adj -= 127;
+            }
+            asm_thumb_op16(as, OP_SUB_SP(adj));
         }
-        asm_thumb_op16(as, OP_SUB_SP(adj));
-        #endif
     }
     as->push_reglist = reglist;
     as->stack_adjust = stack_adjust;
@@ -183,21 +180,21 @@ void asm_thumb_entry(asm_thumb_t *as, int num_locals) {
 
 void asm_thumb_exit(asm_thumb_t *as) {
     if (as->stack_adjust > 0) {
-        #if MICROPY_EMIT_THUMB_ARMV7M
-        if (UNSIGNED_FIT7(as->stack_adjust)) {
-            asm_thumb_op16(as, OP_ADD_SP(as->stack_adjust));
+        if (asm_thumb_allow_armv7m(as)) {
+            if (UNSIGNED_FIT7(as->stack_adjust)) {
+                asm_thumb_op16(as, OP_ADD_SP(as->stack_adjust));
+            } else {
+                asm_thumb_op32(as, OP_ADD_W_RRI_HI(ASM_THUMB_REG_SP), OP_ADD_W_RRI_LO(ASM_THUMB_REG_SP, as->stack_adjust * 4));
+            }
         } else {
-            asm_thumb_op32(as, OP_ADD_W_RRI_HI(ASM_THUMB_REG_SP), OP_ADD_W_RRI_LO(ASM_THUMB_REG_SP, as->stack_adjust * 4));
-        }
-        #else
-        int adj = as->stack_adjust;
-        // we don't expect the stack_adjust to be massive
-        while (!UNSIGNED_FIT7(adj)) {
-            asm_thumb_op16(as, OP_ADD_SP(127));
-            adj -= 127;
+            int adj = as->stack_adjust;
+            // we don't expect the stack_adjust to be massive
+            while (!UNSIGNED_FIT7(adj)) {
+                asm_thumb_op16(as, OP_ADD_SP(127));
+                adj -= 127;
+            }
+            asm_thumb_op16(as, OP_ADD_SP(adj));
         }
-        asm_thumb_op16(as, OP_ADD_SP(adj));
-        #endif
     }
     asm_thumb_op16(as, OP_POP_RLIST_PC(as->push_reglist));
 }
@@ -251,27 +248,19 @@ void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src) {
     asm_thumb_op16(as, 0x4600 | op_lo);
 }
 
-#if MICROPY_EMIT_THUMB_ARMV7M
-
 // if loading lo half with movw, the i16 value will be zero extended into the r32 register!
-size_t asm_thumb_mov_reg_i16(asm_thumb_t *as, uint mov_op, uint reg_dest, int i16_src) {
+void asm_thumb_mov_reg_i16(asm_thumb_t *as, uint mov_op, uint reg_dest, int i16_src) {
     assert(reg_dest < ASM_THUMB_REG_R15);
-    size_t loc = mp_asm_base_get_code_pos(&as->base);
     // mov[wt] reg_dest, #i16_src
     asm_thumb_op32(as, mov_op | ((i16_src >> 1) & 0x0400) | ((i16_src >> 12) & 0xf), ((i16_src << 4) & 0x7000) | (reg_dest << 8) | (i16_src & 0xff));
-    return loc;
 }
 
-#else
-
-void asm_thumb_mov_rlo_i16(asm_thumb_t *as, uint rlo_dest, int i16_src) {
+static void asm_thumb_mov_rlo_i16(asm_thumb_t *as, uint rlo_dest, int i16_src) {
     asm_thumb_mov_rlo_i8(as, rlo_dest, (i16_src >> 8) & 0xff);
     asm_thumb_lsl_rlo_rlo_i5(as, rlo_dest, rlo_dest, 8);
     asm_thumb_add_rlo_i8(as, rlo_dest, i16_src & 0xff);
 }
 
-#endif
-
 #define OP_B_N(byte_offset) (0xe000 | (((byte_offset) >> 1) & 0x07ff))
 
 bool asm_thumb_b_n_label(asm_thumb_t *as, uint label) {
@@ -295,14 +284,12 @@ bool asm_thumb_bcc_nw_label(asm_thumb_t *as, int cond, uint label, bool wide) {
     if (!wide) {
         asm_thumb_op16(as, OP_BCC_N(cond, rel));
         return as->base.pass != MP_ASM_PASS_EMIT || SIGNED_FIT9(rel);
-    } else {
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    } else if (asm_thumb_allow_armv7m(as)) {
         asm_thumb_op32(as, OP_BCC_W_HI(cond, rel), OP_BCC_W_LO(rel));
         return true;
-        #else
+    } else {
         // this method should not be called for ARMV6M
         return false;
-        #endif
     }
 }
 
@@ -323,30 +310,30 @@ size_t asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, mp_uint_t i32) {
 
     size_t loc = mp_asm_base_get_code_pos(&as->base);
 
-    #if MICROPY_EMIT_THUMB_ARMV7M
-    asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, reg_dest, i32);
-    asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVT, reg_dest, i32 >> 16);
-    #else
-    // should only be called with lo reg for ARMV6M
-    assert(reg_dest < ASM_THUMB_REG_R8);
-
-    // sanity check that generated code is aligned
-    assert(!as->base.code_base || !(3u & (uintptr_t)as->base.code_base));
-
-    // basically:
-    //        (nop)
-    //        ldr reg_dest, _data
-    //        b 1f
-    // _data: .word i32
-    //  1:
-    if (as->base.code_offset & 2u) {
-        asm_thumb_op16(as, ASM_THUMB_OP_NOP);
+    if (asm_thumb_allow_armv7m(as)) {
+        asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, reg_dest, i32);
+        asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVT, reg_dest, i32 >> 16);
+    } else {
+        // should only be called with lo reg for ARMV6M
+        assert(reg_dest < ASM_THUMB_REG_R8);
+
+        // sanity check that generated code is aligned
+        assert(!as->base.code_base || !(3u & (uintptr_t)as->base.code_base));
+
+        // basically:
+        //        (nop)
+        //        ldr reg_dest, _data
+        //        b 1f
+        // _data: .word i32
+        //  1:
+        if (as->base.code_offset & 2u) {
+            asm_thumb_op16(as, ASM_THUMB_OP_NOP);
+        }
+        asm_thumb_ldr_rlo_pcrel_i8(as, reg_dest, 0);
+        asm_thumb_op16(as, OP_B_N(2));
+        asm_thumb_op16(as, i32 & 0xffff);
+        asm_thumb_op16(as, i32 >> 16);
     }
-    asm_thumb_ldr_rlo_pcrel_i8(as, reg_dest, 0);
-    asm_thumb_op16(as, OP_B_N(2));
-    asm_thumb_op16(as, i32 & 0xffff);
-    asm_thumb_op16(as, i32 >> 16);
-    #endif
 
     return loc;
 }
@@ -354,14 +341,13 @@ size_t asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, mp_uint_t i32) {
 void asm_thumb_mov_reg_i32_optimised(asm_thumb_t *as, uint reg_dest, int i32) {
     if (reg_dest < 8 && UNSIGNED_FIT8(i32)) {
         asm_thumb_mov_rlo_i8(as, reg_dest, i32);
-    } else {
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    } else if (asm_thumb_allow_armv7m(as)) {
         if (UNSIGNED_FIT16(i32)) {
             asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, reg_dest, i32);
         } else {
             asm_thumb_mov_reg_i32(as, reg_dest, i32);
         }
-        #else
+    } else {
         uint rlo_dest = reg_dest;
         assert(rlo_dest < ASM_THUMB_REG_R8); // should never be called for ARMV6M
 
@@ -389,7 +375,6 @@ void asm_thumb_mov_reg_i32_optimised(asm_thumb_t *as, uint reg_dest, int i32) {
         if (negate) {
             asm_thumb_neg_rlo_rlo(as, rlo_dest, rlo_dest);
         }
-        #endif
     }
 }
 
@@ -432,27 +417,25 @@ void asm_thumb_mov_reg_pcrel(asm_thumb_t *as, uint rlo_dest, uint label) {
     mp_uint_t dest = get_label_dest(as, label);
     mp_int_t rel = dest - as->base.code_offset;
     rel |= 1; // to stay in Thumb state when jumping to this address
-    #if MICROPY_EMIT_THUMB_ARMV7M
-    rel -= 6 + 4; // adjust for mov_reg_i16, sxth_rlo_rlo and then PC+4 prefetch of add_reg_reg
-    asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, rlo_dest, rel); // 4 bytes
-    asm_thumb_sxth_rlo_rlo(as, rlo_dest, rlo_dest); // 2 bytes
-    #else
-    rel -= 8 + 4; // adjust for four instructions and then PC+4 prefetch of add_reg_reg
-    // 6 bytes
-    asm_thumb_mov_rlo_i16(as, rlo_dest, rel);
-    // 2 bytes - not always needed, but we want to keep the size the same
-    asm_thumb_sxth_rlo_rlo(as, rlo_dest, rlo_dest);
-    #endif
+    if (asm_thumb_allow_armv7m(as)) {
+        rel -= 6 + 4; // adjust for mov_reg_i16, sxth_rlo_rlo and then PC+4 prefetch of add_reg_reg
+        asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, rlo_dest, rel); // 4 bytes
+        asm_thumb_sxth_rlo_rlo(as, rlo_dest, rlo_dest); // 2 bytes
+    } else {
+        rel -= 8 + 4; // adjust for four instructions and then PC+4 prefetch of add_reg_reg
+        // 6 bytes
+        asm_thumb_mov_rlo_i16(as, rlo_dest, rel);
+        // 2 bytes - not always needed, but we want to keep the size the same
+        asm_thumb_sxth_rlo_rlo(as, rlo_dest, rlo_dest);
+    }
     asm_thumb_add_reg_reg(as, rlo_dest, ASM_THUMB_REG_R15); // 2 bytes
 }
 
-#if MICROPY_EMIT_THUMB_ARMV7M
+// ARMv7-M only
 static inline void asm_thumb_ldr_reg_reg_i12(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
     asm_thumb_op32(as, OP_LDR_W_HI(reg_base), OP_LDR_W_LO(reg_dest, word_offset * 4));
 }
-#endif
 
-#if !MICROPY_EMIT_THUMB_ARMV7M
 // emits code for: reg_dest = reg_base + offset << offset_shift
 static void asm_thumb_add_reg_reg_offset(asm_thumb_t *as, uint reg_dest, uint reg_base, uint offset, uint offset_shift) {
     if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8) {
@@ -479,37 +462,31 @@ static void asm_thumb_add_reg_reg_offset(asm_thumb_t *as, uint reg_dest, uint re
         assert(0); // should never be called for ARMV6M
     }
 }
-#endif
 
 void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
     if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8 && UNSIGNED_FIT5(word_offset)) {
         asm_thumb_ldr_rlo_rlo_i5(as, reg_dest, reg_base, word_offset);
-    } else {
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    } else if (asm_thumb_allow_armv7m(as)) {
         asm_thumb_ldr_reg_reg_i12(as, reg_dest, reg_base, word_offset);
-        #else
+    } else {
         asm_thumb_add_reg_reg_offset(as, reg_dest, reg_base, word_offset - 31, 2);
         asm_thumb_ldr_rlo_rlo_i5(as, reg_dest, reg_dest, 31);
-        #endif
     }
 }
 
-#if MICROPY_EMIT_THUMB_ARMV7M
+// ARMv7-M only
 static inline void asm_thumb_ldrh_reg_reg_i12(asm_thumb_t *as, uint reg_dest, uint reg_base, uint uint16_offset) {
     asm_thumb_op32(as, OP_LDRH_W_HI(reg_base), OP_LDRH_W_LO(reg_dest, uint16_offset * 2));
 }
-#endif
 
 void asm_thumb_ldrh_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint reg_base, uint uint16_offset) {
     if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8 && UNSIGNED_FIT5(uint16_offset)) {
         asm_thumb_ldrh_rlo_rlo_i5(as, reg_dest, reg_base, uint16_offset);
-    } else {
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    } else if (asm_thumb_allow_armv7m(as)) {
         asm_thumb_ldrh_reg_reg_i12(as, reg_dest, reg_base, uint16_offset);
-        #else
+    } else {
         asm_thumb_add_reg_reg_offset(as, reg_dest, reg_base, uint16_offset - 31, 1);
         asm_thumb_ldrh_rlo_rlo_i5(as, reg_dest, reg_dest, 31);
-        #endif
     }
 }
 
@@ -521,20 +498,21 @@ void asm_thumb_b_label(asm_thumb_t *as, uint label) {
     mp_uint_t dest = get_label_dest(as, label);
     mp_int_t rel = dest - as->base.code_offset;
     rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
+
     if (dest != (mp_uint_t)-1 && rel <= -4) {
         // is a backwards jump, so we know the size of the jump on the first pass
         // calculate rel assuming 12 bit relative jump
         if (SIGNED_FIT12(rel)) {
             asm_thumb_op16(as, OP_B_N(rel));
-        } else {
-            goto large_jump;
+            return;
         }
-    } else {
-        // is a forwards jump, so need to assume it's large
-    large_jump:
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    }
+
+    // is a large backwards jump, or a forwards jump (that must be assumed large)
+
+    if (asm_thumb_allow_armv7m(as)) {
         asm_thumb_op32(as, OP_BW_HI(rel), OP_BW_LO(rel));
-        #else
+    } else {
         if (SIGNED_FIT12(rel)) {
             // this code path has to be the same number of instructions irrespective of rel
             asm_thumb_op16(as, OP_B_N(rel));
@@ -545,7 +523,6 @@ void asm_thumb_b_label(asm_thumb_t *as, uint label) {
                 mp_raise_NotImplementedError(MP_ERROR_TEXT("native method too big"));
             }
         }
-        #endif
     }
 }
 
@@ -553,24 +530,24 @@ void asm_thumb_bcc_label(asm_thumb_t *as, int cond, uint label) {
     mp_uint_t dest = get_label_dest(as, label);
     mp_int_t rel = dest - as->base.code_offset;
     rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
+
     if (dest != (mp_uint_t)-1 && rel <= -4) {
         // is a backwards jump, so we know the size of the jump on the first pass
         // calculate rel assuming 9 bit relative jump
         if (SIGNED_FIT9(rel)) {
             asm_thumb_op16(as, OP_BCC_N(cond, rel));
-        } else {
-            goto large_jump;
+            return;
         }
-    } else {
-        // is a forwards jump, so need to assume it's large
-    large_jump:
-        #if MICROPY_EMIT_THUMB_ARMV7M
+    }
+
+    // is a large backwards jump, or a forwards jump (that must be assumed large)
+
+    if (asm_thumb_allow_armv7m(as)) {
         asm_thumb_op32(as, OP_BCC_W_HI(cond, rel), OP_BCC_W_LO(rel));
-        #else
+    } else {
         // reverse the sense of the branch to jump over a longer branch
         asm_thumb_op16(as, OP_BCC_N(cond ^ 1, 0));
         asm_thumb_b_label(as, label);
-        #endif
     }
 }