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Diffstat (limited to 'src/cpu/x86/vm/sharedRuntime_x86_32.cpp')
-rw-r--r--src/cpu/x86/vm/sharedRuntime_x86_32.cpp543
1 files changed, 300 insertions, 243 deletions
diff --git a/src/cpu/x86/vm/sharedRuntime_x86_32.cpp b/src/cpu/x86/vm/sharedRuntime_x86_32.cpp
index 85befcf4e..7c0aa6bf5 100644
--- a/src/cpu/x86/vm/sharedRuntime_x86_32.cpp
+++ b/src/cpu/x86/vm/sharedRuntime_x86_32.cpp
@@ -118,12 +118,12 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_
// save registers, fpu state, and flags
// We assume caller has already has return address slot on the stack
// We push epb twice in this sequence because we want the real rbp,
- // to be under the return like a normal enter and we want to use pushad
+ // to be under the return like a normal enter and we want to use pusha
// We push by hand instead of pusing push
__ enter();
- __ pushad();
- __ pushfd();
- __ subl(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
+ __ pusha();
+ __ pushf();
+ __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
__ push_FPU_state(); // Save FPU state & init
if (verify_fpu) {
@@ -270,12 +270,12 @@ void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
__ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
}
__ pop_FPU_state();
- __ addl(rsp,FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
+ __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
- __ popfd();
- __ popad();
+ __ popf();
+ __ popa();
// Get the rbp, described implicitly by the frame sender code (no oopMap)
- __ popl(rbp);
+ __ pop(rbp);
}
@@ -296,10 +296,10 @@ void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
} else if( UseSSE >= 2 ) {
__ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
}
- __ movl(rax, Address(rsp, rax_off*wordSize));
- __ movl(rdx, Address(rsp, rdx_off*wordSize));
+ __ movptr(rax, Address(rsp, rax_off*wordSize));
+ __ movptr(rdx, Address(rsp, rdx_off*wordSize));
// Pop all of the register save are off the stack except the return address
- __ addl(rsp, return_off * wordSize);
+ __ addptr(rsp, return_off * wordSize);
}
// The java_calling_convention describes stack locations as ideal slots on
@@ -448,22 +448,22 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
static void patch_callers_callsite(MacroAssembler *masm) {
Label L;
__ verify_oop(rbx);
- __ cmpl(Address(rbx, in_bytes(methodOopDesc::code_offset())), NULL_WORD);
+ __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, L);
// Schedule the branch target address early.
// Call into the VM to patch the caller, then jump to compiled callee
// rax, isn't live so capture return address while we easily can
- __ movl(rax, Address(rsp, 0));
- __ pushad();
- __ pushfd();
+ __ movptr(rax, Address(rsp, 0));
+ __ pusha();
+ __ pushf();
if (UseSSE == 1) {
- __ subl(rsp, 2*wordSize);
+ __ subptr(rsp, 2*wordSize);
__ movflt(Address(rsp, 0), xmm0);
__ movflt(Address(rsp, wordSize), xmm1);
}
if (UseSSE >= 2) {
- __ subl(rsp, 4*wordSize);
+ __ subptr(rsp, 4*wordSize);
__ movdbl(Address(rsp, 0), xmm0);
__ movdbl(Address(rsp, 2*wordSize), xmm1);
}
@@ -477,26 +477,26 @@ static void patch_callers_callsite(MacroAssembler *masm) {
#endif /* COMPILER2 */
// VM needs caller's callsite
- __ pushl(rax);
+ __ push(rax);
// VM needs target method
- __ pushl(rbx);
+ __ push(rbx);
__ verify_oop(rbx);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
- __ addl(rsp, 2*wordSize);
+ __ addptr(rsp, 2*wordSize);
if (UseSSE == 1) {
__ movflt(xmm0, Address(rsp, 0));
__ movflt(xmm1, Address(rsp, wordSize));
- __ addl(rsp, 2*wordSize);
+ __ addptr(rsp, 2*wordSize);
}
if (UseSSE >= 2) {
__ movdbl(xmm0, Address(rsp, 0));
__ movdbl(xmm1, Address(rsp, 2*wordSize));
- __ addl(rsp, 4*wordSize);
+ __ addptr(rsp, 4*wordSize);
}
- __ popfd();
- __ popad();
+ __ popf();
+ __ popa();
__ bind(L);
}
@@ -506,13 +506,13 @@ static void tag_stack(MacroAssembler *masm, const BasicType sig, int st_off) {
if (TaggedStackInterpreter) {
int tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(0);
if (sig == T_OBJECT || sig == T_ARRAY) {
- __ movl(Address(rsp, tag_offset), frame::TagReference);
+ __ movptr(Address(rsp, tag_offset), frame::TagReference);
} else if (sig == T_LONG || sig == T_DOUBLE) {
int next_tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(1);
- __ movl(Address(rsp, next_tag_offset), frame::TagValue);
- __ movl(Address(rsp, tag_offset), frame::TagValue);
+ __ movptr(Address(rsp, next_tag_offset), frame::TagValue);
+ __ movptr(Address(rsp, tag_offset), frame::TagValue);
} else {
- __ movl(Address(rsp, tag_offset), frame::TagValue);
+ __ movptr(Address(rsp, tag_offset), frame::TagValue);
}
}
}
@@ -561,12 +561,12 @@ static void gen_c2i_adapter(MacroAssembler *masm,
int extraspace = total_args_passed * Interpreter::stackElementSize();
// Get return address
- __ popl(rax);
+ __ pop(rax);
// set senderSP value
- __ movl(rsi, rsp);
+ __ movptr(rsi, rsp);
- __ subl(rsp, extraspace);
+ __ subptr(rsp, extraspace);
// Now write the args into the outgoing interpreter space
for (int i = 0; i < total_args_passed; i++) {
@@ -577,6 +577,8 @@ static void gen_c2i_adapter(MacroAssembler *masm,
// st_off points to lowest address on stack.
int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize();
+ int next_off = st_off - Interpreter::stackElementSize();
+
// Say 4 args:
// i st_off
// 0 12 T_LONG
@@ -596,18 +598,25 @@ static void gen_c2i_adapter(MacroAssembler *masm,
if (!r_2->is_valid()) {
__ movl(rdi, Address(rsp, ld_off));
- __ movl(Address(rsp, st_off), rdi);
+ __ movptr(Address(rsp, st_off), rdi);
tag_stack(masm, sig_bt[i], st_off);
} else {
// ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
// st_off == MSW, st_off-wordSize == LSW
- int next_off = st_off - Interpreter::stackElementSize();
- __ movl(rdi, Address(rsp, ld_off));
- __ movl(Address(rsp, next_off), rdi);
- __ movl(rdi, Address(rsp, ld_off + wordSize));
- __ movl(Address(rsp, st_off), rdi);
+ __ movptr(rdi, Address(rsp, ld_off));
+ __ movptr(Address(rsp, next_off), rdi);
+#ifndef _LP64
+ __ movptr(rdi, Address(rsp, ld_off + wordSize));
+ __ movptr(Address(rsp, st_off), rdi);
+#else
+#ifdef ASSERT
+ // Overwrite the unused slot with known junk
+ __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
+ __ movptr(Address(rsp, st_off), rax);
+#endif /* ASSERT */
+#endif // _LP64
tag_stack(masm, sig_bt[i], next_off);
}
} else if (r_1->is_Register()) {
@@ -617,7 +626,22 @@ static void gen_c2i_adapter(MacroAssembler *masm,
tag_stack(masm, sig_bt[i], st_off);
} else {
// long/double in gpr
- ShouldNotReachHere();
+ NOT_LP64(ShouldNotReachHere());
+ // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
+ // T_DOUBLE and T_LONG use two slots in the interpreter
+ if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
+ // long/double in gpr
+#ifdef ASSERT
+ // Overwrite the unused slot with known junk
+ LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
+ __ movptr(Address(rsp, st_off), rax);
+#endif /* ASSERT */
+ __ movptr(Address(rsp, next_off), r);
+ tag_stack(masm, sig_bt[i], next_off);
+ } else {
+ __ movptr(Address(rsp, st_off), r);
+ tag_stack(masm, sig_bt[i], st_off);
+ }
}
} else {
assert(r_1->is_XMMRegister(), "");
@@ -632,9 +656,9 @@ static void gen_c2i_adapter(MacroAssembler *masm,
}
// Schedule the branch target address early.
- __ movl(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
+ __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
// And repush original return address
- __ pushl(rax);
+ __ push(rax);
__ jmp(rcx);
}
@@ -645,11 +669,11 @@ static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_
int next_val_off = ld_off - Interpreter::stackElementSize();
if (TaggedStackInterpreter) {
// use tag slot temporarily for MSW
- __ movl(rsi, Address(saved_sp, ld_off));
- __ movl(Address(saved_sp, next_val_off+wordSize), rsi);
+ __ movptr(rsi, Address(saved_sp, ld_off));
+ __ movptr(Address(saved_sp, next_val_off+wordSize), rsi);
__ movdbl(r, Address(saved_sp, next_val_off));
// restore tag
- __ movl(Address(saved_sp, next_val_off+wordSize), frame::TagValue);
+ __ movptr(Address(saved_sp, next_val_off+wordSize), frame::TagValue);
} else {
__ movdbl(r, Address(saved_sp, next_val_off));
}
@@ -685,7 +709,7 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// code goes non-entrant while we get args ready.
// Pick up the return address
- __ movl(rax, Address(rsp, 0));
+ __ movptr(rax, Address(rsp, 0));
// If UseSSE >= 2 then no cleanup is needed on the return to the
// interpreter so skip fixing up the return entry point unless
@@ -696,10 +720,10 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// cleanup than if the interpreter returned to the call stub.
ExternalAddress stub_return_address(StubRoutines::_call_stub_return_address);
- __ cmp32(rax, stub_return_address.addr());
+ __ cmpptr(rax, stub_return_address.addr());
__ jcc(Assembler::notEqual, chk_int);
- assert(StubRoutines::i486::get_call_stub_compiled_return() != NULL, "must be set");
- __ lea(rax, ExternalAddress(StubRoutines::i486::get_call_stub_compiled_return()));
+ assert(StubRoutines::x86::get_call_stub_compiled_return() != NULL, "must be set");
+ __ lea(rax, ExternalAddress(StubRoutines::x86::get_call_stub_compiled_return()));
__ jmp(skip);
// It must be the interpreter since we never get here via a c2i (unlike Azul)
@@ -708,13 +732,13 @@ static void gen_i2c_adapter(MacroAssembler *masm,
#ifdef ASSERT
{
Label ok;
- __ cmpl(Address(rax, -8), Interpreter::return_sentinel);
+ __ cmpl(Address(rax, -2*wordSize), Interpreter::return_sentinel);
__ jcc(Assembler::equal, ok);
__ int3();
__ bind(ok);
}
#endif // ASSERT
- __ movl(rax, Address(rax, -4));
+ __ movptr(rax, Address(rax, -wordSize));
__ bind(skip);
}
@@ -723,7 +747,7 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// Must preserve original SP for loading incoming arguments because
// we need to align the outgoing SP for compiled code.
- __ movl(rdi, rsp);
+ __ movptr(rdi, rsp);
// Cut-out for having no stack args. Since up to 2 int/oop args are passed
// in registers, we will occasionally have no stack args.
@@ -737,24 +761,24 @@ static void gen_i2c_adapter(MacroAssembler *masm,
comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
// Round up to miminum stack alignment, in wordSize
comp_words_on_stack = round_to(comp_words_on_stack, 2);
- __ subl(rsp, comp_words_on_stack * wordSize);
+ __ subptr(rsp, comp_words_on_stack * wordSize);
}
// Align the outgoing SP
- __ andl(rsp, -(StackAlignmentInBytes));
+ __ andptr(rsp, -(StackAlignmentInBytes));
// push the return address on the stack (note that pushing, rather
// than storing it, yields the correct frame alignment for the callee)
- __ pushl(rax);
+ __ push(rax);
// Put saved SP in another register
const Register saved_sp = rax;
- __ movl(saved_sp, rdi);
+ __ movptr(saved_sp, rdi);
// Will jump to the compiled code just as if compiled code was doing it.
// Pre-load the register-jump target early, to schedule it better.
- __ movl(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
+ __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
// Now generate the shuffle code. Pick up all register args and move the
// rest through the floating point stack top.
@@ -794,7 +818,7 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// __ fld_s(Address(saved_sp, ld_off));
// __ fstp_s(Address(rsp, st_off));
__ movl(rsi, Address(saved_sp, ld_off));
- __ movl(Address(rsp, st_off), rsi);
+ __ movptr(Address(rsp, st_off), rsi);
} else {
// Interpreter local[n] == MSW, local[n+1] == LSW however locals
// are accessed as negative so LSW is at LOW address
@@ -803,20 +827,44 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// st_off is LSW (i.e. reg.first())
// __ fld_d(Address(saved_sp, next_off));
// __ fstp_d(Address(rsp, st_off));
- __ movl(rsi, Address(saved_sp, next_off));
- __ movl(Address(rsp, st_off), rsi);
- __ movl(rsi, Address(saved_sp, ld_off));
- __ movl(Address(rsp, st_off + wordSize), rsi);
+ //
+ // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
+ // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
+ // So we must adjust where to pick up the data to match the interpreter.
+ //
+ // Interpreter local[n] == MSW, local[n+1] == LSW however locals
+ // are accessed as negative so LSW is at LOW address
+
+ // ld_off is MSW so get LSW
+ const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
+ next_off : ld_off;
+ __ movptr(rsi, Address(saved_sp, offset));
+ __ movptr(Address(rsp, st_off), rsi);
+#ifndef _LP64
+ __ movptr(rsi, Address(saved_sp, ld_off));
+ __ movptr(Address(rsp, st_off + wordSize), rsi);
+#endif // _LP64
}
} else if (r_1->is_Register()) { // Register argument
Register r = r_1->as_Register();
assert(r != rax, "must be different");
if (r_2->is_valid()) {
+ //
+ // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
+ // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
+ // So we must adjust where to pick up the data to match the interpreter.
+
+ const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
+ next_off : ld_off;
+
+ // this can be a misaligned move
+ __ movptr(r, Address(saved_sp, offset));
+#ifndef _LP64
assert(r_2->as_Register() != rax, "need another temporary register");
// Remember r_1 is low address (and LSB on x86)
// So r_2 gets loaded from high address regardless of the platform
- __ movl(r_2->as_Register(), Address(saved_sp, ld_off));
- __ movl(r, Address(saved_sp, next_off));
+ __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
+#endif // _LP64
} else {
__ movl(r, Address(saved_sp, ld_off));
}
@@ -841,13 +889,13 @@ static void gen_i2c_adapter(MacroAssembler *masm,
// and the vm will find there should this case occur.
__ get_thread(rax);
- __ movl(Address(rax, JavaThread::callee_target_offset()), rbx);
+ __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
// move methodOop to rax, in case we end up in an c2i adapter.
// the c2i adapters expect methodOop in rax, (c2) because c2's
// resolve stubs return the result (the method) in rax,.
// I'd love to fix this.
- __ movl(rax, rbx);
+ __ mov(rax, rbx);
__ jmp(rdi);
}
@@ -883,16 +931,16 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
Label missed;
__ verify_oop(holder);
- __ movl(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
+ __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
__ verify_oop(temp);
- __ cmpl(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
- __ movl(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
+ __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
+ __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
__ jcc(Assembler::notEqual, missed);
// Method might have been compiled since the call site was patched to
// interpreted if that is the case treat it as a miss so we can get
// the call site corrected.
- __ cmpl(Address(rbx, in_bytes(methodOopDesc::code_offset())), NULL_WORD);
+ __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, skip_fixup);
__ bind(missed);
@@ -953,17 +1001,20 @@ static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
// stack to stack
// __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
// __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
- __ movl(rax, Address(rbp, reg2offset_in(src.first())));
- __ movl(Address(rsp, reg2offset_out(dst.first())), rax);
+ __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
} else {
// stack to reg
- __ movl(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
+ __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
}
} else if (dst.first()->is_stack()) {
// reg to stack
- __ movl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
+ // no need to sign extend on 64bit
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
} else {
- __ movl(dst.first()->as_Register(), src.first()->as_Register());
+ if (dst.first() != src.first()) {
+ __ mov(dst.first()->as_Register(), src.first()->as_Register());
+ }
}
}
@@ -987,12 +1038,12 @@ static void object_move(MacroAssembler* masm,
// Oop is already on the stack as an argument
Register rHandle = rax;
Label nil;
- __ xorl(rHandle, rHandle);
- __ cmpl(Address(rbp, reg2offset_in(src.first())), NULL_WORD);
+ __ xorptr(rHandle, rHandle);
+ __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, nil);
- __ leal(rHandle, Address(rbp, reg2offset_in(src.first())));
+ __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
__ bind(nil);
- __ movl(Address(rsp, reg2offset_out(dst.first())), rHandle);
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
@@ -1007,15 +1058,15 @@ static void object_move(MacroAssembler* masm,
int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
int offset = oop_slot*VMRegImpl::stack_slot_size;
Label skip;
- __ movl(Address(rsp, offset), rOop);
+ __ movptr(Address(rsp, offset), rOop);
map->set_oop(VMRegImpl::stack2reg(oop_slot));
- __ xorl(rHandle, rHandle);
- __ cmpl(rOop, NULL_WORD);
+ __ xorptr(rHandle, rHandle);
+ __ cmpptr(rOop, (int32_t)NULL_WORD);
__ jcc(Assembler::equal, skip);
- __ leal(rHandle, Address(rsp, offset));
+ __ lea(rHandle, Address(rsp, offset));
__ bind(skip);
// Store the handle parameter
- __ movl(Address(rsp, reg2offset_out(dst.first())), rHandle);
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
if (is_receiver) {
*receiver_offset = offset;
}
@@ -1033,7 +1084,7 @@ static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
if (src.first()->is_stack()) {
__ movl(rax, Address(rbp, reg2offset_in(src.first())));
- __ movl(Address(rsp, reg2offset_out(dst.first())), rax);
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
} else {
// reg to stack
__ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
@@ -1050,10 +1101,10 @@ static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
if (src.first()->is_stack() && dst.first()->is_stack()) {
assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
- __ movl(rax, Address(rbp, reg2offset_in(src.first())));
- __ movl(rbx, Address(rbp, reg2offset_in(src.second())));
- __ movl(Address(rsp, reg2offset_out(dst.first())), rax);
- __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
+ __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
+ NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
+ NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
} else {
ShouldNotReachHere();
}
@@ -1074,10 +1125,10 @@ static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
if (src.first()->is_stack()) {
// source is all stack
- __ movl(rax, Address(rbp, reg2offset_in(src.first())));
- __ movl(rbx, Address(rbp, reg2offset_in(src.second())));
- __ movl(Address(rsp, reg2offset_out(dst.first())), rax);
- __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
+ __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
+ NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
+ __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
+ NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
} else {
// reg to stack
// No worries about stack alignment
@@ -1098,11 +1149,11 @@ void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type,
break;
case T_VOID: break;
case T_LONG:
- __ movl(Address(rbp, -wordSize), rax);
- __ movl(Address(rbp, -2*wordSize), rdx);
+ __ movptr(Address(rbp, -wordSize), rax);
+ NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
break;
default: {
- __ movl(Address(rbp, -wordSize), rax);
+ __ movptr(Address(rbp, -wordSize), rax);
}
}
}
@@ -1118,12 +1169,12 @@ void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_ty
__ fld_d(Address(rbp, -2*wordSize));
break;
case T_LONG:
- __ movl(rax, Address(rbp, -wordSize));
- __ movl(rdx, Address(rbp, -2*wordSize));
+ __ movptr(rax, Address(rbp, -wordSize));
+ NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
break;
case T_VOID: break;
default: {
- __ movl(rax, Address(rbp, -wordSize));
+ __ movptr(rax, Address(rbp, -wordSize));
}
}
}
@@ -1268,7 +1319,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
__ verify_oop(receiver);
- __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
+ __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
__ jcc(Assembler::equal, hit);
__ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
@@ -1291,23 +1342,23 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
Label slowCase;
Register receiver = rcx;
Register result = rax;
- __ movl(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
+ __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
// check if locked
- __ testl (result, markOopDesc::unlocked_value);
+ __ testptr(result, markOopDesc::unlocked_value);
__ jcc (Assembler::zero, slowCase);
if (UseBiasedLocking) {
// Check if biased and fall through to runtime if so
- __ testl (result, markOopDesc::biased_lock_bit_in_place);
+ __ testptr(result, markOopDesc::biased_lock_bit_in_place);
__ jcc (Assembler::notZero, slowCase);
}
// get hash
- __ andl (result, markOopDesc::hash_mask_in_place);
+ __ andptr(result, markOopDesc::hash_mask_in_place);
// test if hashCode exists
__ jcc (Assembler::zero, slowCase);
- __ shrl (result, markOopDesc::hash_shift);
+ __ shrptr(result, markOopDesc::hash_shift);
__ ret(0);
__ bind (slowCase);
}
@@ -1329,7 +1380,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// Generate a new frame for the wrapper.
__ enter();
// -2 because return address is already present and so is saved rbp,
- __ subl(rsp, stack_size - 2*wordSize);
+ __ subptr(rsp, stack_size - 2*wordSize);
// Frame is now completed as far a size and linkage.
@@ -1450,13 +1501,13 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
__ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
// Now handlize the static class mirror it's known not-null.
- __ movl(Address(rsp, klass_offset), oop_handle_reg);
+ __ movptr(Address(rsp, klass_offset), oop_handle_reg);
map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
// Now get the handle
- __ leal(oop_handle_reg, Address(rsp, klass_offset));
+ __ lea(oop_handle_reg, Address(rsp, klass_offset));
// store the klass handle as second argument
- __ movl(Address(rsp, wordSize), oop_handle_reg);
+ __ movptr(Address(rsp, wordSize), oop_handle_reg);
}
// Change state to native (we save the return address in the thread, since it might not
@@ -1497,14 +1548,14 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
// Get the handle (the 2nd argument)
- __ movl(oop_handle_reg, Address(rsp, wordSize));
+ __ movptr(oop_handle_reg, Address(rsp, wordSize));
// Get address of the box
- __ leal(lock_reg, Address(rbp, lock_slot_rbp_offset));
+ __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
// Load the oop from the handle
- __ movl(obj_reg, Address(oop_handle_reg, 0));
+ __ movptr(obj_reg, Address(oop_handle_reg, 0));
if (UseBiasedLocking) {
// Note that oop_handle_reg is trashed during this call
@@ -1512,13 +1563,13 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
}
// Load immediate 1 into swap_reg %rax,
- __ movl(swap_reg, 1);
+ __ movptr(swap_reg, 1);
// Load (object->mark() | 1) into swap_reg %rax,
- __ orl(swap_reg, Address(obj_reg, 0));
+ __ orptr(swap_reg, Address(obj_reg, 0));
// Save (object->mark() | 1) into BasicLock's displaced header
- __ movl(Address(lock_reg, mark_word_offset), swap_reg);
+ __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
if (os::is_MP()) {
__ lock();
@@ -1526,7 +1577,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// src -> dest iff dest == rax, else rax, <- dest
// *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
- __ cmpxchg(lock_reg, Address(obj_reg, 0));
+ __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
__ jcc(Assembler::equal, lock_done);
// Test if the oopMark is an obvious stack pointer, i.e.,
@@ -1538,18 +1589,18 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// least significant 2 bits clear.
// NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
- __ subl(swap_reg, rsp);
- __ andl(swap_reg, 3 - os::vm_page_size());
+ __ subptr(swap_reg, rsp);
+ __ andptr(swap_reg, 3 - os::vm_page_size());
// Save the test result, for recursive case, the result is zero
- __ movl(Address(lock_reg, mark_word_offset), swap_reg);
+ __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
__ jcc(Assembler::notEqual, slow_path_lock);
// Slow path will re-enter here
__ bind(lock_done);
if (UseBiasedLocking) {
// Re-fetch oop_handle_reg as we trashed it above
- __ movl(oop_handle_reg, Address(rsp, wordSize));
+ __ movptr(oop_handle_reg, Address(rsp, wordSize));
}
}
@@ -1559,8 +1610,8 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// get JNIEnv* which is first argument to native
- __ leal(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
- __ movl(Address(rsp, 0), rdx);
+ __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
+ __ movptr(Address(rsp, 0), rdx);
// Now set thread in native
__ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
@@ -1575,7 +1626,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// Unpack native results.
switch (ret_type) {
case T_BOOLEAN: __ c2bool(rax); break;
- case T_CHAR : __ andl(rax, 0xFFFF); break;
+ case T_CHAR : __ andptr(rax, 0xFFFF); break;
case T_BYTE : __ sign_extend_byte (rax); break;
case T_SHORT : __ sign_extend_short(rax); break;
case T_INT : /* nothing to do */ break;
@@ -1602,7 +1653,10 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
if(os::is_MP()) {
if (UseMembar) {
- __ membar(); // Force this write out before the read below
+ // Force this write out before the read below
+ __ membar(Assembler::Membar_mask_bits(
+ Assembler::LoadLoad | Assembler::LoadStore |
+ Assembler::StoreLoad | Assembler::StoreStore));
} else {
// Write serialization page so VM thread can do a pseudo remote membar.
// We use the current thread pointer to calculate a thread specific
@@ -1636,7 +1690,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// by hand.
//
save_native_result(masm, ret_type, stack_slots);
- __ pushl(thread);
+ __ push(thread);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
JavaThread::check_special_condition_for_native_trans)));
__ increment(rsp, wordSize);
@@ -1669,7 +1723,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
Label done;
// Get locked oop from the handle we passed to jni
- __ movl(obj_reg, Address(oop_handle_reg, 0));
+ __ movptr(obj_reg, Address(oop_handle_reg, 0));
if (UseBiasedLocking) {
__ biased_locking_exit(obj_reg, rbx, done);
@@ -1677,7 +1731,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// Simple recursive lock?
- __ cmpl(Address(rbp, lock_slot_rbp_offset), NULL_WORD);
+ __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, done);
// Must save rax, if if it is live now because cmpxchg must use it
@@ -1686,10 +1740,10 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
}
// get old displaced header
- __ movl(rbx, Address(rbp, lock_slot_rbp_offset));
+ __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
// get address of the stack lock
- __ leal(rax, Address(rbp, lock_slot_rbp_offset));
+ __ lea(rax, Address(rbp, lock_slot_rbp_offset));
// Atomic swap old header if oop still contains the stack lock
if (os::is_MP()) {
@@ -1698,7 +1752,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// src -> dest iff dest == rax, else rax, <- dest
// *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
- __ cmpxchg(rbx, Address(obj_reg, 0));
+ __ cmpxchgptr(rbx, Address(obj_reg, 0));
__ jcc(Assembler::notEqual, slow_path_unlock);
// slow path re-enters here
@@ -1729,20 +1783,20 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// Unpack oop result
if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
Label L;
- __ cmpl(rax, NULL_WORD);
+ __ cmpptr(rax, (int32_t)NULL_WORD);
__ jcc(Assembler::equal, L);
- __ movl(rax, Address(rax, 0));
+ __ movptr(rax, Address(rax, 0));
__ bind(L);
__ verify_oop(rax);
}
// reset handle block
- __ movl(rcx, Address(thread, JavaThread::active_handles_offset()));
+ __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
- __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), 0);
+ __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
// Any exception pending?
- __ cmpl(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
+ __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
__ jcc(Assembler::notEqual, exception_pending);
@@ -1782,15 +1836,15 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
// has last_Java_frame setup. No exceptions so do vanilla call not call_VM
// args are (oop obj, BasicLock* lock, JavaThread* thread)
- __ pushl(thread);
- __ pushl(lock_reg);
- __ pushl(obj_reg);
+ __ push(thread);
+ __ push(lock_reg);
+ __ push(obj_reg);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
- __ addl(rsp, 3*wordSize);
+ __ addptr(rsp, 3*wordSize);
#ifdef ASSERT
{ Label L;
- __ cmpl(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
+ __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
__ jcc(Assembler::equal, L);
__ stop("no pending exception allowed on exit from monitorenter");
__ bind(L);
@@ -1810,29 +1864,29 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
}
// Save pending exception around call to VM (which contains an EXCEPTION_MARK)
- __ pushl(Address(thread, in_bytes(Thread::pending_exception_offset())));
- __ movl(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
+ __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
+ __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
// should be a peal
// +wordSize because of the push above
- __ leal(rax, Address(rbp, lock_slot_rbp_offset));
- __ pushl(rax);
+ __ lea(rax, Address(rbp, lock_slot_rbp_offset));
+ __ push(rax);
- __ pushl(obj_reg);
+ __ push(obj_reg);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
- __ addl(rsp, 2*wordSize);
+ __ addptr(rsp, 2*wordSize);
#ifdef ASSERT
{
Label L;
- __ cmpl(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
+ __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, L);
__ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
__ bind(L);
}
#endif /* ASSERT */
- __ popl(Address(thread, in_bytes(Thread::pending_exception_offset())));
+ __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
restore_native_result(masm, ret_type, stack_slots);
@@ -2320,7 +2374,7 @@ void SharedRuntime::generate_deopt_blob() {
map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words);
// Normal deoptimization
- __ pushl(Deoptimization::Unpack_deopt);
+ __ push(Deoptimization::Unpack_deopt);
__ jmp(cont);
int reexecute_offset = __ pc() - start;
@@ -2331,7 +2385,7 @@ void SharedRuntime::generate_deopt_blob() {
// No need to update map as each call to save_live_registers will produce identical oopmap
(void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words);
- __ pushl(Deoptimization::Unpack_reexecute);
+ __ push(Deoptimization::Unpack_reexecute);
__ jmp(cont);
int exception_offset = __ pc() - start;
@@ -2344,8 +2398,8 @@ void SharedRuntime::generate_deopt_blob() {
// unpack_with_exception_in_tls entry point.
__ get_thread(rdi);
- __ movl(Address(rdi, JavaThread::exception_pc_offset()), rdx);
- __ movl(Address(rdi, JavaThread::exception_oop_offset()), rax);
+ __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
+ __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
int exception_in_tls_offset = __ pc() - start;
@@ -2360,7 +2414,7 @@ void SharedRuntime::generate_deopt_blob() {
// make room on stack for the return address
// It will be patched later with the throwing pc. The correct value is not
// available now because loading it from memory would destroy registers.
- __ pushl(0);
+ __ push(0);
// Save everything in sight.
@@ -2370,24 +2424,24 @@ void SharedRuntime::generate_deopt_blob() {
// Now it is safe to overwrite any register
// store the correct deoptimization type
- __ pushl(Deoptimization::Unpack_exception);
+ __ push(Deoptimization::Unpack_exception);
// load throwing pc from JavaThread and patch it as the return address
// of the current frame. Then clear the field in JavaThread
__ get_thread(rdi);
- __ movl(rdx, Address(rdi, JavaThread::exception_pc_offset()));
- __ movl(Address(rbp, wordSize), rdx);
- __ movl(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
+ __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
+ __ movptr(Address(rbp, wordSize), rdx);
+ __ movptr(Address(rdi, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
#ifdef ASSERT
// verify that there is really an exception oop in JavaThread
- __ movl(rax, Address(rdi, JavaThread::exception_oop_offset()));
+ __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
__ verify_oop(rax);
// verify that there is no pending exception
Label no_pending_exception;
- __ movl(rax, Address(rdi, Thread::pending_exception_offset()));
- __ testl(rax, rax);
+ __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
+ __ testptr(rax, rax);
__ jcc(Assembler::zero, no_pending_exception);
__ stop("must not have pending exception here");
__ bind(no_pending_exception);
@@ -2402,7 +2456,7 @@ void SharedRuntime::generate_deopt_blob() {
// Call C code. Need thread and this frame, but NOT official VM entry
// crud. We cannot block on this call, no GC can happen.
__ get_thread(rcx);
- __ pushl(rcx);
+ __ push(rcx);
// fetch_unroll_info needs to call last_java_frame()
__ set_last_Java_frame(rcx, noreg, noreg, NULL);
@@ -2414,35 +2468,35 @@ void SharedRuntime::generate_deopt_blob() {
oop_maps->add_gc_map( __ pc()-start, map);
// Discard arg to fetch_unroll_info
- __ popl(rcx);
+ __ pop(rcx);
__ get_thread(rcx);
__ reset_last_Java_frame(rcx, false, false);
// Load UnrollBlock into EDI
- __ movl(rdi, rax);
+ __ mov(rdi, rax);
// Move the unpack kind to a safe place in the UnrollBlock because
// we are very short of registers
Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
// retrieve the deopt kind from where we left it.
- __ popl(rax);
+ __ pop(rax);
__ movl(unpack_kind, rax); // save the unpack_kind value
Label noException;
__ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
__ jcc(Assembler::notEqual, noException);
- __ movl(rax, Address(rcx, JavaThread::exception_oop_offset()));
- __ movl(rdx, Address(rcx, JavaThread::exception_pc_offset()));
- __ movl(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
- __ movl(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
+ __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
+ __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
+ __ movptr(Address(rcx, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
+ __ movptr(Address(rcx, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
__ verify_oop(rax);
// Overwrite the result registers with the exception results.
- __ movl(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
- __ movl(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
+ __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
+ __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
__ bind(noException);
@@ -2467,7 +2521,7 @@ void SharedRuntime::generate_deopt_blob() {
// when we are done the return to frame 3 will still be on the stack.
// Pop deoptimized frame
- __ addl(rsp,Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
+ __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
// sp should be pointing at the return address to the caller (3)
@@ -2478,12 +2532,12 @@ void SharedRuntime::generate_deopt_blob() {
}
// Load array of frame pcs into ECX
- __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
+ __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
- __ popl(rsi); // trash the old pc
+ __ pop(rsi); // trash the old pc
// Load array of frame sizes into ESI
- __ movl(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
+ __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
@@ -2491,7 +2545,7 @@ void SharedRuntime::generate_deopt_blob() {
__ movl(counter, rbx);
// Pick up the initial fp we should save
- __ movl(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
+ __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
// Now adjust the caller's stack to make up for the extra locals
// but record the original sp so that we can save it in the skeletal interpreter
@@ -2499,43 +2553,44 @@ void SharedRuntime::generate_deopt_blob() {
// value and not the "real" sp value.
Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
- __ movl(sp_temp, rsp);
- __ subl(rsp, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
+ __ movptr(sp_temp, rsp);
+ __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
+ __ subptr(rsp, rbx);
// Push interpreter frames in a loop
Label loop;
__ bind(loop);
- __ movl(rbx, Address(rsi, 0)); // Load frame size
+ __ movptr(rbx, Address(rsi, 0)); // Load frame size
#ifdef CC_INTERP
- __ subl(rbx, 4*wordSize); // we'll push pc and ebp by hand and
+ __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
#ifdef ASSERT
- __ pushl(0xDEADDEAD); // Make a recognizable pattern
- __ pushl(0xDEADDEAD);
+ __ push(0xDEADDEAD); // Make a recognizable pattern
+ __ push(0xDEADDEAD);
#else /* ASSERT */
- __ subl(rsp, 2*wordSize); // skip the "static long no_param"
+ __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
#endif /* ASSERT */
#else /* CC_INTERP */
- __ subl(rbx, 2*wordSize); // we'll push pc and rbp, by hand
+ __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
#endif /* CC_INTERP */
- __ pushl(Address(rcx, 0)); // save return address
+ __ pushptr(Address(rcx, 0)); // save return address
__ enter(); // save old & set new rbp,
- __ subl(rsp, rbx); // Prolog!
- __ movl(rbx, sp_temp); // sender's sp
+ __ subptr(rsp, rbx); // Prolog!
+ __ movptr(rbx, sp_temp); // sender's sp
#ifdef CC_INTERP
- __ movl(Address(rbp,
+ __ movptr(Address(rbp,
-(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
rbx); // Make it walkable
#else /* CC_INTERP */
// This value is corrected by layout_activation_impl
- __ movl(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
- __ movl(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
+ __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
+ __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
#endif /* CC_INTERP */
- __ movl(sp_temp, rsp); // pass to next frame
- __ addl(rsi, 4); // Bump array pointer (sizes)
- __ addl(rcx, 4); // Bump array pointer (pcs)
- __ decrement(counter); // decrement counter
+ __ movptr(sp_temp, rsp); // pass to next frame
+ __ addptr(rsi, wordSize); // Bump array pointer (sizes)
+ __ addptr(rcx, wordSize); // Bump array pointer (pcs)
+ __ decrementl(counter); // decrement counter
__ jcc(Assembler::notZero, loop);
- __ pushl(Address(rcx, 0)); // save final return address
+ __ pushptr(Address(rcx, 0)); // save final return address
// Re-push self-frame
__ enter(); // save old & set new rbp,
@@ -2543,11 +2598,11 @@ void SharedRuntime::generate_deopt_blob() {
// Return address and rbp, are in place
// We'll push additional args later. Just allocate a full sized
// register save area
- __ subl(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
+ __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
// Restore frame locals after moving the frame
- __ movl(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
- __ movl(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
+ __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
+ __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
__ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
@@ -2556,7 +2611,7 @@ void SharedRuntime::generate_deopt_blob() {
__ pushl(unpack_kind); // get the unpack_kind value
__ get_thread(rcx);
- __ pushl(rcx);
+ __ push(rcx);
// set last_Java_sp, last_Java_fp
__ set_last_Java_frame(rcx, noreg, rbp, NULL);
@@ -2569,14 +2624,14 @@ void SharedRuntime::generate_deopt_blob() {
oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
// rax, contains the return result type
- __ pushl(rax);
+ __ push(rax);
__ get_thread(rcx);
__ reset_last_Java_frame(rcx, false, false);
// Collect return values
- __ movl(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
- __ movl(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
+ __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
+ __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
// Clear floating point stack before returning to interpreter
__ empty_FPU_stack();
@@ -2637,12 +2692,12 @@ void SharedRuntime::generate_uncommon_trap_blob() {
address start = __ pc();
// Push self-frame.
- __ subl(rsp, return_off*wordSize); // Epilog!
+ __ subptr(rsp, return_off*wordSize); // Epilog!
// rbp, is an implicitly saved callee saved register (i.e. the calling
// convention will save restore it in prolog/epilog) Other than that
// there are no callee save registers no that adapter frames are gone.
- __ movl(Address(rsp, rbp_off*wordSize),rbp);
+ __ movptr(Address(rsp, rbp_off*wordSize), rbp);
// Clear the floating point exception stack
__ empty_FPU_stack();
@@ -2654,7 +2709,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
// Call C code. Need thread but NOT official VM entry
// crud. We cannot block on this call, no GC can happen. Call should
// capture callee-saved registers as well as return values.
- __ movl(Address(rsp, arg0_off*wordSize),rdx);
+ __ movptr(Address(rsp, arg0_off*wordSize), rdx);
// argument already in ECX
__ movl(Address(rsp, arg1_off*wordSize),rcx);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
@@ -2671,7 +2726,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
__ reset_last_Java_frame(rcx, false, false);
// Load UnrollBlock into EDI
- __ movl(rdi, rax);
+ __ movptr(rdi, rax);
// Pop all the frames we must move/replace.
//
@@ -2681,10 +2736,11 @@ void SharedRuntime::generate_uncommon_trap_blob() {
// 3: caller of deopting frame (could be compiled/interpreted).
// Pop self-frame. We have no frame, and must rely only on EAX and ESP.
- __ addl(rsp,(framesize-1)*wordSize); // Epilog!
+ __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
// Pop deoptimized frame
- __ addl(rsp,Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
+ __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
+ __ addptr(rsp, rcx);
// sp should be pointing at the return address to the caller (3)
@@ -2698,10 +2754,10 @@ void SharedRuntime::generate_uncommon_trap_blob() {
// Load array of frame pcs into ECX
__ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
- __ popl(rsi); // trash the pc
+ __ pop(rsi); // trash the pc
// Load array of frame sizes into ESI
- __ movl(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
+ __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
@@ -2709,7 +2765,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
__ movl(counter, rbx);
// Pick up the initial fp we should save
- __ movl(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
+ __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
// Now adjust the caller's stack to make up for the extra locals
// but record the original sp so that we can save it in the skeletal interpreter
@@ -2717,47 +2773,48 @@ void SharedRuntime::generate_uncommon_trap_blob() {
// value and not the "real" sp value.
Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
- __ movl(sp_temp, rsp);
- __ subl(rsp, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
+ __ movptr(sp_temp, rsp);
+ __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
+ __ subptr(rsp, rbx);
// Push interpreter frames in a loop
Label loop;
__ bind(loop);
- __ movl(rbx, Address(rsi, 0)); // Load frame size
+ __ movptr(rbx, Address(rsi, 0)); // Load frame size
#ifdef CC_INTERP
- __ subl(rbx, 4*wordSize); // we'll push pc and ebp by hand and
+ __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
#ifdef ASSERT
- __ pushl(0xDEADDEAD); // Make a recognizable pattern
- __ pushl(0xDEADDEAD); // (parm to RecursiveInterpreter...)
+ __ push(0xDEADDEAD); // Make a recognizable pattern
+ __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
#else /* ASSERT */
- __ subl(rsp, 2*wordSize); // skip the "static long no_param"
+ __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
#endif /* ASSERT */
#else /* CC_INTERP */
- __ subl(rbx, 2*wordSize); // we'll push pc and rbp, by hand
+ __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
#endif /* CC_INTERP */
- __ pushl(Address(rcx, 0)); // save return address
+ __ pushptr(Address(rcx, 0)); // save return address
__ enter(); // save old & set new rbp,
- __ subl(rsp, rbx); // Prolog!
- __ movl(rbx, sp_temp); // sender's sp
+ __ subptr(rsp, rbx); // Prolog!
+ __ movptr(rbx, sp_temp); // sender's sp
#ifdef CC_INTERP
- __ movl(Address(rbp,
+ __ movptr(Address(rbp,
-(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
rbx); // Make it walkable
#else /* CC_INTERP */
// This value is corrected by layout_activation_impl
- __ movl(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
- __ movl(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
+ __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
+ __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
#endif /* CC_INTERP */
- __ movl(sp_temp, rsp); // pass to next frame
- __ addl(rsi, 4); // Bump array pointer (sizes)
- __ addl(rcx, 4); // Bump array pointer (pcs)
- __ decrement(counter); // decrement counter
+ __ movptr(sp_temp, rsp); // pass to next frame
+ __ addptr(rsi, wordSize); // Bump array pointer (sizes)
+ __ addptr(rcx, wordSize); // Bump array pointer (pcs)
+ __ decrementl(counter); // decrement counter
__ jcc(Assembler::notZero, loop);
- __ pushl(Address(rcx, 0)); // save final return address
+ __ pushptr(Address(rcx, 0)); // save final return address
// Re-push self-frame
__ enter(); // save old & set new rbp,
- __ subl(rsp, (framesize-2) * wordSize); // Prolog!
+ __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
// set last_Java_sp, last_Java_fp
@@ -2767,7 +2824,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
// Call C code. Need thread but NOT official VM entry
// crud. We cannot block on this call, no GC can happen. Call should
// restore return values to their stack-slots with the new SP.
- __ movl(Address(rsp,arg0_off*wordSize),rdi);
+ __ movptr(Address(rsp,arg0_off*wordSize),rdi);
__ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
// Set an oopmap for the call site
@@ -2824,7 +2881,7 @@ static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return)
// Otherwise we push space for a return address that the safepoint
// handler will install later to make the stack walking sensible.
if( !cause_return )
- __ pushl(rbx); // Make room for return address (or push it again)
+ __ push(rbx); // Make room for return address (or push it again)
map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
@@ -2834,13 +2891,13 @@ static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return)
// Push thread argument and setup last_Java_sp
__ get_thread(java_thread);
- __ pushl(java_thread);
+ __ push(java_thread);
__ set_last_Java_frame(java_thread, noreg, noreg, NULL);
// if this was not a poll_return then we need to correct the return address now.
if( !cause_return ) {
- __ movl(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
- __ movl(Address(rbp, wordSize), rax);
+ __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
+ __ movptr(Address(rbp, wordSize), rax);
}
// do the call
@@ -2854,7 +2911,7 @@ static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return)
oop_maps->add_gc_map( __ pc() - start, map);
// Discard arg
- __ popl(rcx);
+ __ pop(rcx);
Label noException;
@@ -2862,7 +2919,7 @@ static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return)
__ get_thread(java_thread);
__ reset_last_Java_frame(java_thread, false, false);
- __ cmpl(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
+ __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
__ jcc(Assembler::equal, noException);
// Exception pending
@@ -2919,7 +2976,7 @@ static RuntimeStub* generate_resolve_blob(address destination, const char* name)
const Register thread = rdi;
__ get_thread(rdi);
- __ pushl(thread);
+ __ push(thread);
__ set_last_Java_frame(thread, noreg, rbp, NULL);
__ call(RuntimeAddress(destination));
@@ -2933,20 +2990,20 @@ static RuntimeStub* generate_resolve_blob(address destination, const char* name)
// rax, contains the address we are going to jump to assuming no exception got installed
- __ addl(rsp, wordSize);
+ __ addptr(rsp, wordSize);
// clear last_Java_sp
__ reset_last_Java_frame(thread, true, false);
// check for pending exceptions
Label pending;
- __ cmpl(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
+ __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
__ jcc(Assembler::notEqual, pending);
// get the returned methodOop
- __ movl(rbx, Address(thread, JavaThread::vm_result_offset()));
- __ movl(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
+ __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
+ __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
- __ movl(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
+ __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
RegisterSaver::restore_live_registers(masm);
@@ -2963,8 +3020,8 @@ static RuntimeStub* generate_resolve_blob(address destination, const char* name)
// exception pending => remove activation and forward to exception handler
__ get_thread(thread);
- __ movl(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
- __ movl(rax, Address(thread, Thread::pending_exception_offset()));
+ __ movptr(Address(thread, JavaThread::vm_result_offset()), (int32_t)NULL_WORD);
+ __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
__ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
// -------------