diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-09-25 15:36:25 +0200 |
---|---|---|
committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-03-27 08:50:04 +0100 |
commit | 3380736e145dcbcd86f4f1ec678aa0df7652e27f (patch) | |
tree | d88a192e2652ddff8831293e212eb00b817eb5f8 /Silicon/Socionext/SynQuacer/Library | |
parent | 700938c9e7eea08a3511863e28b23d1ea390dc1a (diff) |
Silicon/SynQuacer: disregard DRAM below 4 GB
Force the use of 64-bit DMA for PCI by removing the first DRAM region,
which is the only 32-bit addressable chunk of memory available on this
platform. This forces drivers for PCIe devices to enable 64-bit DMA
addressing, which many don't bother to do since it is not usually
necessary on a x86/PC platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/Library')
3 files changed, 18 insertions, 2 deletions
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 1ec0be0f..fb1eb484 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c @@ -163,6 +163,13 @@ DeclareDram ( Status = DramInfo->GetRegion (Idx, &Base, &Size);
ASSERT_EFI_ERROR (Status);
+ if (Base < PcdGet64 (PcdSystemMemoryBase)) {
+ DEBUG ((DEBUG_WARN,
+ "%a: ignoring system memory below PcdSystemMemoryBase\n",
+ __FUNCTION__));
+ continue;
+ }
+
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
mDramResourceAttributes, Base, Size);
@@ -174,6 +181,7 @@ DeclareDram ( DramDescriptor->VirtualBase = Base;
DramDescriptor->Length = MIN (Size, MAX_ALLOC_ADDRESS - Base + 1);
DramDescriptor->Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
DramDescriptor++;
}
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c index 7c529a22..af8dfd12 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c @@ -163,14 +163,21 @@ PlatformPeim ( ASSERT_EFI_ERROR (Status);
}
+ Value = 0;
+ Status = ReadGpioInput (Gpio, FixedPcdGet8 (PcdIgnoreFirstMemRegionGpioPin),
+ &Value);
+ if (!EFI_ERROR (Status) && Value != 0) {
+ DEBUG ((DEBUG_WARN, "%a: ignoring 32-bit addressable DRAM\n", __FUNCTION__));
+ }
+
//
// Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
// This is the region we will use for UEFI itself.
//
- Status = PcdSet64S (PcdSystemMemoryBase, mDramInfo->Entry[0].Base);
+ Status = PcdSet64S (PcdSystemMemoryBase, mDramInfo->Entry[Value].Base);
ASSERT_EFI_ERROR (Status);
- Status = PcdSet64S (PcdSystemMemorySize, mDramInfo->Entry[0].Size);
+ Status = PcdSet64S (PcdSystemMemorySize, mDramInfo->Entry[Value].Size);
ASSERT_EFI_ERROR (Status);
BuildFvHob (FixedPcdGet64 (PcdFvBaseAddress), FixedPcdGet32 (PcdFvSize));
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf index eb6a5bf9..c4e53767 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf @@ -44,6 +44,7 @@ gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
gSynQuacerTokenSpaceGuid.PcdDramInfoBase
gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin
+ gSynQuacerTokenSpaceGuid.PcdIgnoreFirstMemRegionGpioPin
[Ppis]
gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
|