From b9459211df1f11c62908d73188ca9573aa6720f8 Mon Sep 17 00:00:00 2001 From: Mang Guo Date: Tue, 28 Apr 2015 03:31:12 +0000 Subject: Move microcode to offset 0 of BIOS region. Move microcode, whose address is fixed by SEC binary, to offset 0 of BIOS region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Mang Guo Reviewed-by: David Wei git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17224 6f19259b-4bc3-4df7-8a09-765794883524 --- Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc') diff --git a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index 8959a9e5f..21936e0c1 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -584,8 +584,8 @@ [PcdsFixedAtBuild.common] !if $(MINNOW2_FSP_BUILD) == TRUE -# $(FLASH_REGION_VLVMICROCODE_BASE) - gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFDD0000 +# $(FLASH_REGION_VLVMICROCODE_BASE) + gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFD00000 # $(FLASH_REGION_VLVMICROCODE_SIZE) gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x00030000 gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x60 @@ -594,7 +594,8 @@ # $(FLASH_AREA_SIZE) gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000 # $(FLASH_REGION_FSPBIN_BASE) - gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFD80000 + gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000 + !endif !if $(PERFORMANCE_ENABLE) == TRUE -- cgit v1.2.3