1 files changed, 59 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
new file mode 100644
index 000000000..34c6de6f5
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
@@ -0,0 +1,59 @@
+;------------------------------------------------------------------------------
+;*
+;*   Copyright 2009, Intel Corporation
+;*   All rights reserved. This program and the accompanying materials
+;*   are licensed and made available under the terms and conditions of the BSD License
+;*   which accompanies this distribution.  The full text of the license may be found at
+;*   http://opensource.org/licenses/bsd-license.php
+;*
+;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;*
+;------------------------------------------------------------------------------
+
+
+.const
+;
+; Float control word initial value: 
+; all exceptions masked, double-precision, round-to-nearest
+;
+mFpuControlWord       DW      027Fh
+;
+; Multimedia-extensions control word:
+; all exceptions masked, round-to-nearest, flush to zero for masked underflow
+;
+mMmxControlWord       DD      01F80h 
+
+.code
+
+
+;
+; Initializes floating point units for requirement of UEFI specification.
+;
+; This function initializes floating-point control word to 0x027F (all exceptions
+; masked,double-precision, round-to-nearest) and multimedia-extensions control word
+; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+; for masked underflow).
+;
+InitializeFloatingPointUnits PROC PUBLIC
+
+    ;
+    ; Initialize floating point units
+    ;
+    finit
+    fldcw   mFpuControlWord
+    
+    ;
+    ; Set OSFXSR bit 9 in CR4
+    ;
+    mov     rax, cr4
+    or      rax, BIT9
+    mov     cr4, rax
+
+    ldmxcsr mMmxControlWord
+    
+    ret
+InitializeFloatingPointUnits ENDP
+
+END