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authorDavid Wei <david.wei@intel.com>2015-01-12 09:37:20 +0000
committerzwei4 <zwei4@Edk2>2015-01-12 09:37:20 +0000
commit3cbfba02fef9dae07a041fdbf2e89611d72d6f90 (patch)
tree0b3bf0783124d38a191e09736492c0141aa36c15 /Vlv2TbltDevicePkg/PlatformPkgConfig.dsc
parent6f785cfcc304c48ec04e542ee429df95e7b51bc5 (diff)
Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
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+#/** @file
+# platform configuration file.
+#
+# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+#
+# TRUE is ENABLE. FASLE is DISABLE.
+#
+
+#
+# FSP selection
+#
+DEFINE MINNOW2_FSP_BUILD = FALSE
+
+
+DEFINE SCSI_ENABLE = TRUE
+
+
+#
+# To enable extra configuration for clk gen
+#
+DEFINE CLKGEN_CONFIG_EXTRA_ENABLE=TRUE
+
+#
+# Feature selection
+#
+
+#
+# Select system timer which is used to produce Timer Arch Protocol:
+# TRUE - HPET timer is used.
+# FALSE - 8254 timer is used.
+#
+DEFINE USE_HPET_TIMER = FALSE
+
+#
+# Feature selection
+#
+
+DEFINE TPM_ENABLED = FALSE
+
+DEFINE ACPI50_ENABLE = TRUE
+DEFINE PERFORMANCE_ENABLE = FALSE
+
+
+DEFINE LFMA_ENABLE = FALSE # Load module at fixed address feature
+DEFINE DXE_COMPRESS_ENABLE = TRUE
+DEFINE DXE_CRC32_SECTION_ENABLE = TRUE
+DEFINE SSE2_ENABLE = FALSE
+
+DEFINE SECURE_BOOT_ENABLE = TRUE
+DEFINE USER_IDENTIFICATION_ENABLE = FALSE
+DEFINE VARIABLE_INFO_ENABLE = FALSE
+DEFINE S3_ENABLE = TRUE
+DEFINE CAPSULE_ENABLE = FALSE
+DEFINE CAPSULE_RESET_ENABLE = TRUE
+
+DEFINE GOP_DRIVER_ENABLE = TRUE
+DEFINE DATAHUB_ENABLE = TRUE
+DEFINE DATAHUB_STATUS_CODE_ENABLE = TRUE
+DEFINE USB_ENABLE = TRUE
+
+DEFINE ISA_SERIAL_STATUS_CODE_ENABLE = TRUE
+DEFINE USB_SERIAL_STATUS_CODE_ENABLE = FALSE
+DEFINE RAM_SERIAL_STATUS_CODE_ENABLE = FALSE
+
+DEFINE ENBDT_S3_SUPPORT = TRUE
+
+DEFINE LZMA_ENABLE = TRUE
+DEFINE S4_ENABLE = TRUE
+DEFINE NETWORK_ENABLE = TRUE
+DEFINE NETWORK_IP6_ENABLE = TRUE
+DEFINE NETWORK_ISCSI_ENABLE = FALSE
+DEFINE NETWORK_VLAN_ENABLE = FALSE
+
+DEFINE SATA_ENABLE = TRUE
+DEFINE PCIESC_ENABLE = TRUE
+
+#
+# Enable source level debug default
+#
+DEFINE SOURCE_DEBUG_ENABLE = FALSE
+
+
+
+