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authorDavid Woodhouse <David.Woodhouse@intel.com>2015-04-08 01:44:22 +0000
committerli-elvin <li-elvin@Edk2>2015-04-08 01:44:22 +0000
commitff247afd2286ba61cbbe52c57a06102b8223b76e (patch)
tree06af13784a8a721b6eaeb003db11072fe09a9ab4 /IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
parent881644d7411e45c6ea2f8eebf1c8ba9f067d0a6d (diff)
IntelFrameworkModulePkg: Update LegacyBiosDxe to use UmaAddress and UmaSize in CSM 0.98.
The UmaAddress/UmaSize fields allows the CSM to have writable memory between the top of the option ROMs and the start of its read-only code segment. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Reviewed-by: Elvin Li <elvin.li@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17131 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c')
-rw-r--r--IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
index e51acd055..6c2688b4a 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
@@ -1238,6 +1238,24 @@ GenericLegacyBoot (
0x40000,
&Granularity
);
+
+ if ((Private->Legacy16Table->TableLength >= OFFSET_OF (EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&
+ ((Private->Legacy16Table->UmaAddress != 0) && (Private->Legacy16Table->UmaSize != 0))) {
+ //
+ // Here we could reduce UmaAddress down as far as Private->OptionRom, taking into
+ // account the granularity of the access control.
+ //
+ DEBUG((EFI_D_INFO, "Unlocking UMB RAM region 0x%x-0x%x\n", Private->Legacy16Table->UmaAddress,
+ Private->Legacy16Table->UmaAddress + Private->Legacy16Table->UmaSize));
+
+ Private->LegacyRegion->UnLock (
+ Private->LegacyRegion,
+ Private->Legacy16Table->UmaAddress,
+ Private->Legacy16Table->UmaSize,
+ &Granularity
+ );
+ }
+
//
// Lock attributes of the Legacy Region if chipset supports
//