diff options
author | Shifei Lu <shifeix.a.lu@intel.com> | 2015-03-10 03:16:48 +0000 |
---|---|---|
committer | zwei4 <zwei4@Edk2> | 2015-03-10 03:16:48 +0000 |
commit | 8268a01d2ca41cddbcccac9a4559d37e782eedc2 (patch) | |
tree | 2515022c5fb1d7f0f0e2610e49abdd083f861124 | |
parent | c01934fb183a66547a6473686286cdd44de81b79 (diff) |
Add code to identify D0 stepping ValleyView SoC.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17034 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r-- | Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h | 2 | ||||
-rw-r--r-- | Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h b/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h index 29629890c..bf3c3c86c 100644 --- a/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h +++ b/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h @@ -119,6 +119,8 @@ typedef enum { #define V_PCH_LPC_RID_B 0x0C // B3 Stepping (25 x 27)
#define V_PCH_LPC_RID_C 0x0D // C0 Stepping (17 x 17)
#define V_PCH_LPC_RID_D 0x0E // C0 Stepping (25 x 27)
+#define V_PCH_LPC_RID_E 0x10 // D0 Stepping (17 x 17)
+#define V_PCH_LPC_RID_F 0x11 // D0 Stepping (25 x 27)
#define R_PCH_LPC_MLT 0x0D // Master Latency Timer
#define B_PCH_LPC_MLT_MLC 0xF8 // Master Latency Count
diff --git a/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c b/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c index c92308f4e..a509b07c6 100644 --- a/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c +++ b/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c @@ -83,7 +83,12 @@ PchStepping ( case V_PCH_LPC_RID_D:
return PchC0;
break;
-
+
+ case V_PCH_LPC_RID_E:
+ case V_PCH_LPC_RID_F:
+ return PchD0;
+ break;
+
default:
return PchSteppingMax;
break;
|