ARM64: ACPI: add ACPI initialiasation for arm64

armv8 servers will use ACPI for initialisation in the same manner that
current x86/x86_64 ones do. Add the calls to initialise the ACPI tables
and load devices using the drivers/acpi subsytem.

Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>

12 files changed, 1184 insertions, 0 deletions

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index c04454876bcb..6f8e88b53e68 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -270,6 +270,8 @@ source "net/Kconfig"
 
 source "drivers/Kconfig"
 
+source "drivers/acpi/Kconfig"
+
 source "fs/Kconfig"
 
 source "arch/arm64/kvm/Kconfig"
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
new file mode 100644
index 000000000000..3ef9fc08ed8a
--- /dev/null
+++ b/arch/arm64/include/asm/acpi.h
@@ -0,0 +1,153 @@
+/*
+ *  Copyright (C) 2013, Al Stone <ahs3@redhat.com>
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ */
+
+#ifndef _ASM_ARM_ACPI_H
+#define _ASM_ARM_ACPI_H
+
+#ifdef __KERNEL__
+
+#include <acpi/pdc_arm64.h>
+
+#include <asm/cacheflush.h>
+
+#include <linux/init.h>
+
+#define COMPILER_DEPENDENT_INT64	long long
+#define COMPILER_DEPENDENT_UINT64	unsigned long long
+
+/*
+ * Calling conventions:
+ *
+ * ACPI_SYSTEM_XFACE        - Interfaces to host OS (handlers, threads)
+ * ACPI_EXTERNAL_XFACE      - External ACPI interfaces
+ * ACPI_INTERNAL_XFACE      - Internal ACPI interfaces
+ * ACPI_INTERNAL_VAR_XFACE  - Internal variable-parameter list interfaces
+ */
+#define ACPI_SYSTEM_XFACE
+#define ACPI_EXTERNAL_XFACE
+#define ACPI_INTERNAL_XFACE
+#define ACPI_INTERNAL_VAR_XFACE
+
+/* Asm macros */
+#define ACPI_ASM_MACROS
+#define BREAKPOINT3
+#define ACPI_DISABLE_IRQS() local_irq_disable()
+#define ACPI_ENABLE_IRQS()  local_irq_enable()
+#define ACPI_FLUSH_CPU_CACHE() flush_cache_all()
+
+#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) (\
+	asm ("mov	r0, %2\n"					\
+	     "mov	r1, %3\n"					\
+	     "mov	r2, %4\n"					\
+	     "bl	__arm_acpi_div_64_by_32\n"			\
+	     "mov	%0, r0\n"					\
+	     "mov	%1, r1\n"					\
+	     : "=r"(q32), "=r"(r32)			/* output */	\
+	     : "r"(n_hi), "r"(n_lo), "r"(d32)		/* input */	\
+	     : "r0", "r1", "r2"		/* clobbered registers */	\
+	))
+
+#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) (\
+	asm ("mov	r0, %2\n"					\
+	     "mov	r1, %3\n"					\
+	     "and	r2, r0, #1\n"					\
+	     "lsr	r0, r0, #1\n"					\
+	     "lsr	r1, r1, #1\n"					\
+	     "orr	r1, r1, r2, lsl #31\n"				\
+	     "mov	%0, r0\n"					\
+	     "mov	%1, r1\n"					\
+	     : "=r"(n_hi), "=r"(n_lo)	/* output operands */		\
+	     : "0"(n_hi), "1"(n_lo)		/* input operands */	\
+	     : "r0", "r1", "r2"	/* clobbered registers */		\
+	))
+
+/* Blob handling macros */
+#define	ACPI_BLOB_HEADER_SIZE	8
+
+int __acpi_acquire_global_lock(unsigned int *lock);
+int __acpi_release_global_lock(unsigned int *lock);
+
+#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
+	((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
+
+#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
+	((Acq) = __acpi_release_global_lock(&facs->global_lock))
+
+/* Basic configuration for ACPI */
+/* BOZO: hardware reduced acpi only? */
+#ifdef	CONFIG_ACPI
+extern int acpi_disabled;
+extern int acpi_noirq;
+extern int acpi_pci_disabled;
+extern int acpi_strict;
+
+struct acpi_arm_root {
+	phys_addr_t phys_address;
+	unsigned long size;
+};
+extern struct acpi_arm_root acpi_arm_rsdp_info;
+
+/* Low-level suspend routine. */
+extern int acpi_suspend_lowlevel(void);
+
+/* Physical address to resume after wakeup */
+/* BOZO: was...
+#define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
+*/
+#define acpi_wakeup_address (0)
+
+
+static inline void disable_acpi(void)
+{
+	acpi_disabled = 1;
+	acpi_pci_disabled = 1;
+	acpi_noirq = 1;
+}
+
+static inline bool arch_has_acpi_pdc(void)
+{
+	/* BOZO: replace x86 specific-ness here */
+	return 0;	/* always false for now */
+}
+
+static inline void arch_acpi_set_pdc_bits(u32 *buf)
+{
+	/* BOZO: replace x86 specific-ness here */
+}
+
+static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
+static inline void acpi_disable_pci(void)
+{
+	acpi_pci_disabled = 1;
+	acpi_noirq_set();
+}
+
+#else	/* !CONFIG_ACPI */
+#define acpi_disabled 1		/* ACPI sometimes enabled on ARM */
+#define acpi_noirq 1		/* ACPI sometimes enabled on ARM */
+#define acpi_pci_disabled 1	/* ACPI PCI sometimes enabled on ARM */
+#define acpi_strict 1		/* no ACPI spec workarounds on ARM */
+#endif
+
+#endif /*__KERNEL__*/
+
+#endif /*_ASM_ARM_ACPI_H*/
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 1d12f89140ba..30c4628f4254 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -234,6 +234,7 @@ extern void __iounmap(volatile void __iomem *addr);
 #define ioremap_nocache(addr, size)	__ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
 #define ioremap_wc(addr, size)		__ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
 #define ioremap_cached(addr, size)	__ioremap((addr), (size), __pgprot(PROT_NORMAL))
+#define ioremap_cache(addr, size)	__ioremap((addr), (size), __pgprot(PROT_NORMAL))
 #define iounmap				__iounmap
 
 #define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF)
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index ab239b2c456f..53326fd81897 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -155,6 +155,19 @@ static inline void spin_lock_prefetch(const void *x)
 	prefetchw(x);
 }
 
+/*
+ * Not all ARM devices have ACPI, but some do
+ * BOZO: is this correct?
+ */
+#ifdef CONFIG_ACPI
+enum idle_boot_override { IDLE_NO_OVERRIDE = 0, IDLE_HALT, IDLE_NOMWAIT,
+			  IDLE_POLL, IDLE_FORCE_MWAIT };
+
+extern unsigned long	boot_option_idle_override;
+#endif
+
+/* end BOZO */
+
 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 
 #endif
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 7b4b564961d4..615c67246e35 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -27,3 +27,6 @@ extra-y					:= $(head-y) vmlinux.lds
 # vDSO - this must be built first to generate the symbol offsets
 $(call objectify,$(arm64-obj-y)): $(obj)/vdso/vdso-offsets.h
 $(obj)/vdso/vdso-offsets.h: $(obj)/vdso
+
+obj-$(CONFIG_ACPI)			+= acpi/
+
diff --git a/arch/arm64/kernel/acpi/Makefile b/arch/arm64/kernel/acpi/Makefile
new file mode 100644
index 000000000000..e28c06367df3
--- /dev/null
+++ b/arch/arm64/kernel/acpi/Makefile
@@ -0,0 +1,6 @@
+obj-$(CONFIG_ACPI)		+= boot.o
+
+# BOZO: need to re-enable this properly
+#obj-$(CONFIG_ACPI_SLEEP)	+= sleep.o wakeup_$(BITS).o
+obj-$(CONFIG_ACPI_SLEEP)	+= sleep.o
+
diff --git a/arch/arm64/kernel/acpi/acpi_div_64_by_32.S b/arch/arm64/kernel/acpi/acpi_div_64_by_32.S
new file mode 100644
index 000000000000..99a14a427b4e
--- /dev/null
+++ b/arch/arm64/kernel/acpi/acpi_div_64_by_32.S
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2013, Al Stone <ahs3@redhat.com>
+ *
+ * __acpi_arm_div64_by_32: perform integer division of a 64-bit value
+ *                         a 32-bit value
+ *
+ * The algorithm is borrowed from the GMP library, but has been redone
+ * here in order to put this implementation under a GPLv2 license.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifdef __ARM_ARCH_8__
+
+#include <linux/linkage.h>
+
+/*
+ * This needs to be called in the following manner:
+ *      n_lo    => r0           # these are the low 32 bits of the dividend
+ *      n_hi    => r1           # the high 32 bits of the dividend
+ *      d32     => r2           # the 32-bit divisor
+ *
+ * The result is:
+ *      q32     <= r0           # the 32-bit quotient
+ *      r32     <= r1           # the 32-bit remainder
+ *
+ * This should be consistent with the normal ARMv7 calling conventions.
+ *
+ */
+
+ENTRY(__arm_acpi_div_64_by_32)
+        mov     r12, #32                // loop counter
+        cmp     r2, #0x80000000         // check divisor MSB and clear carry
+        bcs     bigdiv
+
+loop:   adcs    r1, r1, r1              // handle each bit
+        adc     r0, r0, r0
+        cmp     r0, r2
+        subcs   r0, r0, r2
+        sub     r12, r12, #1
+        teq     r12, #0
+        bne     loop
+
+        mov     r3, r0                  // stash the remainder for a tic
+        adc     r0, r1, r1              // quotient: add in last carry
+        mov     r1, r3                  // remainder (now in right register)
+        mov     pc, lr
+
+bigdiv: stmfd   sp!, { r8, lr }         // clear some scratch space
+
+        and     r8, r1, #1              // save LSB of dividend
+        mov     lr, r0, lsl #31
+        orrs    r1, lr, r1, lsr #1      // r1 = lower part >> 1 bit
+        mov     r0, r0, lsr #1          // r0 = higher part >> 1 bit
+
+        and     lr, r2, #1              // save LSB of divisor
+        movs    r2, r2, lsr #1          // r2 = floor(divisor / 2)
+        adc     r2, r2, #0              // r2 = ceil(divisor / 2)
+
+loop2:  adcs    r1, r1, r1              // handle each bit
+        adc     r0, r0, r0
+        cmp     r0, r2
+        subcs   r0, r0, r2
+        sub     r12, r12, #1
+        teq     r12, #0
+        bne     loop2
+
+        adc     r1, r1, r1              // shift and add last carry
+        add     r0, r8, r0, lsl #1      // shift in remaining dividend LSB
+        tst     lr, lr
+        beq     evendiv
+
+        rsb     r2, lr, r2, lsl #1      // restore divisor value
+        adds    r0, r0, r1              // adjust for omitted divisor LSB
+        addcs   r1, r1, #1              // adjust quotient if a carry results
+        subcs   r0, r0, r2              // adjust remainder, if carry
+        cmp     r0, r2
+        subcs   r0, r0, #1              // adjust remainder
+        addcs   r1, r1, #1              // adjust quotient
+
+evendiv:
+        mov     r3, r0                  // stash the remainder for a tic
+        mov     r0, r1                  // quotient
+        mov     r1, r3                  // remainder
+
+        ldmfd   sp!, { r8, pc }         // restore the registers used
+
+ENDPROC(__arm_acpi_div_64_by_32)
+
+#else           /* ! __ARM_ARCH_7A__ */
+#error  __arm_acpi_div_64_by_32 not defined for this architecture
+#endif
+
diff --git a/arch/arm64/kernel/acpi/boot.c b/arch/arm64/kernel/acpi/boot.c
new file mode 100644
index 000000000000..5db7f6bfc226
--- /dev/null
+++ b/arch/arm64/kernel/acpi/boot.c
@@ -0,0 +1,731 @@
+/*
+ *  boot.c - Architecture-Specific Low-Level ACPI Boot Support
+ *
+ *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
+ *  Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
+ *  Copyright (C) 2013, Al Stone <ahs3@redhat.com> (ARM version)
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ */
+
+/*
+ * BOZO: this needs to be done right....
+ */
+#include <linux/init.h>
+#include <linux/acpi.h>
+#include <linux/acpi_pmtmr.h>
+#include <linux/efi.h>
+#include <linux/cpumask.h>
+#include <linux/memblock.h>
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/slab.h>
+#include <linux/bootmem.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+
+#include <asm/pgtable.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/acpi.h>
+
+static int __initdata acpi_force;
+u32 acpi_rsdt_forced;
+int acpi_disabled;
+EXPORT_SYMBOL(acpi_disabled);
+
+#define BAD_MADT_ENTRY(entry, end) (					    \
+		(!entry) || (unsigned long)entry + sizeof(*entry) > end ||  \
+		((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
+
+#define PREFIX			"ACPI: "
+
+int acpi_noirq;				/* skip ACPI IRQ initialization */
+int acpi_pci_disabled;		/* skip ACPI PCI scan and IRQ initialization */
+EXPORT_SYMBOL(acpi_pci_disabled);
+
+int acpi_lapic;
+int acpi_ioapic;
+int acpi_strict;
+
+u8 acpi_sci_flags __initdata;
+int acpi_sci_override_gsi __initdata;
+int acpi_skip_timer_override __initdata;
+int acpi_use_timer_override __initdata;
+int acpi_fix_pin2_polarity __initdata;
+
+struct acpi_arm_root acpi_arm_rsdp_info;     /* info about RSDP from FDT */
+
+/*
+ * Boot-time Configuration
+ */
+
+/*
+ * The default interrupt routing model is PIC (8259).  This gets
+ * overridden if IOAPICs are enumerated (below).
+ *
+ * Since we're on ARM, it clearly has to be GIC.
+ */
+enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
+
+static unsigned int gsi_to_irq(unsigned int gsi)
+{
+	int irq = irq_create_mapping(NULL, gsi);
+
+	return irq;
+}
+
+/*
+ * BOZO: is it reasonable to just reserve the memory space?  Or are there
+ * other restrictions needed?  Or does it need copying to some other place?
+ */
+char *__init __acpi_map_table(unsigned long phys, unsigned long size)
+{
+	if (!phys || !size)
+		return NULL;
+
+	/* we're already in memory so we cannot io_remap the entry */
+	return phys_to_virt(phys);
+}
+
+void __init __acpi_unmap_table(char *map, unsigned long size)
+{
+	if (!map || !size)
+		return;
+
+	/* we're already in memory so we cannot io_remap the entry;
+	 * since we're not io_remap'ing, unmap'ing is especially
+	 * pointless
+	 */
+	return;
+}
+
+/*
+ * acpi_pic_sci_set_trigger()
+ *
+ * use ELCR to set PIC-mode trigger type for SCI
+ *
+ * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
+ * it may require Edge Trigger -- use "acpi_sci=edge"
+ *
+ * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
+ * for the 8259 PIC.  bit[n] = 1 means irq[n] is Level, otherwise Edge.
+ * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
+ * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
+ */
+
+void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
+{
+	unsigned int mask = 1 << irq;
+	unsigned int old, new;
+
+	/* Real old ELCR mask */
+	old = inb(0x4d0) | (inb(0x4d1) << 8);
+
+	/*
+	 * If we use ACPI to set PCI IRQs, then we should clear ELCR
+	 * since we will set it correctly as we enable the PCI irq
+	 * routing.
+	 */
+	new = acpi_noirq ? old : 0;
+
+	/*
+	 * Update SCI information in the ELCR, it isn't in the PCI
+	 * routing tables..
+	 */
+	switch (trigger) {
+	case 1:		/* Edge - clear */
+		new &= ~mask;
+		break;
+	case 3:		/* Level - set */
+		new |= mask;
+		break;
+	}
+
+	if (old == new)
+		return;
+
+	printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
+	outb(new, 0x4d0);
+	outb(new >> 8, 0x4d1);
+}
+
+int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+{
+	*irq = gsi_to_irq(gsi);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
+
+static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
+				 int trigger, int polarity)
+{
+#ifdef CONFIG_PCI
+	/*
+	 * Make sure all (legacy) PCI IRQs are set as level-triggered.
+	 */
+	if (trigger == ACPI_LEVEL_SENSITIVE)
+		eisa_set_level_irq(gsi);
+#endif
+
+	return gsi;
+}
+
+static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
+				    int trigger, int polarity)
+{
+	return gsi;
+}
+
+int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
+			   int trigger, int polarity) = acpi_register_gsi_pic;
+
+/*
+ * success: return IRQ number (>=0)
+ * failure: return < 0
+ */
+int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
+{
+	unsigned int irq;
+	unsigned int plat_gsi = gsi;
+
+	plat_gsi = (*__acpi_register_gsi)(dev, gsi, trigger, polarity);
+
+	irq = gsi_to_irq(plat_gsi);
+
+	return irq;
+}
+EXPORT_SYMBOL_GPL(acpi_register_gsi);
+
+void acpi_unregister_gsi(u32 gsi)
+{
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
+
+void __init acpi_set_irq_model_pic(void)
+{
+	acpi_irq_model = ACPI_IRQ_MODEL_PIC;
+	__acpi_register_gsi = acpi_register_gsi_pic;
+	acpi_ioapic = 0;
+}
+
+void __init acpi_set_irq_model_ioapic(void)
+{
+	acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
+	__acpi_register_gsi = acpi_register_gsi_ioapic;
+	acpi_ioapic = 1;
+}
+
+/*
+ *  ACPI based hotplug support for CPU
+ */
+#ifdef CONFIG_ACPI_HOTPLUG_CPU
+#include <acpi/processor.h>
+
+static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
+{
+#ifdef CONFIG_ACPI_NUMA
+	int nid;
+
+	nid = acpi_get_node(handle);
+	if (nid == -1 || !node_online(nid))
+		return;
+	set_apicid_to_node(physid, nid);
+	numa_set_node(cpu, nid);
+#endif
+}
+
+static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
+{
+	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
+	union acpi_object *obj;
+	struct acpi_madt_local_apic *lapic;
+	cpumask_var_t tmp_map, new_map;
+	u8 physid;
+	int cpu;
+	int retval = -ENOMEM;
+
+	if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
+		return -EINVAL;
+
+	if (!buffer.length || !buffer.pointer)
+		return -EINVAL;
+
+	obj = buffer.pointer;
+	if (obj->type != ACPI_TYPE_BUFFER ||
+	    obj->buffer.length < sizeof(*lapic)) {
+		kfree(buffer.pointer);
+		return -EINVAL;
+	}
+
+	lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
+
+	if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
+	    !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
+		kfree(buffer.pointer);
+		return -EINVAL;
+	}
+
+	physid = lapic->id;
+
+	kfree(buffer.pointer);
+	buffer.length = ACPI_ALLOCATE_BUFFER;
+	buffer.pointer = NULL;
+	lapic = NULL;
+
+	if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL))
+		goto out;
+
+	if (!alloc_cpumask_var(&new_map, GFP_KERNEL))
+		goto free_tmp_map;
+
+	cpumask_copy(tmp_map, cpu_present_mask);
+#ifdef CONFIG_X86
+	/* BOZO: ?? */
+	acpi_register_lapic(physid, ACPI_MADT_ENABLED);
+#endif
+
+	/*
+	 * If acpi_register_lapic successfully generates a new logical cpu
+	 * number, then the following will get us exactly what was mapped
+	 */
+	cpumask_andnot(new_map, cpu_present_mask, tmp_map);
+	if (cpumask_empty(new_map)) {
+		printk("Unable to map lapic to logical cpu number\n");
+		retval = -EINVAL;
+		goto free_new_map;
+	}
+
+	acpi_processor_set_pdc(handle);
+
+	cpu = cpumask_first(new_map);
+	acpi_map_cpu2node(handle, cpu, physid);
+
+	*pcpu = cpu;
+	retval = 0;
+
+free_new_map:
+	free_cpumask_var(new_map);
+free_tmp_map:
+	free_cpumask_var(tmp_map);
+out:
+	return retval;
+}
+
+/* wrapper to silence section mismatch warning */
+int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
+{
+	return _acpi_map_lsapic(handle, pcpu);
+}
+EXPORT_SYMBOL(acpi_map_lsapic);
+
+int acpi_unmap_lsapic(int cpu)
+{
+#ifdef CONFIG_X86
+	/* BOZO: ??? */
+	per_cpu(x86_cpu_to_apicid, cpu) = -1;
+	set_cpu_present(cpu, false);
+	num_processors--;
+#endif
+
+	return 0;
+}
+EXPORT_SYMBOL(acpi_unmap_lsapic);
+#endif				/* CONFIG_ACPI_HOTPLUG_CPU */
+
+static int __init acpi_parse_sbf(struct acpi_table_header *table)
+{
+	struct acpi_table_boot *sb;
+
+	sb = (struct acpi_table_boot *)table;
+	if (!sb) {
+		printk(KERN_WARNING PREFIX "Unable to map SBF\n");
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_HPET_TIMER
+#include <asm/hpet.h>
+
+static struct __initdata resource * hpet_res;
+
+static int __init acpi_parse_hpet(struct acpi_table_header *table)
+{
+	struct acpi_table_hpet *hpet_tbl;
+
+	hpet_tbl = (struct acpi_table_hpet *)table;
+	if (!hpet_tbl) {
+		printk(KERN_WARNING PREFIX "Unable to map HPET\n");
+		return -ENODEV;
+	}
+
+	if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
+		printk(KERN_WARNING PREFIX "HPET timers must be located in "
+		       "memory.\n");
+		return -1;
+	}
+
+	hpet_address = hpet_tbl->address.address;
+	hpet_blockid = hpet_tbl->sequence;
+
+	/*
+	 * Some broken BIOSes advertise HPET at 0x0. We really do not
+	 * want to allocate a resource there.
+	 */
+	if (!hpet_address) {
+		printk(KERN_WARNING PREFIX
+		       "HPET id: %#x base: %#lx is invalid\n",
+		       hpet_tbl->id, hpet_address);
+		return 0;
+	}
+	printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
+	       hpet_tbl->id, hpet_address);
+
+	/*
+	 * Allocate and initialize the HPET firmware resource for adding into
+	 * the resource tree during the lateinit timeframe.
+	 */
+#define HPET_RESOURCE_NAME_SIZE 9
+	hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
+
+	hpet_res->name = (void *)&hpet_res[1];
+	hpet_res->flags = IORESOURCE_MEM;
+	snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
+		 hpet_tbl->sequence);
+
+	hpet_res->start = hpet_address;
+	hpet_res->end = hpet_address + (1 * 1024) - 1;
+
+	return 0;
+}
+
+/*
+ * hpet_insert_resource inserts the HPET resources used into the resource
+ * tree.
+ */
+static __init int hpet_insert_resource(void)
+{
+	if (!hpet_res)
+		return 1;
+
+	return insert_resource(&iomem_resource, hpet_res);
+}
+
+late_initcall(hpet_insert_resource);
+
+#else
+#define	acpi_parse_hpet	NULL
+#endif
+
+static int __init acpi_parse_fadt(struct acpi_table_header *table)
+{
+	return 0;
+}
+
+static void __init early_acpi_process_madt(void)
+{
+}
+
+static void __init acpi_process_madt(void)
+{
+	return;
+}
+
+void set_checksum(u8 *start, int len, u8 *cksum)
+{
+	u8 newsum, oldsum;
+	u8 *p;
+
+	newsum = 0;
+	for (p = (u8 *)start; p < (u8 *)(start + len); p++)
+		newsum += *p;
+
+	oldsum = *cksum;
+	newsum = (u8)(newsum - oldsum);
+
+	*cksum = (u8)(0 - newsum);
+}
+
+void __init acpi_arm_blob_relocate(void)
+{
+	/*
+	 * Fortunately, there are only a few tables that need to
+	 * have their offsets converted to actual addresses.
+	 *
+	 * NB: all values in the blob are little-endian.
+	 */
+
+	struct acpi_table_rsdp *rp;
+	struct acpi_table_xsdt *xp;
+	struct acpi_table_fadt *fp;
+	phys_addr_t paddress;
+	void *vaddress;
+	u32 entries;
+	u32 ii;
+	u64 *tmp;
+
+	if (!acpi_arm_rsdp_info.phys_address && !acpi_arm_rsdp_info.size) {
+		printk(KERN_ERR "(E) ACPI: failed to find rsdp info\n");
+		return;
+	}
+
+	paddress = acpi_arm_rsdp_info.phys_address;
+	paddress += ACPI_BLOB_HEADER_SIZE;
+	vaddress = phys_to_virt(paddress);
+
+	/* fixups for the rsdp */
+	rp = (struct acpi_table_rsdp *)vaddress;
+	if (rp->rsdt_physical_address)
+		rp->rsdt_physical_address += paddress;
+	if (rp->xsdt_physical_address)
+		rp->xsdt_physical_address += paddress;
+	set_checksum((u8 *)rp, rp->length, &(rp->checksum));
+
+	/* fixups for the xsdt */
+	vaddress = phys_to_virt(rp->xsdt_physical_address);
+	xp = (struct acpi_table_xsdt *)vaddress;
+	entries = xp->header.length - sizeof (struct acpi_table_header);
+	entries /= 8;		/* length is in bytes */
+	tmp = (u64 *)(&(xp->table_offset_entry[0]));
+	for (ii = 0; ii < entries; ii++)
+		*tmp++ += paddress;
+	set_checksum((u8 *)xp, xp->header.length, &(xp->header.checksum));
+
+	/* fixups for the fadt */
+	vaddress = phys_to_virt(xp->table_offset_entry[0]);
+	fp = (struct acpi_table_fadt *)vaddress;
+	if (fp->facs)
+		fp->facs += paddress;
+	if (fp->dsdt)
+		fp->dsdt += paddress;
+	if (fp->Xfacs)
+		fp->Xfacs += paddress;
+	if (fp->Xdsdt)
+		fp->Xdsdt += paddress;
+
+	/* Always fix up the checksums since we've changed bits. */
+	set_checksum((u8 *)fp, fp->header.length, &(fp->header.checksum));
+}
+
+/*
+ * ========== OLD COMMENTS FROM x86 =================================
+ * acpi_boot_table_init() and acpi_boot_init()
+ *  called from setup_arch(), always.
+ *	1. checksums all tables
+ *	2. enumerates lapics
+ *	3. enumerates io-apics
+ *
+ * acpi_table_init() is separate to allow reading SRAT without
+ * other side effects.
+ *
+ * side effects of acpi_boot_init:
+ *	acpi_lapic = 1 if LAPIC found
+ *	acpi_ioapic = 1 if IOAPIC found
+ *	if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
+ *	if acpi_blacklisted() acpi_disabled = 1;
+ *	acpi_irq_model=...
+ *	...
+ * ==================================================================
+ *
+ * We have to approach this a little different on ARMv7.  We are
+ * passed in an ACPI blob and we really have no idea where in RAM
+ * it will be located.  So, what should have been the physical
+ * addresses of other tables cannot really be hardcoded into the
+ * tables.  What we will do is put an offset in the blob that is
+ * the offset from the beginning of the RSDP structure.  However,
+ * what that means is that we have to unpack the blob and do a
+ * bit of fixup work on the offsets to turn them into kernel
+ * virtual addresses so we can pass them on for later use.
+ */
+
+void __init acpi_boot_table_init(void)
+{
+	/*
+	 * If acpi_disabled, bail out
+	 */
+	if (acpi_disabled)
+		return;
+
+	printk(KERN_DEBUG "acpi: enter acpi_boot_table_init\n");
+
+	/*
+	 * Fix up the addresses in the ACPI we've loaded
+	 * in.  The blob has them as offsets and we need
+	 * actual addresses.
+	 */
+	acpi_arm_blob_relocate();
+
+	/*
+	 * Initialize the ACPI boot-time table parser.
+	 */
+	if (acpi_table_init()) {
+		disable_acpi();
+		return;
+	}
+
+	printk(KERN_INFO "(I) acpi_table_init call completed\n");
+	acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
+
+	printk(KERN_INFO "(I) exit acpi_boot_table_init\n");
+}
+
+int __init early_acpi_boot_init(void)
+{
+	/*
+	 * If acpi_disabled, bail out
+	 */
+	if (acpi_disabled)
+		return 1;
+
+	printk(KERN_INFO "enter early_acpi_boot_init\n");
+
+	/*
+	 * Process the Multiple APIC Description Table (MADT), if present
+	 */
+	early_acpi_process_madt();
+
+	return 0;
+}
+
+int __init acpi_boot_init(void)
+{
+	/*
+	 * If acpi_disabled, bail out
+	 */
+	if (acpi_disabled)
+		return 1;
+
+	printk(KERN_INFO "enter acpi_boot_init\n");
+
+	acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
+
+	/*
+	 * set sci_int and PM timer address
+	 */
+	acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
+
+	/*
+	 * Process the Multiple APIC Description Table (MADT), if present
+	 */
+	acpi_process_madt();
+
+	acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
+
+	return 0;
+}
+
+static int __init parse_acpi(char *arg)
+{
+	if (!arg)
+		return -EINVAL;
+
+	/* "acpi=off" disables both ACPI table parsing and interpreter */
+	if (strcmp(arg, "off") == 0) {
+		disable_acpi();
+	}
+	/* acpi=force to over-ride black-list */
+	else if (strcmp(arg, "force") == 0) {
+		acpi_force = 1;
+		acpi_disabled = 0;
+	}
+	/* acpi=strict disables out-of-spec workarounds */
+	else if (strcmp(arg, "strict") == 0) {
+		acpi_strict = 1;
+	}
+	/* acpi=rsdt use RSDT instead of XSDT */
+	else if (strcmp(arg, "rsdt") == 0) {
+		acpi_rsdt_forced = 1;
+	}
+	/* "acpi=noirq" disables ACPI interrupt routing */
+	else if (strcmp(arg, "noirq") == 0) {
+		acpi_noirq_set();
+	}
+	/* "acpi=copy_dsdt" copys DSDT */
+	else if (strcmp(arg, "copy_dsdt") == 0) {
+		acpi_gbl_copy_dsdt_locally = 1;
+	} else {
+		/* Core will printk when we return error. */
+		return -EINVAL;
+	}
+	return 0;
+}
+early_param("acpi", parse_acpi);
+
+/* FIXME: Using pci= for an ACPI parameter is a travesty. */
+static int __init parse_pci(char *arg)
+{
+	if (arg && strcmp(arg, "noacpi") == 0)
+		acpi_disable_pci();
+	return 0;
+}
+early_param("pci", parse_pci);
+
+int __init acpi_mps_check(void)
+{
+	return 0;
+}
+
+static int __init setup_acpi_sci(char *s)
+{
+	if (!s)
+		return -EINVAL;
+	if (!strcmp(s, "edge"))
+		acpi_sci_flags =  ACPI_MADT_TRIGGER_EDGE |
+			(acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
+	else if (!strcmp(s, "level"))
+		acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
+			(acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
+	else if (!strcmp(s, "high"))
+		acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
+			(acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
+	else if (!strcmp(s, "low"))
+		acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
+			(acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
+	else
+		return -EINVAL;
+	return 0;
+}
+early_param("acpi_sci", setup_acpi_sci);
+
+int __acpi_acquire_global_lock(unsigned int *lock)
+{
+	unsigned int old, new, val;
+	do {
+		old = *lock;
+		new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
+		val = cmpxchg(lock, old, new);
+	} while (unlikely (val != old));
+	return (new < 3) ? -1 : 0;
+}
+
+int __acpi_release_global_lock(unsigned int *lock)
+{
+	unsigned int old, new, val;
+	do {
+		old = *lock;
+		new = old & ~0x3;
+		val = cmpxchg(lock, old, new);
+	} while (unlikely (val != old));
+	return old & 0x1;
+}
+
diff --git a/arch/arm64/kernel/acpi/sleep.c b/arch/arm64/kernel/acpi/sleep.c
new file mode 100644
index 000000000000..9129c7e95cd7
--- /dev/null
+++ b/arch/arm64/kernel/acpi/sleep.c
@@ -0,0 +1,126 @@
+/*
+ * sleep.c - x86-specific ACPI sleep support.
+ *
+ *  Copyright (C) 2001-2003 Patrick Mochel
+ *  Copyright (C) 2001-2003 Pavel Machek <pavel@ucw.cz>
+ */
+
+int acpi_suspend_lowlevel(void)
+{
+	/* BOZO: dummy routine; see below for actual */
+	return 0;
+}
+
+#ifdef CONFIG_X86
+/* BOZO: disable everything for now... */
+
+#include <linux/acpi.h>
+#include <linux/bootmem.h>
+#include <linux/memblock.h>
+#include <linux/dmi.h>
+#include <linux/cpumask.h>
+#include <asm/segment.h>
+#include <asm/desc.h>
+#include <asm/pgtable.h>
+#include <asm/cacheflush.h>
+#include <asm/realmode.h>
+
+#include "../../realmode/rm/wakeup.h"
+#include "sleep.h"
+
+unsigned long acpi_realmode_flags;
+
+#if defined(CONFIG_SMP) && defined(CONFIG_64BIT)
+static char temp_stack[4096];
+#endif
+
+/**
+ * acpi_suspend_lowlevel - save kernel state
+ *
+ * Create an identity mapped page table and copy the wakeup routine to
+ * low memory.
+ */
+int acpi_suspend_lowlevel(void)
+{
+	struct wakeup_header *header =
+		(struct wakeup_header *) __va(real_mode_header->wakeup_header);
+
+	if (header->signature != WAKEUP_HEADER_SIGNATURE) {
+		printk(KERN_ERR "wakeup header does not match\n");
+		return -EINVAL;
+	}
+
+	header->video_mode = saved_video_mode;
+
+	header->pmode_behavior = 0;
+
+#ifndef CONFIG_64BIT
+	store_gdt((struct desc_ptr *)&header->pmode_gdt);
+
+	if (!rdmsr_safe(MSR_EFER,
+			&header->pmode_efer_low,
+			&header->pmode_efer_high))
+		header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);
+#endif /* !CONFIG_64BIT */
+
+	header->pmode_cr0 = read_cr0();
+	if (__this_cpu_read(cpu_info.cpuid_level) >= 0) {
+		header->pmode_cr4 = read_cr4();
+		header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_CR4);
+	}
+	if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
+			&header->pmode_misc_en_low,
+			&header->pmode_misc_en_high))
+		header->pmode_behavior |=
+			(1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
+	header->realmode_flags = acpi_realmode_flags;
+	header->real_magic = 0x12345678;
+
+#ifndef CONFIG_64BIT
+	header->pmode_entry = (u32)&wakeup_pmode_return;
+	header->pmode_cr3 = (u32)__pa(&initial_page_table);
+	saved_magic = 0x12345678;
+#else /* CONFIG_64BIT */
+#ifdef CONFIG_SMP
+	stack_start = (unsigned long)temp_stack + sizeof(temp_stack);
+	early_gdt_descr.address =
+			(unsigned long)get_cpu_gdt_table(smp_processor_id());
+	initial_gs = per_cpu_offset(smp_processor_id());
+#endif
+	initial_code = (unsigned long)wakeup_long64;
+       saved_magic = 0x123456789abcdef0L;
+#endif /* CONFIG_64BIT */
+
+	do_suspend_lowlevel();
+	return 0;
+}
+
+static int __init acpi_sleep_setup(char *str)
+{
+	while ((str != NULL) && (*str != '\0')) {
+		if (strncmp(str, "s3_bios", 7) == 0)
+			acpi_realmode_flags |= 1;
+		if (strncmp(str, "s3_mode", 7) == 0)
+			acpi_realmode_flags |= 2;
+		if (strncmp(str, "s3_beep", 7) == 0)
+			acpi_realmode_flags |= 4;
+#ifdef CONFIG_HIBERNATION
+		if (strncmp(str, "s4_nohwsig", 10) == 0)
+			acpi_no_s4_hw_signature();
+#endif
+		if (strncmp(str, "nonvs", 5) == 0)
+			acpi_nvs_nosave();
+		if (strncmp(str, "nonvs_s3", 8) == 0)
+			acpi_nvs_nosave_s3();
+		if (strncmp(str, "old_ordering", 12) == 0)
+			acpi_old_suspend_ordering();
+		str = strchr(str, ',');
+		if (str != NULL)
+			str += strspn(str, ", \t");
+	}
+	return 1;
+}
+
+__setup("acpi_sleep=", acpi_sleep_setup);
+
+#endif
diff --git a/arch/arm64/kernel/acpi/sleep.h b/arch/arm64/kernel/acpi/sleep.h
new file mode 100644
index 000000000000..67f59f8c6956
--- /dev/null
+++ b/arch/arm64/kernel/acpi/sleep.h
@@ -0,0 +1,17 @@
+/*
+ *	Variables and functions used by the code in sleep.c
+ */
+
+#include <asm/realmode.h>
+
+extern unsigned long saved_video_mode;
+extern long saved_magic;
+
+extern int wakeup_pmode_return;
+
+extern u8 wake_sleep_flags;
+
+extern unsigned long acpi_copy_wakeup_routine(unsigned long);
+extern void wakeup_long64(void);
+
+extern void do_suspend_lowlevel(void);
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 57fb55c44c90..2a7a6499535f 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -329,3 +329,11 @@ unsigned long randomize_et_dyn(unsigned long base)
 {
 	return randomize_base(base);
 }
+
+#ifdef CONFIG_ACPI
+
+unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
+EXPORT_SYMBOL(boot_option_idle_override);
+
+#endif
+
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 12ad8f3d0cfd..8fe23560e7cc 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -41,6 +41,9 @@
 #include <linux/memblock.h>
 #include <linux/of_fdt.h>
 #include <linux/of_platform.h>
+#ifdef CONFIG_ACPI
+#include <linux/acpi.h>
+#endif
 
 #include <asm/cputype.h>
 #include <asm/elf.h>
@@ -54,6 +57,10 @@
 #include <asm/memblock.h>
 #include <asm/psci.h>
 
+#ifdef CONFIG_ACPI
+#include <asm/acpi.h>
+#endif
+
 unsigned int processor_id;
 EXPORT_SYMBOL(processor_id);
 
@@ -166,6 +173,10 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys)
 
 	/* Retrieve various information from the /chosen node */
 	of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
+#ifdef CONFIG_ACPI
+	/* Retrieve ACPI pointers from /chosen node */
+	of_scan_flat_dt(early_init_dt_scan_acpi, &acpi_arm_rsdp_info);
+#endif
 	/* Initialize {size,address}-cells info */
 	of_scan_flat_dt(early_init_dt_scan_root, NULL);
 	/* Setup memory, calling early_init_dt_add_memory_arch */
@@ -259,6 +270,14 @@ void __init setup_arch(char **cmdline_p)
 	paging_init();
 	request_standard_resources();
 
+#ifdef CONFIG_ACPI
+	/*
+	 * Parse the ACPI tables for possible boot-time configuration
+	 */
+	acpi_boot_table_init();
+	early_acpi_boot_init();
+#endif
+
 	unflatten_device_tree();
 
 	psci_init();